Prosecution Insights
Last updated: May 29, 2026
Application No. 18/796,121

MEMORY DEVICE AND OPERATION METHOD THEREOF, AND MEMORY SYSTEM AND STORAGE MEDIUM

Non-Final OA §112
Filed
Aug 06, 2024
Priority
Apr 19, 2024 — CN 2024104837822
Examiner
RADKE, JAY W
Art Unit
2137
Tech Center
2100 — Computer Architecture & Software
Assignee
Yangtze Memory Technologies Co. Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
716 granted / 836 resolved
+30.6% vs TC avg
Moderate +9% lift
Without
With
+8.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
15 currently pending
Career history
852
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
66.9%
+26.9% vs TC avg
§102
10.9%
-29.1% vs TC avg
§112
16.3%
-23.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 836 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The disclosure is objected to because of the following informalities: Throughout the specification the term “stages” is used in the context of “stages of read voltages”, which causes much confusion due to indefiniteness as what is meant by such a word or term or phrase. For example, in the summary portion, perhaps “each page corresponds to a plurality of stages of read voltages” is meant to mean “each page corresponds to a set of read voltages needed to read the respective page or bit value of a row of memory cells”. Perhaps, “different pages among the n pages share at least one stage of read voltages” is meant to mean “different pages among the n pages share at least one read voltage”. Perhaps “two stages of read voltages”, “three stages of read voltages”, and “four stages of read voltages” is meant to mean “two read voltages”, “three read voltages”, and “four read voltages”, respectively. Perhaps “different stages of read voltages” is meant to mean “different sets of read votlages”. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1: The claim is indefinite since each of the phrase “stages of read voltages” and “different pages among the n pages share at least one stage of read voltages” is not a standard term used in the art, is not defined in the disclosure, and is indefinite in plain English. Various interpretations in plain English may be taken here. One example would be interpreting sharing a stage of read voltages as being an application of a corresponding read voltage value to the pages concurrently (sharing in the context of time). A second example would be interpreting a stage of read voltages as being a step during ramp-up to a final read voltage level., wherein each step is a read voltage value corresponding to a stage and is commonly applied to each page when reading the corresponding page at its respective time (sharing a wave form having a stepped pulse). It is also possible that other interpretations may exist for such an unusual and undefined phrase. It is not known if a single read voltage can have a plurality of stages or does a plurality of stages require a plurality of read voltages. If a single stage corresponds to a single read voltage, then “share at least one stage of read voltages” should be changed to “share at least one read voltage”. If each page is meant to refer to a logical page or bit position within a multibit per cell flash memory then maybe a stage of reading voltages is to refer to a set of read voltages but the claim does not make this definite due to the word “stage”. Claims 2-10 depend on claim 1. Regarding claim 11: The claim is indefinite since each of the phrase “stages of read voltages” and “different pages among the n pages share at least one stage of read voltages” is not a standard term used in the art, is not defined in the disclosure, and is indefinite in plain English. Various interpretations in plain English may be taken here. One example would be interpreting sharing a stage of read voltages as being an application of a corresponding read voltage value to the pages concurrently (sharing in the context of time). A second example would be interpreting a stage of read voltages as being a step during ramp-up to a final read voltage level., wherein each step is a read voltage value corresponding to a stage and is commonly applied to each page when reading the corresponding page at its respective time (sharing a wave form having a stepped pulse). It is also possible that other interpretations may exist for such an unusual and undefined phrase. It is not known if a single read voltage can have a plurality of stages or does a plurality of stages require a plurality of read voltages. If a single stage corresponds to a single read voltage, then “share at least one stage of read voltages” should be changed to “share at least one read voltage”. If each page is meant to refer to a logical page or bit position within a multibit per cell flash memory then maybe a stage of reading voltages is to refer to a set of read voltages but the claim does not make this definite due to the word “stage”. Claims 12 depends on claim 11. Regarding claim 13: The claim is indefinite since each of the phrase “stages of read voltages” and “different pages among the n pages share at least one stage of read voltages” is not a standard term used in the art, is not defined in the disclosure, and is indefinite in plain English. Various interpretations in plain English may be taken here. One example would be interpreting sharing a stage of read voltages as being an application of a corresponding read voltage value to the pages concurrently (sharing in the context of time). A second example would be interpreting a stage of read voltages as being a step during ramp-up to a final read voltage level., wherein each step is a read voltage value corresponding to a stage and is commonly applied to each page when reading the corresponding page at its respective time (sharing a wave form having a stepped pulse). It is also possible that other interpretations may exist for such an unusual and undefined phrase. It is not known if a single read voltage can have a plurality of stages or does a plurality of stages require a plurality of read voltages. If a single stage corresponds to a single read voltage, then “share at least one stage of read voltages” should be changed to “share at least one read voltage”. If each page is meant to refer to a logical page or bit position within a multibit per cell flash memory then maybe a stage of reading voltages is to refer to a set of read voltages but the claim does not make this definite due to the word “stage”. Claims 14-20 depend on claim 13. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Two examples of references using “a set of read voltages” to read a corresponding page in a multi-bit per cell flash memory: US 2021/0133025: see [0027] and claim 14, for example. US 20110235415: see [0008, 0010] and claim 1, for example. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY W RADKE whose telephone number is (571)270-1622. The examiner can normally be reached M-F 9-6 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JAY W. RADKE Primary Examiner Art Unit 2827 /JAY W. RADKE/Primary Examiner, Art Unit 2827
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Prosecution Timeline

Aug 06, 2024
Application Filed
May 06, 2026
Non-Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
94%
With Interview (+8.6%)
2y 0m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 836 resolved cases by this examiner. Grant probability derived from career allowance rate.

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