DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the Josephson junction unit [claim 1] and a Coplanar Waveguide-3-Step Step Impedance Resonator unit [claim 3] must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 7 is objected to because of the following informalities: lines 3-4, change “a Coplanar Waveguide-STEP Impedance Resonator (CPW-SIR) unit” to --said Coplanar Waveguide-STEP Impedance Resonator (CPW-SIR) unit-- in order to avoid a duplicant positive recitation since claim 7 depends from claim 1. Appropriate correction is required.
Claim 8 is objected to because of the following informalities: in line 3, change the limitation "the process" to --a process-- in order to avoid insufficient antecedent basis for this limitation in the claim. Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 7-10 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract idea without significantly more.
a)Regarding claim 7,
Step 1: Statutory Category?: Yes. The claim recites a method; therefore, it is a process.
Step 2A: Prong One: Prong one: Does the claim recite an abstract idea, law of nature or natural phenomenon?: Yes. The claim recites: “determining characteristic impedance of a transmission line of each step of a Coplanar Waveguide-Step Impedance Resonator (CPW-SIR) unit according to a preset accuracy, and taking the characteristic impedance as a characteristic impedance parameter; calculating characteristic impedance ratios among the characteristic impedances of all characteristic lines; determining a curve relationship between an electrical length of the characteristic line and a total electrical length at the characteristic impedance ratio, and the total electrical length is specifically a sum of the electrical lengths of all the characteristic lines; determining a minimum total electrical length interval of the total electrical length and an electrical length interval of the characteristic lines corresponding to the minimum total electrical length interval according to the curve relationship; and determining the electrical length corresponding to the preset accuracy within the electrical length interval of the characteristic line of each step, SO as to take the electrical length as an electrical length parameter of the transmission line of each step of the CPW-SIR unit.” These limitations, as drafted, is a process that, under the broadest reasonable interpretation, covers performance of the limitations in the mind which can be done by a human or with pen and paper.
Step 2A: Prong 2: Does the claim integrated into a practical application?: No. This judicial exception is not integrated into a practical application because nothing in the claim utilizes or implements the above abstract idea into any practical application. Nothing in the claim, for example, uses the “determining characteristic impedance of a transmission line of each step of a Coplanar Waveguide-Step Impedance Resonator (CPW-SIR) unit.”
Step 2B: Does the claim provides an inventive concept?: No. The claim(s) does not include any additional elements that are sufficient to amount to significantly more than the judicial exception.
Therefore, claim 7 is not eligible subject matter under 35 U.S.C. 101.
b)Regarding claim 8,
Claim 8 is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claim 8 depends on claim 7, which depends on claim 1, therefore, it has the abstract idea and also has the routine and conventional structure above said claims. In addition, claim 8 is further recites the limitations "calculating a characteristic impedance ratio between the characteristic impedance of the characteristic line of a second step and the characteristic impedance of the characteristic line of a first step.", which are/is simply more calculations/mental-steps, value numbers, extra solution activities routine and/or conventional structure(s) previously known to the pertinent industry. Furthermore, Claim 8 does not include additional elements that are sufficient to amount to significantly more than the judicial exception because these/this limitation(s) are/is simply routine and conventional structures previously known to the pertinent industry that serve to generate the data to be processed by implementing the idea on a computer, and/or recitation of generic computer structure and also serve to perform generic computer functions that are well- understood routine, and conventional activities previously known to the pertinent industry.
c)Regarding claim 9,
Claim 9 is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claim 9 depends on claim 8, which depends on claim 7, therefore, it has the abstract idea and also has the routine and conventional structure above said claims. In addition, claim 9 is further recites the limitations "determining a curve relationship between the characteristic line of the first step and the total electrical length at the characteristic impedance ratio.", which are/is simply more calculations/mental-steps, value numbers, extra solution activities routine and/or conventional structure(s) previously known to the pertinent industry. Furthermore, Claim 9 does not include additional elements that are sufficient to amount to significantly more than the judicial exception because these/this limitation(s) are/is simply routine and conventional structures previously known to the pertinent industry that serve to generate the data to be processed by implementing the idea on a computer, and/or recitation of generic computer structure and also serve to perform generic computer functions that are well- understood routine, and conventional activities previously known to the pertinent industry.
d)Regarding claim 10,
Claim 10 is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claim 10 depends on claim 9, which depends on claim 8, which depends from claim 7, therefore, it has the abstract idea and also has the routine and conventional structure above said claims. In addition, claim 10 is further recites the limitations " determining the electrical length corresponding to the preset accuracy within the electrical length interval of the characteristic line of the first step and taking the electrical length as a first-step electrical length parameter of the characteristic line of the first step; determining the total electrical length corresponding to the first-step electrical length parameter according to the curve relationship; and determining a second-step electrical length parameter of the characteristic line of the second step according to the total electrical length and the first-step electrical length parameter.", which are/is simply more calculations/mental-steps, value numbers, extra solution activities routine and/or conventional structure(s) previously known to the pertinent industry. Furthermore, Claim 10 does not include additional elements that are sufficient to amount to significantly more than the judicial exception because these/this limitation(s) are/is simply routine and conventional structures previously known to the pertinent industry that serve to generate the data to be processed by implementing the idea on a computer, and/or recitation of generic computer structure and also serve to perform generic computer functions that are well- understood routine, and conventional activities previously known to the pertinent industry.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 7-10 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
A)Regarding claim 7, the claim states: “…determining characteristic impedance of a transmission line of each step of a Coplanar Waveguide-Step Impedance Resonator (CPW-SIR) unit according to a preset accuracy, and taking the characteristic impedance as a characteristic impedance parameter; calculating characteristic impedance ratios among the characteristic impedances of all characteristic lines; determining a curve relationship between an electrical length of the characteristic line and a total electrical length at the characteristic impedance ratio, and the total electrical length is specifically a sum of the electrical lengths of all the characteristic lines; determining a minimum total electrical length interval of the total electrical length and an electrical length interval of the characteristic lines corresponding to the minimum total electrical length interval according to the curve relationship; and determining the electrical length corresponding to the preset accuracy within the electrical length interval of the characteristic line of each step, SO as to take the electrical length as an electrical length parameter of the transmission line of each step of the CPW-SIR unit.” The claim limitations above lack proper written description.
It is not clear from specification what is executing the above process. The Examiner respectfully notes that the original disclosure is silent on most of the manner in which the above noted claim features are implemented. While applicant may rely upon that which is well-known, applicant must provide some reasonable explanation to demonstrate the manner in which applicant is implementing each claim feature. Such an explanation may be as basic as merely identifying a well-known formula that was well-known to be used in the claimed manner, but when the disclosure is completely silent on the manner in which applicant implements a claim feature, a person of ordinary skill in the art would neither recognize the manner in which applicant intended to implement the claim feature, or even if applicant intended to rely upon that which is well-known or by a new process of feature.
B)Regarding claim 8, the claim states: “…the process of calculating characteristic impedance ratios among the characteristic impedances of all characteristic lines comprises: calculating a characteristic impedance ratio between the characteristic impedance of the characteristic line of a second step and the characteristic impedance of the characteristic line of a first step.” The claim limitations above lack proper written description.
It is not clear from specification what is executing the above process. The Examiner respectfully notes that the original disclosure is silent on most of the manner in which the above noted claim features are implemented. While applicant may rely upon that which is well-known, applicant must provide some reasonable explanation to demonstrate the manner in which applicant is implementing each claim feature. Such an explanation may be as basic as merely identifying a well-known formula that was well-known to be used in the claimed manner, but when the disclosure is completely silent on the manner in which applicant implements a claim feature, a person of ordinary skill in the art would neither recognize the manner in which applicant intended to implement the claim feature, or even if applicant intended to rely upon that which is well-known or by a new process of feature.
C)Regarding claim 9, the claim states: “…the process of determining a curve relationship between an electrical length of the characteristic line and a total electrical length at the characteristic impedance ratio comprises: determining a curve relationship between the characteristic line of the first step and the total electrical length at the characteristic impedance ratio.” The claim limitations above lack proper written description.
It is not clear from specification what is executing the above process. The Examiner respectfully notes that the original disclosure is silent on most of the manner in which the above noted claim features are implemented. While applicant may rely upon that which is well-known, applicant must provide some reasonable explanation to demonstrate the manner in which applicant is implementing each claim feature. Such an explanation may be as basic as merely identifying a well-known formula that was well-known to be used in the claimed manner, but when the disclosure is completely silent on the manner in which applicant implements a claim feature, a person of ordinary skill in the art would neither recognize the manner in which applicant intended to implement the claim feature, or even if applicant intended to rely upon that which is well-known or by a new process of feature.
D)Regarding claim 10, the claim states: “…the process of determining the electrical length corresponding to the preset accuracy within the electrical length interval of the characteristic line of each step comprises: determining the electrical length corresponding to the preset accuracy within the electrical length interval of the characteristic line of the first step and taking the electrical length as a first-step electrical length parameter of the characteristic line of the first step; determining the total electrical length corresponding to the first-step electrical length parameter according to the curve relationship; and determining a second-step electrical length parameter of the characteristic line of the second step according to the total electrical length and the first-step electrical length parameter.” The claim limitations above lack proper written description.
It is not clear from specification what is executing the above process. The Examiner respectfully notes that the original disclosure is silent on most of the manner in which the above noted claim features are implemented. While applicant may rely upon that which is well-known, applicant must provide some reasonable explanation to demonstrate the manner in which applicant is implementing each claim feature. Such an explanation may be as basic as merely identifying a well-known formula that was well-known to be used in the claimed manner, but when the disclosure is completely silent on the manner in which applicant implements a claim feature, a person of ordinary skill in the art would neither recognize the manner in which applicant intended to implement the claim feature, or even if applicant intended to rely upon that which is well-known or by a new process of feature.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Elsherbini et al (US 10,468,578) in view of Jin et al (CN 110378482B) [translation is being provided].
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Regarding claim 1, Elsherbini et al disclose [see Fig. 1] a superconducting quantum chip, comprising a chip substrate [not numbered but see col. 4, lines 8-38] and a quantum module (quantum circuit 100) formed on the chip substrate [see col. 4, lines 10-20], wherein the quantum module (100) comprises a bit capacitor unit (superconducting qubits 102 with circuit elements 106), a readout line unit (resonators 110) [see col. 8, lines 50-52], and a Josephson junction unit (Josephson junctions 104). However, the prior art does not specifically disclose the quantum module further comprises a Coplanar Waveguide-Step Impedance Resonator (CPW-SIR) unit. Jin et al disclose a superconducting quantum chip (superconducting quantum circuit), comprising a chip substrate (substrate) [see translation pg. 2 last 5 lines] and a quantum module (quantum bits) formed on the chip substrate, wherein the quantum module (quantum bits) comprises a bit capacitor unit, a readout line unit (readout transmission line) [see translation pg. 2 6th paragraph], quantum module (quantum bits) further comprises a Coplanar Waveguide-Step Impedance Resonator (CPW-SIR) unit (stepped impedance resonator) [see translation pg. 3, last paragraph – pg. 4 for details]. Further, Jin et al teaches that the addition of Coplanar Waveguide-Step Impedance Resonator (CPW-SIR) unit is advantageous because it help reduce the size of a chip and determine the electrical length parameter of a transmission line. It would have been obvious to a person having ordinary skill in the art at the time the invention was made to modify the apparatus of Elsherbini et al by adding Coplanar Waveguide-Step Impedance Resonator (CPW-SIR) unit as taught by Jin et al in order to reduce the size of a chip for manufacturing and promoting the development of superconducting quantum computing technology.
Regarding claim 2, Jin et al disclose wherein the CPW-SIR unit is specifically a Coplanar Waveguide-2-Step Step Impedance Resonator unit (stepped impedance resonator) [see translation pg. 3, last paragraph – pg. 4 for details].
Regarding claim 3, Jin et al disclose wherein the CPW-SIR unit is specifically a Coplanar Waveguide-3-Step Step Impedance Resonator unit (stepped impedance resonator) [see translation pg. 3, last paragraph – pg. 4 for details].
Regarding claim 4, Elsherbini et al in view of Jin et al disclose the bit capacitor unit. However, neither one discloses specifically a bit capacitor unit of a cross structure. It is well known to have different shapes for the bit capacitor unit where needed by a user [see MPEP 2144.04; In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966)]. It would have been obvious to a person having ordinary skill in the art at the time the invention was made to have the bit capacitor unit as a cross structure since it was held that that the configuration of the claimed bit capacitor unit was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.
Regarding claim 5, Elsherbini et al disclose wherein the readout line unit (readout transmission line) is specifically a transmission line of a coplanar waveguide structure [see co. 8, lines 33-45 and col. 9, lines 5-6].
Regarding claim 6, Jin et al disclose wherein the CPW-SIR unit (stepped impedance resonator) is specifically a λg/4 type CPW-SIR unit, and λg is a waveguide wavelength corresponding to a resonant frequency of the CPW-SIR unit [see translation pg. 2, 1st paragraph and pg. 3, last 2 lines – pg. 4, lines 1-5].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. PTO-892 for details.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JERMELE M HOLLINGTON whose telephone number is (571)272-1960. The examiner can normally be reached Mon-Fri 7:00am-3:30pm.
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/JERMELE M HOLLINGTON/Primary Examiner, Art Unit 2858