Prosecution Insights
Last updated: August 18, 2026
Application No. 18/796,830

SEMICONDUCTOR DEVICE AND PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE

Non-Final OA §102
Filed
Aug 07, 2024
Priority
Aug 31, 2023 — JP 2023-141123
Examiner
HENRY, CALEB E
Art Unit
Tech Center
Assignee
Sumitomo Electric Industries Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
1087 granted / 1253 resolved
+26.8% vs TC avg
Moderate +6% lift
Without
With
+6.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
37 currently pending
Career history
1288
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
55.4%
+15.4% vs TC avg
§102
34.5%
-5.5% vs TC avg
§112
6.0%
-34.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1253 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 8-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen (10964788) Regarding claim 8, Chen teaches an semiconductor device comprising: a nitride semiconductor layer (fig. 5: 108; Detailed Description par.18 teaches 108 can be composed of various semiconductor nitrides); a dielectric oxynitride film (fig. 5: 114; Detailed Description par. 19 teaches 114 can be SiON) on the nitride semiconductor layer; a first silicon nitride film (fig. 5: 116; Detailed Description par. 25 teaches 116 can be materials taught in Detailed Description par. 19, such as SiN) on the dielectric oxynitride film; a second silicon nitride film (fig. 5: 120; Detailed Description par. 28 teaches 120 SiN or SiON) on the first silicon nitride film; an opening formed in the second silicon nitride film and the first silicon nitride film, the opening reaching the dielectric oxynitride film (please see multiple openings which go through 116 and 120 to meet 114); and a gate electrode (fig. 5: 118, 118a and 118T) on the second silicon nitride film, the gate electrode being in contact with the dielectric oxynitride film through the opening. Regarding claim 9, Chen teaches an semiconductor device according to claim 8, wherein the first silicon nitride film has a lower hydrogen atom concentration than a hydrogen atom concentration of the second silicon nitride film (it is known in the art that SiN has a lower hydrogen atom content that SiON). Regarding claim 10, Chen teaches an semiconductor device according to claim 8, wherein the first silicon nitride film has a higher density than a density of the second silicon nitride film (SiN has a higher density than SiON). Allowable Subject Matter Claims 1-7 allowed. The following is an examiner’s statement of reasons for allowance: prior art fails to teach the temporal ordering of steps mentioned in claim 1, such as the dielectric oxide film having a higher relative permittivity than a relative permittivity of silicon dioxide; nitriding the dielectric oxide film to form a dielectric oxynitride film; forming a first silicon nitride film on the dielectric oxynitride film by a thermal film formation method; forming a second silicon nitride film on the first silicon nitride film; forming an opening in the second silicon nitride film and the first silicon nitride film, the opening reaching the dielectric oxynitride film. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CALEB E HENRY/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Aug 07, 2024
Application Filed
Aug 03, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12707812
DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME
3y 9m to grant Granted Aug 11, 2026
Patent 12707834
DISPLAY DEVICE AND MANUFACTURING METHOD OF THE SAME
3y 5m to grant Granted Aug 11, 2026
Patent 12707991
SEMICONDUCTOR DEVICE
3y 0m to grant Granted Aug 11, 2026
Patent 12701867
DISPLAY DEVICE
3y 1m to grant Granted Aug 04, 2026
Patent 12696637
Thin Film Transistor and Display Device Including the Same
3y 2m to grant Granted Jul 28, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
93%
With Interview (+6.1%)
2y 3m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1253 resolved cases by this examiner. Grant probability derived from career allowance rate.

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