Prosecution Insights
Last updated: October 02, 2026
Application No. 18/798,449

LIGHT-EMITTING DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY MODULE USING THE SAME

Non-Final OA §103
Filed
Aug 08, 2024
Priority
Dec 26, 2017 — provisional 62/610,426 +4 more
Examiner
CHOUDHRY, MOHAMMAD M
Art Unit
Tech Center
Assignee
Ennostar Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
589 granted / 718 resolved
+22.0% vs TC avg
Moderate +12% lift
Without
With
+12.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
25 currently pending
Career history
740
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
76.0%
+36.0% vs TC avg
§102
10.8%
-29.2% vs TC avg
§112
4.0%
-36.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 718 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objection Claims 17-18 are objected for their dependency on claim 1. Claims 17-18 are identical to claims 3-4 wherein claims 3-4 also depend on claim 1. Examiner assumes that it’s a typographical error and claims 17-18 meant to depend on claim 11. Appropriate corrections are required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1-2, 5, 7, and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Namiki et al. (US 2016/0204313, hereinafter Namiki). With respect to claim 1, Namiki discloses a method of transferring light-emitting element (Para 0121- LED is placed/transferred on the board), comprising: providing a carrier (18 of Fig. 4A) and a light-emitting element (40/31/4), wherein the carrier comprises an electrically conductive region (Para 0092-0093 – carrier 18 comprises of base layer 17 comprises of Ni ,wiring layer 11 and Au plating layer 13), the light-emitting element comprises a light-emitting unit (40) with a contact electrode (31), and a bump (4) connected to the contact electrode (Fig. 4A); providing a glue (23) on the electrically conductive region; aligning the bump of the light-emitting element to the electrically conductive region (4 is aligned with 17/11/13); and forming an electrical connection portion (connection portion comprises of 4 & 22 and 34) and curing the glue to form a protective portion (para 0054 & Fig. 4B); wherein the electrical connection portion comprises an upper portion (4 & 22) connected to the contact electrode (Fig. 4B – 4&22 is connected to 31) and a lower portion (34) connected to the electrically conductive region (34 is connected to layer 13), the upper portion and the lower portion comprise gold element (Para 0078; and 0091 – 4&22 comprises of Au ; Para 0058 &0060 - 34 comprises of AuSn). Namiki does not explicitly disclose that the upper portion has an atomic percentage of the gold element which is larger than that of the lower portion. However, Namiki discloses that the upper portion (4&22) comprises of Au and lower portion (34) comprises of AuSn which is obvious to one of an ordinary skilled in the art before the effective filing date of the claimed invention that the atomic percentage of gold is higher when the layer comprises of gold only vs when the layer comprises of AuSn) in order to achieve high electrical conductivity of a semiconductor device. With respect to claim 2, Namiki discloses wherein the protective portion surrounds the electrical connection portion (Fig. 4A & B – 23 surrounds 4 &22). With respect to claim 5, Namiki discloses wherein the bump contacts the glue during the aligning step (Fig. 4A-4B). With respect to claim 7, Namiki discloses wherein the electrically conductive region comprises a plurality of subregions, and the glue is continuously formed on the plurality of subregions (Para 0092-0093 – carrier 18 comprises of base layer 17 comprises of Ni ,wiring layer 11 and Au plating layer 13 – there are different parts and 23 is formed on those parts). With respect to claim 9, Namiki discloses wherein the protective portion comprises a thermosetting polymer (para 0022 and 0054). With respect to claim 10, Namiki discloses wherein the electrical connection portion comprises a hole (Fig. 4A - 4/22 defines a void in the opening). Claims 3-4 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Namiki in view of Ishizuka (US 2010/0319974, hereinafter Ishizuka). With respect to claims 3 and 17, Namiki discloses wherein the glue comprises electrically conductive particles (para 0098- 0099). Namiki does not explicitly disclose that the electrically conductive particles are melted into the lower portion in the step of forming the electrical connection portion. In an analogous art, Ishizuka discloses that the electrically conductive particles are melted into the lower portion in the step of forming the electrical connection portion (para 0059). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Nakimi’s method by having Ishizuka’s disclosure in order to improve the bonding properties of the adhesive paste. With respect to claims 4 and 18, Namiki discloses wherein in the step of forming the electrical connection portion, the bump passes through the protective portion to contact the lower portion of the electrical connection portion (Fig.4 B). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Namiki in view of Pendse et al. (US 2012/0273943, hereinafter Pendse). With respect to claim 6, Nakimi discloses the method of claim 1. Nakimi does not explicitly disclose wherein the step of forming the electrical connection portion comprises melting the bump. In an analogous art, Pendse discloses wherein the step of forming the electrical connection portion comprises melting the bump (para 0015 and 0025; melting the bump). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Nakimi’s method by having Pendse’s disclosure in order to improve the bonding properties of the electrical connections. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Namiki in view of Tsukamoto (EP 0615283, hereinafter Tsukamoto). With respect to claim 8, Nakimi discloses the method of claim 1. Namiki does not explicitly disclose wherein the electrical connection portion further comprises a neck portion between the upper portion and the lower portion, and the neck portion has a cross-sectional area which is smaller than those of the upper portion and the lower portion. In an analogous art, Tsukamoto discloses wherein the electrical connection portion further comprises a neck portion between the upper portion and the lower portion, and the neck portion has a cross-sectional area which is smaller than those of the upper portion and the lower portion (Fig.1, 2B & 4C). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Nakimi’s method by having Tsukamoto’s disclosure in order to improve the bonding properties of the electrical connections. Claim 11-14, 16 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Namiki in view of Chen et al. (US 2016/0351092, hereinafter Chen). With respect to claim 11, Namiki discloses a method comprising: providing a light-emitting module (para 0121- LED package) and a first light-emitting element (Fig. 4 – 40/31/4), wherein the light-emitting module comprises an electrically conductive region (Para 0092-0093 – carrier 18 comprises of base layer 17 comprises of Ni ,wiring layer 11 and Au plating layer 13), and the first light-emitting element comprises a light-emitting unit (40) with a contact electrode (31), and a bump (4) connected to the contact electrode (Fig. 4A); providing a glue (23) on the electrically conductive region; aligning the bump of the light-emitting element to the electrically conductive region (4 is aligned with 17/11/13); and forming an electrical connection portion (connection portion comprises of 22 & 34) and curing the glue to form a protective portion (para 0054 & Fig. 4B); wherein the electrical connection portion comprises an upper portion (22) connected to the contact electrode (Fig. 4B – 22 is connected to 31 via 4) and a lower portion (34) connected to the electrically conductive region (34 is connected to layer 13), the upper portion and the lower portion comprise gold element (Para 0078; and 0091 - 22 comprises of Au ; Para 0058 &0060 - 34 comprises of AuSn), and the upper portion has an atomic percentage of the gold element which is larger than that of the lower portion (the upper portion (22) comprises of Au and lower portion (34) comprises of AuSn – it’s obvious that the atomic percentage of gold is higher when the layer comprises of gold only vs when the layer comprises of AuSn) ). Namiki does not explicitly disclose that the method is for repairing the light emitting module and a second light-emitting element which fails to operate or meet a performance requirement. In an analogous art, Chen discloses that the method is for repairing the light emitting module and a second light-emitting element which fails to operate or meet a performance requirement (para 0040-0041 & 0051 – identifying a defective LED and repairing it). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Nakimi’s method by having Chen’s disclosure in order to address any failure happening in light emitting module by identifying and repairing the defective devices. With respect to claim 12, Namiki does not explicitly disclose wherein the light-emitting module comprises a first sub-pixel block and a second sub-pixel block, the first light-emitting element is located on the first sub-pixel block, and the second light-emitting element is located on the second sub-pixel block. In an analogous art, Chen discloses wherein the light-emitting module comprises a first sub-pixel block and a second sub-pixel block, the first light-emitting element is located on the first sub-pixel block, and the second light-emitting element is located on the second sub-pixel block (Para 0007 and 0025). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Nakimi’s method by having Chen’s disclosure in order to address any failure happening in light emitting module by identifying and repairing the defective devices. With respect to claim 13, Namiki discloses wherein the protective portion contacts a lower surface of the light-emitting unit (Fig. 4A – 23 contacts lower portion of 40/31/4). With respect to claim 14, Namiki discloses wherein the electrical connection portion comprises a hole (Fig. 4A - 4/22 defines a void in the opening). With respect to claim 16, Namiki discloses wherein the protective portion surrounds the electrical connection portion (Fig. 4A & B – 23 surrounds 4 &22). With respect to claim 19, Namiki discloses wherein the bump contacts the glue during the aligning step (Fig. 4A-4B). Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Namiki/Chen in view of Tsukamoto. With respect to claim 15, Nakimi/Chen discloses the method of claim 11. Namiki/Chen does not explicitly disclose wherein the electrical connection portion further comprises a neck portion between the upper portion and the lower portion, and the neck portion has a cross-sectional area which is smaller than those of the upper portion and the lower portion. In an analogous art, Tsukamoto discloses wherein the electrical connection portion further comprises a neck portion between the upper portion and the lower portion, and the neck portion has a cross-sectional area which is smaller than those of the upper portion and the lower portion (Fig.1, 2B & 4C). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Nakimi/Chen’s method by having Tsukamoto’s disclosure in order to improve the bonding properties of the electrical connections. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Namiki/Chen in view of Pendse. With respect to claim 20, Nakimi/Chen discloses the method of claim 11. Nakimi does not explicitly disclose wherein the step of forming the electrical connection portion comprises melting the bump. In an analogous art, Pendse discloses wherein the step of forming the electrical connection portion comprises melting the bump (para 0015 and 0025; melting the bump). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Nakimi/Chen’s method by having Pendse’s disclosure in order to improve the bonding properties of the electrical connections. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M CHOUDHRY whose telephone number is (571)270-5716. The examiner can normally be reached Monday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fairbanks Brent can be reached at 408-918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD M CHOUDHRY/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Aug 08, 2024
Application Filed
Sep 23, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
94%
With Interview (+12.0%)
2y 9m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 718 resolved cases by this examiner. Grant probability derived from career allowance rate.

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