Prosecution Insights
Last updated: October 04, 2026
Application No. 18/798,717

MICRO LED PIXEL AND MICRO LED ARRAY PANEL

Non-Final OA §102§103
Filed
Aug 08, 2024
Priority
Aug 10, 2023 — CN PCT/CN2023/112261
Examiner
FOX, BRANDON C
Art Unit
Tech Center
Assignee
Jade Bird Display (shanghai) Limited
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
703 granted / 821 resolved
+25.6% vs TC avg
Moderate +10% lift
Without
With
+10.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
22 currently pending
Career history
839
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
60.5%
+20.5% vs TC avg
§102
30.8%
-9.2% vs TC avg
§112
5.9%
-34.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 821 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This is a Non-Final office action based on application 18/798,717 filed August 8, 2024. Claims 1-29 are currently pending and have been considered below. Priority Acknowledgment is made of applicant's claim for foreign priority based on an application filed in China on August 10, 2023. It is noted, however, that applicant has not filed a certified copy of the CN2023112261 application as required by 37 CFR 1.55. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-6, 10, 23-27 & 29 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lu (Chinese Publication 116130503). Regarding claim 1, Lu discloses a micro LED pixel structure comprising: three light emitting mesas comprising a first light emitting mesa (Fig. 1, LED1), a second light emitting mesa (LED2), and a third light emitting mesa (LED3), wherein at least parts of at least two light emitting mesas of the three light emitting mesas are overlapped (Fig. 1-4), and at least part of the second light emitting mesa does not cover the first light emitting mesa or at least part of the third light emitting mesa does not cover the first light emitting mesa or the second light emitting mesa (Fig. 1-4), the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa do not contact with each other (Fig. 1-4). Regarding claim 2, Lu further discloses: the second light emitting mesa is provided above the first light emitting mesa and the third light emitting mesa is provided above the second light emitting mesa (Fig. 1); a part of the third light emitting mesa covers the second light emitting mesa, and the other part of the third light emitting mesa does not cover the second light emitting mesa or the first light emitting mesa (Fig. 1-4). Regarding claim 3, Lu further discloses: The LED mesas can be arranged wherein at least part of the second light emitting mesa covers at least part of the first light emitting mesa (Fig. 1-2). Regarding claim 4, Lu further discloses: The LED mesas can be arranged wherein the second light emitting mesa does not cover the first light emitting mesa (Fig. 3-4). Regarding claim 5, Lu further discloses: wherein each of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa has a symmetric structure, characterized by: a first vertical symmetrical plane along a length/x direction; a second vertical symmetrical plane along a width/y direction; and a vertical center line that is an intersection line of the first vertical symmetrical plane and the second vertical symmetrical plane (Fig. 2-4). Regarding claim 6, Lu further discloses: wherein the LED mesas can be aligned such that the vertical center line of the third light emitting mesa and the vertical center line of the second light emitting mesa are not aligned (Fig. 3-4). Regarding claim 10, Lu further discloses: an integrated circuit (IC) backplane (100), wherein a first bottom pad (P1a), a second bottom pad (P2b), and a third bottom pad (P3b) are separately provided on the IC backplane and configured to connect to bottom electrodes (E1/E2) of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa, respectively. Regarding claim 23, Lu further discloses: Lu discloses the stacking arrangement of the colors of the LED mesas can be adjusted to alter the luminous efficiency of the pixel (Paragraph [0051]). Lu also discloses the third LED (LED-3) is a red light emitting diode with poor light efficiency and is thereby has an increased area so as to reduce the difference in light efficiency between the red light LED and the other LED (Paragraph [0070]), therefore the first LED mesa can have a larger top surface area than the second or third LED mesa such as in a scenario where the first LED mesa is emits red light. Regarding claim 24 & 25, Lu further discloses: The LED mesas (LED1-3) can emit colors such as red, blue and green (Paragraph [0051]). Although Lu does not explicitly disclose the first LED mesa emits red light, Lu discloses the stacking arrangement of the colors of the LED mesas can be adjusted to alter the luminous efficiency of the pixel (Paragraph [0051]), therefore first LED mesa can emit red light, and either of the second LED mesa or third LED mesa can be blue or green light. Regarding claim 26, Lu further discloses: top surfaces of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa are rectangular (Fig. 2-4). Regarding claim 27, Lu discloses a micro LED array panel comprising: a plurality of micro LED pixels provided in an array including multiple pixel areas (Paragraph [0048]), wherein each LED pixel comprises: three light emitting mesas comprising a first light emitting mesa (Fig. 1, LED 1), a second light emitting mesa (LED 2), and a third light emitting mesa (LED 3), wherein at least parts of at least two light emitting mesas of the three light emitting mesas are overlapped (Fig. 1-4), and at least part of the second light emitting mesa does not cover the first light emitting mesa or at least part of the third light emitting mesa does not cover the first light emitting mesa or the second light emitting mesa (Fig. 1-4), the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa do not contact with each other (Fig. 1-4). Regarding claim 29, Lu discloses a micro LD array panel comprising: a plurality of micro LED pixels provided in an array including multiple pixel areas (Paragraph [0048]), wherein each LED pixel comprises: three light emitting mesas comprising a first light emitting mesa (Fig. 1, LED 1), a second light emitting mesa (LED 2), and a third light emitting mesa (LED 3), wherein at least parts of at least two light emitting mesas of the three light emitting mesas are overlapped (Fig. 1-4), and at least part of the second light emitting mesa does not cover the first light emitting mesa or at least part of the third light emitting mesa does not cover the first light emitting mesa or the second light emitting mesa (Fig. 1-4), the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa do not contact with each other (Fig. 1-4). The micro LED pixel further comprises an IC backplane (100) provide at a bottom of the micro LED pixel and the IC backplane of the LED pixels serves as an interconnected pixel array substrate (Paragraph [0048]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 11-13 & 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lu (Chinese Publication 116130503) in view of Li (US Patent 10,879,217). Regarding claim 11-13, Lu discloses all of the limitations of claim 1 (addressed above). Lu does not disclose a top electrode layer continuously formed over top surfaces of the LED mesas. However Li discloses a micro-LED structure comprising: A first micro LED (Fig. 3, 01), a second micro LED (02) and a third micro LED (03) wherein a top conductive layer (05) is continuously formed over the micro LEDs to connect the top electrodes of the micro LED to each other. Li further discloses the top conductive layer have sunken portions to connect to the micro LED respectively. PNG media_image1.png 331 710 media_image1.png Greyscale Li further discloses the top conductive layer is transparent (Col. 4, Lines 50-67). It would have been obvious to those having ordinary skill in the art at the time of invention to form a top conductive layer continuously formed over top surface of the LED mesas because it will serve to establish an electrical path between the micro LED and other integrated circuitry in the pixel array. Further although Li does not explicitly disclose the transparent top conductive layer has a light transmittance rate not less than 70% is would have been obvious to those having ordinary skill in the art at the time of invention to form the conductive layer having a transmittance of not less than 70% because it will prevent emit light from the being reflected or absorbed thereby allow for a high amount light to be emitted through the top conductive layer and improve light efficiency of the pixel. Regarding claim 28, Lu discloses a micro LED array panel comprising: a plurality of micro LED pixels provided in an array including multiple pixel areas (Paragraph [0048]), wherein each LED pixel comprises: three light emitting mesas comprising a first light emitting mesa (Fig. 1, LED 1), a second light emitting mesa (LED 2), and a third light emitting mesa (LED 3), wherein at least parts of at least two light emitting mesas of the three light emitting mesas are overlapped (Fig. 1-4), and at least part of the second light emitting mesa does not cover the first light emitting mesa or at least part of the third light emitting mesa does not cover the first light emitting mesa or the second light emitting mesa (Fig. 1-4), the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa do not contact with each other (Fig. 1-4). Lu does not disclose a top electrode layer continuously formed over top surfaces of the LED mesas. However Li discloses a micro-LED structure comprising: A first micro LED (Fig. 3, 01), a second micro LED (02) and a third micro LED (03) wherein a top conductive layer (05) is continuously formed over the micro LEDs to connect the top electrodes of the micro LED to each other. It would have been obvious to those having ordinary skill in the art at the time of invention to form a top conductive layer continuously formed over top surface of the LED mesas because it will serve to establish an electrical path between the micro LED and other integrated circuitry in the pixel array. Claim(s) 14-18, 20-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lu (Chinese Publication 116130503) in view of Li (US Patent 10,879,217) as applied to claim 11 above, and further in view of Xu (Pre-Grant Publication 2021/0384181). Regarding claim 14-18, Lu and Li disclose all of the limitations of claim 11 (addressed above). Neither reference disclose a top contacting structure on the top conductive layer or an optical isolation structure formed around the micro LED pixel. However Xu discloses a LED pixel unit comprising: A top conductive layer (Fig. 3b, 140) formed over a three stacked LED structures (112, 130, 136) and a top contacting structure (142/144) provided on top of the conductive layer and around a periphery of the stacked LED structure. Xu further discloses an optical isolation structure (346/348) formed around the stacked LED structure, wherein the optical isolation structure is a reflective metal (Paragraph [0026 & 0097]). It would have been obvious to those having ordinary skill in the art at the time of invention to form the top contacting structure provided on the top conductive layer because it will further establish a contact pad to form an electrical path to the top conductive layer wherein forming the top contacting structure in a periphery region will prevent emitted light from being blocked if the top contacting structure is not transparent. Further the optical isolation structure formed around the LED pixel will serve to prevent crosstalk between adjacent LED pixels and improve light emission efficiency (Paragraph [0026] & [0264]). Regarding claim 20-22, Lu further discloses: A dielectric material (PL2/PL3) filled in a space within the micro LED pixel, wherein the dielectric material is a transparent material selected from one of silicon oxide, silicon nitride, SiCN, SiNO, or Al2O3 (Paragraph [0050]). Allowable Subject Matter Claims 7-9 & 19 are allowed. The following is an examiner’s statement of reasons for allowance: Claim 7 is considered allowable because none of the prior art either alone or in combination discloses neither the first vertical symmetrical plane nor the second vertical symmetrical plane of the third light emitting mesa is co-planar with the first vertical symmetrical plane and the second vertical symmetrical plane of the second light emitting mesa. Claim 8 is also considered allowable based on its dependency from claim 7. Claim 9 is considered allowable because none of the prior art either alone or in combination discloses the first vertical symmetrical plane of the third light emitting mesa is co-planar with the first vertical symmetrical plane of the second light emitting mesa. Claim 19 is considered allowable because none of the prior art either alone or in combination discloses the optical isolation structure does not contact the top conductive layer, the first light emitting mesa, the second light emitting mesa, the third light emitting mesa, the bottom pads, or the IC backplane. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Liu (US Patent 12,588,324) discloses a package structure comprising a plurality of LED in a stacked arrangement wherein the LEDs can be configured to overlap in pre-determined arrangements. Xu (Pre-Grant Publication 2025/0056924) discloses a micro LED array panel comprising a plurality of micro LED vertically overlapping and in vertically staggered arrangement. Jang (US Patent 10,784,240) disclose a light emitting device with LED stacks comprising sub-unit of a first, second, and third sub pixel wherein certain sub pixel of a sub unit are electrically floating. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRANDON C FOX whose telephone number is (571)270-5016. The examiner can normally be reached M-F 9:00AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff W Natalini can be reached at 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRANDON C FOX/Examiner, Art Unit 2818 /DAVID VU/Primary Examiner, Art Unit 2818
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Prosecution Timeline

Aug 08, 2024
Application Filed
Aug 12, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
96%
With Interview (+10.1%)
2y 4m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 821 resolved cases by this examiner. Grant probability derived from career allowance rate.

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