Prosecution Insights
Last updated: August 18, 2026
Application No. 18/798,750

MICRO LED PIXEL AND MICRO LED ARRAY PANEL

Non-Final OA §102§103
Filed
Aug 08, 2024
Priority
Aug 10, 2023 — CN PCT/CN2023/112263
Examiner
WEGNER, AARON MICHAEL
Art Unit
Tech Center
Assignee
Jade Bird Display (shanghai) Limited
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
1y 5m
Est. Remaining
71%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
26 granted / 36 resolved
+12.2% vs TC avg
Minimal -1% lift
Without
With
+-1.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
44 currently pending
Career history
91
Total Applications
across all art units

Statute-Specific Performance

§103
56.0%
+16.0% vs TC avg
§102
22.6%
-17.4% vs TC avg
§112
17.5%
-22.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 36 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgement is made to claim of priority to PCT Application No. PCT/CN2023/112263, filed on August 10, 2023. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDS) submitted on August 8, 2024, November 25, 2024, August 5, 2025, and February 11, 2026 are being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-12, 15-17, 34-35 and 37 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chaji (WO 2020/170222 A1). With respect to claim 1, Chaji teaches in the embodiments of 8B and 8E: A micro LED pixel (para. [0141] “Here, different color microLEDs are used to explain the invention.”), comprising: a first light emitting mesa (microdevice 802); a second light emitting mesa (microdevice 804) provided above the first light emitting mesa; and a third light emitting mesa (microdevice 806) provided above the second light emitting mesa; wherein each of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa has a symmetric structure (see Fig. 8B or 8E), characterized by: a first vertical symmetrical plane along a length direction; a second vertical symmetrical plane along a width direction (planes annotated and labeled in annotated Fig. 8B and 8E below); and a vertical center line that is an intersection line of the first vertical symmetrical plane and the second vertical symmetrical plane; wherein neither the first vertical symmetrical plane nor the second vertical symmetrical plane of the first light emitting mesa is co-planar with the first vertical symmetrical plane and the second vertical symmetrical plane of the third light emitting mesa (all vertical symmetrical planes occur at different locations). PNG media_image1.png 837 965 media_image1.png Greyscale PNG media_image2.png 536 549 media_image2.png Greyscale With respect to claim 2, Chaji further teaches in Fig. 8E: wherein the first light emitting mesa (802) is not covered by any part of the third light emitting mesa (806). With respect to claim 3, Chaji further teaches in Fig. 8E: wherein the first light emitting mesa (802) is not covered by any part of the second light emitting mesa (804). With respect to claim 4, Chaji further teaches in Fig. 8B: wherein the vertical center line of the first light emitting mesa and the vertical center line of the second light emitting mesa are not aligned (vertical center lines occur at intersections of vertical symmetrical planes, all intersections are in different places, see Fig. 8B). With respect to claim 5, Chaji further teaches in Fig. 8B: wherein the vertical center line of the third light emitting mesa and the vertical center line of the second light emitting mesa are not aligned (vertical center lines occur at intersections of vertical symmetrical planes, all intersections are in different places, see Fig. 8B). With respect to claim 6, Chaji further teaches in Fig. 8B: wherein the vertical center line of the first light emitting mesa and the vertical center line of the third light emitting mesa are not aligned(vertical center lines occur at intersections of vertical symmetrical planes, all intersections are in different places, see Fig. 8B). With respect to claim 7, Chaji further teaches in Fig. 8B: wherein at least part of the first light emitting mesa is covered by the second light emitting mesa (see Fig. 8A-8B, 802 and 804 overlap). With respect to claim 8, Chaji further teaches in Fig. 8B: wherein at least part of the second light emitting mesa is covered by the third light emitting mesa (see Fig. 8A-8B, 804 and 806 overlap). With respect to claim 9, Chaji further teaches in Fig. 8B: wherein the first vertical symmetrical plane of the first light emitting mesa is not parallel to the first vertical symmetrical plane of the second light emitting mesa (see annotated Fig. 8B). With respect to claim 10, Chaji further teaches in Fig. 8B: wherein the first vertical symmetrical plane of the first light emitting mesa is perpendicular to the first vertical symmetrical plane of the second light emitting mesa (see annotated Fig. 8B). With respect to claim 11, Chaji further teaches in Fig. 8B: wherein the second vertical symmetrical plane of the first light emitting mesa is not parallel to the second vertical symmetrical plane of the second light emitting mesa (see annotated Fig. 8B). With respect to claim 12, Chaji further teaches in Fig. 8B: wherein the second vertical symmetrical plane of the first light emitting mesa is perpendicular to the second vertical symmetrical plane of the second light emitting mesa (see annotated Fig. 8B). With respect to claim 15, Chaji further teaches in Fig. 8B: wherein neither the first vertical symmetrical plane nor the second vertical symmetrical plane of the third light emitting mesa is co-planar with the first vertical symmetrical plane and the second vertical symmetrical plane of the second light emitting mesa (see annotated Fig. 8B). With respect to claim 16, Chaji further teaches in Fig. 8B: wherein the first vertical symmetrical plane of the third light emitting mesa is parallel to the first vertical symmetrical plane of the second light emitting mesa (see annotated Fig. 8B). With respect to claim 17, Chaji further teaches in Fig. 8B: wherein the first vertical symmetrical plane of the third light emitting mesa is co-planar with the first vertical symmetrical plane of the second light emitting mesa (see annotated Fig. 8B). With respect to claim 34, Chaji further teaches: wherein top surfaces of the first light emitting mesa (802), the second light emitting mesa (804), and the third light emitting mesa (806) are rectangular. (see Fig. 8B) With respect to claim 35, Chaji teaches: A micro LED array panel, comprising: a plurality of micro LED pixels provided in an array (para [0005] “an array of microdevices disposed on the substrate”), wherein the micro LED pixel comprises: (para. [0141] “Here, different color microLEDs are used to explain the invention.”), comprising: a first light emitting mesa (microdevice 802); a second light emitting mesa (microdevice 804) provided above the first light emitting mesa; and a third light emitting mesa (microdevice 806) provided above the second light emitting mesa; wherein each of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa has a symmetric structure (see Fig. 8B or 8E), characterized by: a first vertical symmetrical plane along a length direction; a second vertical symmetrical plane along a width direction (planes annotated and labeled in annotated Fig. 8B and 8E below); and a vertical center line that is an intersection line of the first vertical symmetrical plane and the second vertical symmetrical plane; wherein neither the first vertical symmetrical plane nor the second vertical symmetrical plane of the first light emitting mesa is co-planar with the first vertical symmetrical plane and the second vertical symmetrical plane of the third light emitting mesa (all vertical symmetrical planes occur at different locations). With respect to claim 37, Chaji teaches: A micro LED array panel, comprising: a plurality of micro LED pixels provided in an array (para [0005] “an array of microdevices disposed on the substrate”), wherein the micro LED pixel comprises: (para. [0141] “Here, different color microLEDs are used to explain the invention.”), comprising: a first light emitting mesa (microdevice 802); a second light emitting mesa (microdevice 804) provided above the first light emitting mesa; and a third light emitting mesa (microdevice 806) provided above the second light emitting mesa; wherein each of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa has a symmetric structure (see Fig. 8B or 8E), characterized by: a first vertical symmetrical plane along a length direction; a second vertical symmetrical plane along a width direction (planes annotated and labeled in annotated Fig. 8B and 8E below); and a vertical center line that is an intersection line of the first vertical symmetrical plane and the second vertical symmetrical plane; wherein neither the first vertical symmetrical plane nor the second vertical symmetrical plane of the first light emitting mesa is co-planar with the first vertical symmetrical plane and the second vertical symmetrical plane of the third light emitting mesa (all vertical symmetrical planes occur at different locations). and the micro LED pixel further comprises an integrated circuit (IC) backplane (system substrate 800) provided at bottom of the micro LED pixel, and respective IC backplane of the plurality of micro LED pixels are interconnected. (para. [0109], “each microdevice may be provided with a corresponding electrode to make a connection with the system substrate 800”) Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Chaji (WO 2020/170222 A1). With respect to claim 13, Chaji teaches all limitations of claim 1 upon which claim 13 depends. Chaji fails to teach: wherein the first vertical symmetrical plane of the first light emitting mesa is parallel to the first vertical symmetrical plane of the second light emitting mesa. Chaji differs from the claimed invention only in that the dimensions and orientations of the mesas in the length and width directions are different. “Where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device.” – Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984). It would have been an obvious matter of design choice to adjust the dimensions of the first and second mesa such that the length directions of the two mesas are parallel to each other, since such a modification would have involved a mere change in the size of component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). See MPEP 2144.04. With respect to claim 14, Chaji modified to meet the limitations of claim 13 also teaches: wherein the second vertical symmetrical plane of the first light emitting mesa is parallel to the second vertical symmetrical plane of the second light emitting mesa. Claims 18-25, 28-30 and 36 are rejected under 35 U.S.C. 103 as being unpatentable over Chaji (WO 2020/170222 A1) in view of Zhang (US 2021/0202616 A1). With respect to claim 18, Chaji teaches all limitations of claim 1 upon which claim 18 depends. Chaji further teaches: further comprising an integrated circuit (IC) backplane (system substrate 800), Chaji fails to teach: wherein a first bottom pad, a second bottom pad, and a third bottom pad are separately provided on the IC backplane and configured to connect to bottom electrodes of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa, respectively. Zhang teaches in Fig. 2A: wherein a first bottom pad, a second bottom pad, and a third bottom pad (see annotated Fig. 2A) are separately provided on the IC backplane (substrate 102) and configured to connect to bottom electrodes of the first light emitting mesa (141B), the second light emitting mesa (142R), and the third light emitting mesa (142G), respectively (see annotated Fig. 2A). Chaji discloses the claimed invention except for the pads provided on the backplane configured to connect to bottom electrodes. Zhang teaches that it is known to connect pads on the backplane to bottom electrodes of the light emitting mesas. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Chaji as taught by Zhang to include pads connected to bottom electrodes for the purpose of connecting the LEDs to a pixel driver (para. [0025] of Zhang). See MPEP 2144. PNG media_image3.png 406 757 media_image3.png Greyscale With respect to claim 19, Chaji further teaches: further comprising a top conductive layer (metallization 1704) configured to connect to top electrodes of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa (para. [0157] Each of the microdevices may be provided with contact pads or ohmic contacts 1710 over a surface of the microdevices.) Zhang teaches: further comprising a top conductive layer (common electrode 165) continuously formed over top surfaces of the first light emitting mesa (141B), the second light emitting mesa (142R), and the third light emitting mesa (142G), Chaji discloses the claimed invention except for top conductive layer being continuously formed over the top surfaces of the mesas. Zhang teaches that it is known to continually form a conductive layer over the top surfaces of the mesas. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Chaji as taught by Zhang to include a continuously formed conductive layer for the purpose of providing a common electrode to the tops of the LEDs. See MPEP 2144. With respect to claim 20, Chaji further teaches: wherein the top conductive layer comprises one or more sunken portions (openings in planarization layer) to connect to the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa, respectively. (see Fig. 17, “the planarization layer 1706 is patterned or etch backed to open a connection to the microdevices 108”). With respect to claim 21, Zhang further teaches: wherein the top conductive layer is transparent with a light transmittance rate not less than 70% (para. [0039] “the common electrode 165 could be a transparent electrode, such as indium tin oxide.”) With respect to claim 22, Zhang further teaches: further comprising a top contacting structure (metal pad 164 which is used as a contact for the top common electrode) provided on the top conductive layer (on the bottom side of 165)and configured to provide a contact for the top conductive layer (165) (para. [0039] “Note that the common electrode 165 is above all the strata, while the metal pad 164 is below all the strata. They are electrically connected by vias 163.”). With respect to claim 23, Zhang further teaches: wherein the top contacting structure is provided at a periphery of the micro LED pixel (see Fig. 5B). With respect to claim 24, Chaji further teaches: further comprising an optical isolation structure formed around the micro LED pixel. (para. [0202] “a reflective layer formed around the islands, in accordance with an embodiment of the invention. Here, a reflective layer 2346 can be formed around the islands to further reduce the viewing angle effect by directing the light from different layers to one surface.”) With respect to claim 25, Chaji further teaches: wherein the optical isolation structure is reflective. (para. [0202] “a reflective layer formed around the islands, in accordance with an embodiment of the invention. Here, a reflective layer 2346 can be formed around the islands to further reduce the viewing angle effect by directing the light from different layers to one surface.”) With respect to claim 28, Zhang further teaches: further comprising a dielectric material filled (fill materials 153 and 154) in a space within the micro LED pixel. Chaji/Zhang discloses the claimed invention except for the dielectric fill material. Zhang further teaches that it is known to include a dielectric fill material between the micro LEDs. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to further modify Chaji by Zhang in order to “provide electrical isolation between micro LEDs and vias, but also allows light produced by micro LEDs in lower strata to propagate through the stratum.” (para. [0027] of Zhang) See MPEP 2144. With respect to claim 29, Zhang further teaches: wherein the dielectric material is selected from one of silicon oxide, silicon nitride, SiCN, SiNO, or Al2O3. (para. [0027] “An example of fill material 153 is silicon dioxide, which is both non-conductive and transparent.”) With respect to claim 30, Zhang further teaches: wherein the dielectric material is transparent. (para. [0027] “An example of fill material 153 is silicon dioxide, which is both non-conductive and transparent.”) With respect to claim 36, Chaji teaches: A micro LED array panel, comprising: a plurality of micro LED pixels provided in an array (para [0005] “an array of microdevices disposed on the substrate”), wherein the micro LED pixel comprises: (para. [0141] “Here, different color microLEDs are used to explain the invention.”), comprising: a first light emitting mesa (microdevice 802); a second light emitting mesa (microdevice 804) provided above the first light emitting mesa; and a third light emitting mesa (microdevice 806) provided above the second light emitting mesa; wherein each of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa has a symmetric structure (see Fig. 8B or 8E), characterized by: a first vertical symmetrical plane along a length direction; a second vertical symmetrical plane along a width direction (planes annotated and labeled in annotated Fig. 8B and 8E below); and a vertical center line that is an intersection line of the first vertical symmetrical plane and the second vertical symmetrical plane; wherein neither the first vertical symmetrical plane nor the second vertical symmetrical plane of the first light emitting mesa is co-planar with the first vertical symmetrical plane and the second vertical symmetrical plane of the third light emitting mesa (all vertical symmetrical planes occur at different locations). Chaji fails to teach: and the micro LED pixel further comprises a top conductive layer continuously formed on top surfaces of the first light emitting mesa, the second light emitting mesa, and the third light emitting mesa, and respective top conductive layers of the plurality of micro LED pixels are interconnected. Zhang teaches in Fig. 2A: and the micro LED pixel further comprises further comprising a top conductive layer (common electrode 165) continuously formed over top surfaces of the first light emitting mesa (141B), the second light emitting mesa (142R), and the third light emitting mesa (142G), and respective top conductive layers of the plurality of micro LED pixels are interconnected. Chaji discloses the claimed invention except for top conductive layer being continuously formed over the top surfaces of the mesas. Zhang teaches that it is known to continually form a conductive layer over the top surfaces of the mesas. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Chaji as taught by Zhang to include a continuously formed conductive layer for the purpose of providing a common electrode to the tops of the LEDs. See MPEP 2144. Claims 26-27 are rejected under 35 U.S.C. 103 as being unpatentable over Chaji (WO 2020/170222 A1) and Zhang (US 2021/0202616 A1) as applied to claim 25 above and further in view of Chen (US 2022/0246670 A1). With respect to claim 26, Chaji/Zhang teaches all limitations of claim 25 upon which claim 26 depends. Chaji/Zhang does not teach: wherein a material of the optical isolation structure is metal. Chen teaches in Fig. 9: wherein a material of the optical isolation structure (portion of tungsten plug 906 labeled as isolation structure in annotated Fig. 9 below) is metal (tungsten). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use a metal as the optical isolation material, since it has been held to be within the general skill of worker in the art to select known material on the basis of its suitability for the intended use as a matter of obvious design variation and choice. In re Leshin, 125 USPQ 416. With respect to claim 27, Chen further teaches: wherein the optical isolation structure (portion of tungsten plug 906 labeled as isolation structure in annotated Fig. 9 below) does not contact the top conductive layer, the first light emitting mesa, the second light emitting mesa, the third light emitting mesa, the bottom pads, or the IC backplane (plug in the isolation trench is disconnected from other components and suspended in the dielectric layer). Chaji/Zhang discloses the claimed invention except for the isolation structure not touching the upper conductive structure or backplane. Chen teaches that it is known to have an isolation structure that is embedded in the dielectric and not in contact with other components. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Chaji/Zhang, as taught by Chen in order to prevent optical cross talk while ensuring electrical continuity among the micro-LEDs. See MPEP 2144. PNG media_image4.png 601 617 media_image4.png Greyscale Claims 31-32 are rejected under 35 U.S.C. 103 as being unpatentable over Chaji (WO 2020/170222 A1) in view of Xu (US 2021/0384181 A1). With respect to claim 31, Chaji fails to teach: wherein an area of a top surface of the first light emitting mesa is greater than an area of a top surface of the second light emitting mesa and greater than an area of a top surface of the third light emitting mesa. Xu teaches: wherein an area of a top surface of the first light emitting mesa is greater than an area of a top surface of the second light emitting mesa and greater than an area of a top surface of the third light emitting mesa (para. [0241] “In some embodiments, the lateral dimension of the bottom LED structure, for example, the red LED structure, can be the longest, and the lateral dimension of the top LED structure, for example, the blue LED structure, can be the shortest”.) Chaji discloses the claimed invention except for the areas of the surfaces of the light emitting areas. Xu teaches that it is known to construct a stacked LED in which the lowest LED is the largest and highest LED is the smallest. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Chaji to make the first mesa largest and third mesa smallest, since Xu states in para. [0241] that such a modification would improve electronic connections and simplify the fabrication process by exposing more portions of the LEDs. See MPEP 2144. With respect to claim 32, Chaji fails to teach: wherein the first light emitting mesa is configured to emit red light, the second light emitting mesa is configured to emit green light, and the third light emitting mesa is configured to emit blue light. Xu teaches: wherein the first light emitting mesa (112) is configured to emit red light , the second light emitting mesa (130) is configured to emit green light, and the third light emitting mesa (136) is configured to emit blue light. (para. [0188] “three LED structures including LED light emitting layers 112, 130, and 136, respectively, are formed in a stacked structure, for example, a green LED light emitting layer 130 is formed on top of a red LED light emitting layer 112, and a blue LED light emitting layer 136 is formed on top of the green LED light emitting layer 130.”) Chaji discloses the claimed invention except for the colors of the light emitting mesas. Xu teaches that it is known to construct a stacked LED with red, green, and blue light emitting areas. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Chaji use the colors of light emitting mesas as claimed for the purpose of creating a tri-color LED device that can emit a range of colors. See MPEP 2144. Claim 33 are rejected under 35 U.S.C. 103 as being unpatentable over Chaji (WO 2020/170222 A1) in view of Lamkin (US 2019/0103444 A1). With respect to claim 33, Chaji fails to teach: wherein the first light emitting mesa is configured to emit red light, the second light emitting mesa is configured to emit blue light, and the third light emitting mesa is configured to emit green light. Lamkin teaches: wherein the first light emitting mesa (subpixel 110A) is configured to emit red light, the second light emitting mesa (subpixel 110B) is configured to emit blue light (para. [0046] embodiments may include any other order of red, green, and blue subpixels 110 (e.g., RBG, GRB, GBR, BRG, or BGR).”), and the third light emitting mesa (110C) is configured to emit blue light. (para. [0046] embodiments may include any other order of red, green, and blue subpixels 110 (e.g., RBG, GRB, GBR, BRG, or BGR).) Chaji discloses the claimed invention except for the colors of the light emitting mesas. Lamkin teaches that it is known to construct a stacked LED with red, green, and blue light emitting areas overlapping. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Chaji use the colors of light emitting mesas as claimed for the purpose of creating a multicolor LED in which each pixel takes up less space (para. [0041]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AARON MICHAEL WEGNER whose telephone number is (571)270-7647. The examiner can normally be reached Mon-Fri 8:30 AM - 5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A.M.W./Examiner, Art Unit 2897 /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Aug 08, 2024
Application Filed
Jul 22, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
72%
Grant Probability
71%
With Interview (-1.3%)
3y 6m (~1y 5m remaining)
Median Time to Grant
Low
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