Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Examiner cites particular columns or paragraphs, and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
In reply to the Non-Final Office Action mailed on 1/14/2026, the applicant has filed a response on 4/13/2026, amending claims 1-2 and 19-20. No claim has been added or cancelled. Claims 1-20 are pending in this application.
Previous claim objections are withdrawn in view of applicant’s amendments filed on 4/13/2026.
Election/Restrictions
Claim 1 is allowable. The restriction requirement between species, as set forth in the Office action mailed on 10/30/2025, has been reconsidered in view of the allowability of claims to the elected invention pursuant to MPEP § 821.04(a). The restriction requirement is hereby withdrawn as to any claim that requires all the limitations of an allowable claim. Specifically, the restriction requirement of 10/30/2025 is partially withdrawn. Claims 7-10, directed to Species A, C, D and/or F no longer withdrawn from consideration because the claim(s) requires all the limitations of an allowable claim. However, claim 17, directed to Species A, D and F remains withdrawn from consideration because it does not require all the limitations of an allowable claim.
In view of the above noted withdrawal of the restriction requirement, applicant is advised that if any claim presented in a divisional application is anticipated by, or includes all the limitations of, a claim that is allowable in the present application, such claim may be subject to provisional statutory and/or nonstatutory double patenting rejections over the claims of the instant application.
Once a restriction requirement is withdrawn, the provisions of 35 U.S.C. 121 are no longer applicable. See In re Ziegler, 443 F.2d 1211, 1215, 170 USPQ 129, 131-32 (CCPA 1971). See also MPEP § 804.01.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 12 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xiang et al. (US 2017/0301286).
Regarding claim 12, Xiang discloses a display device (see device 600 in Fig. 6; para[0076]) comprising:
a data driver outputting data to k output lines (regarding Fig. 6, note that since “the organic light-emitting display device 600 comprises the organic light-emitting display panel of the… embodiments”, it is clear that it necessarily comprises “known structures” such as a data driver that outputs data signals to the plurality of sub-pixel circuits in Figs. 3B and 4A-4B through data voltage signal lines Vdata; see e.g. three data voltage signal lines Vdata in Fig. 3B; para[0076]; for clarification, see para[0007] of Shin et al. (US 2006/0001617) which states an “OLED display requires a scan driver for driving scan lines and a data driver for driving data lines”, as evidentiary support);
a scan driver outputting a scan signal to m first scan lines and m second scan lines (see e.g. scan driver 510 in Fig. 5A, necessarily included in the organic light-emitting display device 600 of Fig. 6, to output control signals to first control signal lines S11 to SM1 and second control signal lines S12 to SM2, or first control signal lines S11 to Sn1 and second control signal lines S12 to Sn2 in Fig. 3B, that is, to e.g. four first control signal lines and to e.g. four second control signal lines; para[0070]; para[0076]; for clarification, see para[0007] of Shin et al. (US 2006/0001617) which states an “OLED display requires a scan driver for driving scan lines and a data driver for driving data lines”, as evidentiary support); and
a pixel unit connected to the k output lines, first scan lines, and second scan lines (see e.g. pixel unit in Fig. 3B connected to three data voltage signal lines Vdata, first control signal lines S11 to Sn1 and second control signal lines S12 to Sn2), wherein the pixel unit comprises:
a plurality of sub-pixel circuits disposed in a matrix form including m rows and 2k columns (see sub-pixel circuits in Figs. 4A and 4B disposed in a matrix including e.g. four rows and six columns, as shown e.g. in Fig. 3B),
a plurality of light emitting elements respectively connected to the plurality of sub-pixel circuits (see light-emitting diodes OL in Figs. 4A and 4B),
wherein an h-th output line among the k output lines is commonly connected to sub-pixel circuits positioned in a (2h-1)-th column and a 2h-th column among the plurality of sub-pixel circuits (see in Fig. 3B “the pixel driving circuits in any pixel column of the pixel array and a pixel column adjacent to the pixel column share one data voltage signal line“; para[0057]),
an i-th first scan line among the first scan lines is connected to first sub-pixel circuits among sub-pixel circuits positioned in an i-th row (see in Fig. 3B each of first control signal lines S11 to Sn1 is connected to first sub-pixel circuits of a corresponding row),
an i-th second scan line among the second scan lines is connected to second subpixel circuits among the sub-pixel circuits positioned in the i-th row (see in Fig. 3B each of second control signal lines S12 to Sn2 is connected to second sub-pixel circuits of the corresponding row), wherein the first sub-pixel circuits and the second sub-pixel circuits are alternately disposed in the i-th row (see in Fig. 3B, the first sub-pixel circuits and the second sub-pixel circuits are alternately disposed in the corresponding row), and
m and n are integers greater than or equal to 2 (see in Fig. 3B m and n are e.g. 4), k is an integer greater than or equal to 1 (see in Fig. 3B k is e.g. 3), h is an integer greater than 0 and less than or equal to k (see in Fig. 3B h is e.g. an integer greater than 0 and less than or equal to e.g. 3), and i is an integer greater than 0 and less than or equal to m (see in Fig. 3B i is e.g. an integer greater than 0 and less than or equal to e.g. 4).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 13-16 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Xiang et al. (US 2017/0301286), in view of Tian et al. (US 2024/0298494).
Regarding claim 13, Xiang discloses all the claim limitations as applied above (see claim 12). In addition, Xiang discloses the data driver is configured to apply the data signal during a plurality of horizontal periods to sub-pixel circuits connected to each of at least one output line among the k output lines (regarding Figs. 3B, 4B and 8, during period T12 included in period T11+T12, data signal is provided through each corresponding data voltage signal line Vdata (e.g., the data voltage signal line Vdata[i]/Vdata[i+1] in FIG. 4B) to first sub-pixel circuit 440 of a selected row, and during period T14 of period T13+T14, the data signal is provided through each corresponding data voltage signal line Vdata (e.g., the data voltage signal line Vdata[i]/Vdata[i+1] in FIG. 4B) to second sub-pixel circuit 430 of the selected row; para[0067]-para[0068]; para[0088]-para[0091]). However, Xiang does not appear to expressly disclose applying the data signal corresponding to a same color to sub-pixel circuits connected to each of at least one output line among the k output lines.
Tian discloses applying a data signal corresponding to a same color to sub-pixel circuits connected to each of at least one output line among k output lines (“The pixel driving circuitries in a same column are electrically coupled to a same data line, the data line is configured to provide a data voltage corresponding to a same color, and the pixel driving circuitries electrically coupled to the same data line correspond to the color”; see e.g. in Fig. 18, each data line D is provided with and applies a data signal of a corresponding color to corresponding pixel driving circuits P connected to each data line D; para[0042]; para[0073]-para[0075]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings in Xiang’s invention, with the teachings in Tian’s invention, to apply the data signal corresponding to a same color during a plurality of horizontal periods to sub-pixel circuits connected to each of at least one output line among the k output lines, for the advantage of a configuration that provides a consistent drive voltage, and reduces power consumption (para[0043]).
Regarding claim 14, Xiang and Tian disclose all the claim limitations as applied above (see claim 13). In addition, Xiang discloses the plurality of light emitting elements are formed on the plurality of sub-pixel circuits (see light-emitting diodes OL formed on the sub-pixel circuits in Figs. 4A and 4B).
In addition, Tian discloses an anode electrode connecting a light emitting element among a plurality of light emitting elements and a corresponding sub-pixel circuit is disposed on a sub-pixel circuit of the plurality of sub-pixel circuits that is not connected to the light emitting element (see in Figs. 10-11, the claimed anode comprising e.g. B13 and L2, connecting from the third column to the first column a corresponding blue light-emission element to a corresponding pixel driving circuitry, is disposed on a pixel driving circuitry of the plurality of pixel driving circuitries that is not connected to the blue light-emission element, e.g. disposed on the pixel driving circuitry corresponding to G12; para[0042]; para[0046]; para[0061]-para[0063]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to have an anode electrode connecting a light emitting element among the plurality of light emitting elements and a corresponding sub-pixel circuit is disposed on a sub-pixel circuit of the plurality of sub-pixel circuits that is not connected to the light emitting element, as also taught by Tian, for the advantage of using a conventional light-emission elements arrangement in a configuration that simultaneously provides a consistent drive voltage, and reduces power consumption (para[0003]; para[0043]).
Regarding claim 15, Xiang and Tian disclose all the claim limitations as applied above (see claim 13). In addition, Xiang discloses the data driver is configured to apply the data signal during a plurality of horizontal periods to sub-pixel circuits connected to each of the k output lines (regarding Figs. 3B, 4B and 8, during period T12 included in period T11+T12, data signal is provided through each corresponding data voltage signal line Vdata (e.g., the data voltage signal line Vdata[i]/Vdata[i+1] in FIG. 4B) to first sub-pixel circuit 440 of a selected row, and during period T14 of period T13+T14, the data signal is provided through each corresponding data voltage signal line Vdata (e.g., the data voltage signal line Vdata[i]/Vdata[i+1] in FIG. 4B) to second sub-pixel circuit 430 of the selected row; para[0067]-para[0068]; para[0088]-para[0091]).
In addition, Tian discloses applying the data signal corresponding to the same color to sub-pixel circuits connected to each of the k output lines (“The pixel driving circuitries in a same column are electrically coupled to a same data line, the data line is configured to provide a data voltage corresponding to a same color, and the pixel driving circuitries electrically coupled to the same data line correspond to the color”; see e.g. in Fig. 18, each data line D is provided with and applies a data signal of a corresponding color to corresponding pixel driving circuits P connected to each data line D; para[0042]; para[0073]-para[0075]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to apply the data signal corresponding to the same color during a plurality of horizontal periods to sub-pixel circuits connected to each of the k output lines, for the advantage of a configuration that further provides a consistent drive voltage, and reduces power consumption (para[0043]).
Regarding claim 16, Xiang and Tian disclose all the claim limitations as applied above (see claim 15). In addition, Xiang discloses the plurality of light emitting elements are formed on the plurality of sub-pixel circuits (see light-emitting diodes OL formed on the sub-pixel circuits in Figs. 4A and 4B).
In addition, Tian discloses an anode electrode connecting a light emitting element among the plurality of light emitting elements and a corresponding sub-pixel circuit is disposed on at least two sub-pixel circuits of the plurality of sub-pixel circuits that are not connected to the light emitting element (see in Figs. 10-11, the claimed anode comprising e.g. B13 and L2, connecting from the third column to the first column a corresponding blue light-emission element to a corresponding pixel driving circuitry, is disposed on at least two sub-pixel driving circuitries of the plurality of pixel driving circuitries that are not connected to the blue light-emission element, e.g. disposed on the pixel driving circuitry corresponding to G12 and on the pixel driving circuitry below G12; para[0042]; para[0046]; para[0061]-para[0063]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to have an anode electrode connecting a light emitting element among the plurality of light emitting elements and a corresponding sub-pixel circuit is disposed on at least two sub-pixel circuits of the plurality of sub-pixel circuits that are not connected to the light emitting element, as also taught by Tian, for the advantage of using a conventional light-emission elements arrangement in a configuration that simultaneously provides a consistent drive voltage, and reduces power consumption (para[0003]; para[0043]).
Regarding claim 18, Xiang discloses all the claim limitations as applied above (see claim 12). However, Xiang does not appear to expressly disclose the plurality of light emitting elements are disposed in one of an RGBG structure or RGB stripe structure.
Tian discloses a plurality of light emitting elements are disposed in one of an RGBG structure or an RGB stripe structure (para[0073]; see a plurality of light emitting elements are disposed in an RGBG structure).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings in Xiang’s invention, with the teachings in Tian’s invention, to have the plurality of light emitting elements are disposed in one of an RGBG structure or an RGB stripe structure, for the advantage of using a conventional light-emission elements arrangement while simultaneously providing a consistent drive voltage, and reducing power consumption (para[0003]; para[0043]).
Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Xiang et al. (US 2017/0301286), in view of Shin (US 2005/0270257).
Regarding claim 19, Xiang discloses a display device (see device 600 in Fig. 6; para[0076]) comprising:
a plurality of sub-pixel circuits disposed in a matrix form including a plurality of rows and a plurality of columns (see sub-pixel circuits in Figs. 4A and 4B disposed in a matrix as shown e.g. in Fig. 3B);
a plurality of light emitting elements respectively connected to the plurality of sub-pixel circuits (see light-emitting diodes OL in Figs. 4A and 4B);
a data driver outputting a data signal to the plurality of sub-pixel circuits through a plurality of output lines (regarding Fig. 6, note that since “the organic light-emitting display device 600 comprises the organic light-emitting display panel of the… embodiments”, it is clear that it necessarily comprises “known structures” such as a data driver that outputs data signals to the plurality of sub-pixel circuits in Figs. 3B and 4A-4B through data voltage signal lines Vdata; para[0076]; for clarification, see para[0007] of Shin et al. (US 2006/0001617) which states an “OLED display requires a scan driver for driving scan lines and a data driver for driving data lines”, as evidentiary support); and
a scan driver outputting a scan signal to the plurality of sub-pixel circuits through a plurality of first scan lines and a plurality of second scan lines[[;]] (see e.g. scan driver 510 in Fig. 5A, necessarily included in the organic light-emitting display device 600 of Fig. 6, to output control signals to first control signal lines S11 to SM1 and second control signal lines S12 to SM2, or first control signal lines S11 to Sn1 and second control signal lines S12 to Sn2 in Fig. 3B; para[0070]; para[0076]; for clarification, see para[0007] of Shin et al. (US 2006/0001617) which states an “OLED display requires a scan driver for driving scan lines and a data driver for driving data lines”, as evidentiary support),
wherein each output line among the plurality of output lines is commonly connected to sub-pixel circuits of the plurality of sub-pixel circuits positioned in adjacent columns among the plurality of columns (see in Fig. 3B “the pixel driving circuits in any pixel column of the pixel array and a pixel column adjacent to the pixel column share one data voltage signal line“; para[0057]),
each of the plurality of first scan lines is connected to first sub-pixel circuits of a see in Fig. 3B each of first control signal lines S11 to Sn1 is connected to first sub-pixel circuits of a row), and
each of the plurality of second scan lines is connected to second sub-pixel circuits of the row among the plurality of sub-pixel circuits (see in Fig. 3B each of second control signal lines S12 to Sn2 is connected to second sub-pixel circuits of the row), wherein the first sub-pixel circuits and the second sub-pixel circuits are alternately disposed in the see in Fig. 3B, the first sub-pixel circuits and the second sub-pixel circuits are alternately disposed in the row)
However, Xiang does not appear to expressly disclose the data driver outputting the data signal to the plurality of sub-pixel circuits through the plurality of output lines directly connected between the data driver and the plurality of sub-pixel circuits.
Shin discloses a display device comprising a data driver outputting a data signal to a plurality of sub-pixel circuits through a plurality of output lines directly connected between the data driver and the plurality of sub-pixel circuits (para[0024]-para[0025]; para[0031]; see in Fig. 1 an organic electroluminescent display device comprising data driver 13 outputting a data signal to sub-pixels 14 through lines DATA directly connected between the data driver 13 and the sub-pixels 14).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings in Xiang’s invention, with the teachings in Shin’s invention, to have the data driver outputting the data signal to the plurality of sub-pixel circuits through the plurality of output lines directly connected between the data driver and the plurality of sub-pixel circuits, for the advantage of using a proven conventional way of applying data signals to sub-pixels (see para[0024]-para[0025] and para[0028] for evidentiary support).
Regarding claim 20, Xiang and Shin disclose all the claim limitations as applied above (see claim 19). In addition, Xiang discloses an anode electrode connecting a light emitting element among the plurality of light emitting elements and a corresponding sub-pixel circuit (see an anode of a light-emitting diode OL connecting the light-emitting diode OL and corresponding sub-pixel circuit, as shown in Figs. 4A and 4B disposed in a matrix, as shown e.g. in Fig. 3B) .
Allowable Subject Matter
Claims 1-11 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 1, the prior art, taken alone or in combination, fails to teach or suggest the following limitations in combination with the rest of the claim, that is, the claim as a whole: “A display device comprising: a data driver configured to output a data signal having a horizontal period; a scan driver configured to output a scan signal; a plurality of sub-pixel circuits disposed in a matrix form including a plurality of rows and a plurality of columns, wherein the horizontal period corresponds to a selected row among the plurality of rows; a plurality of light emitting elements respectively connected to the plurality of sub-pixel circuits; a plurality of output lines configured to carry the data signal to the plurality of sub-pixel circuits; and a plurality of first scan lines and a plurality of second scan lines configured to carry the scan signal to the plurality of sub-pixel circuits, wherein each of the plurality of output lines is commonly connected to sub-pixel circuits, among the plurality of sub-pixel circuits, disposed in different columns among the plurality of columns, each of the plurality of first scan lines is connected to first sub-pixel circuits of a corresponding row among the plurality of sub-pixel circuits, wherein the scan driver is configured to generate, for each of the plurality of first scan lines, the scan signal having an active level in a first period of the horizontal period and an inactive level in a second period of the horizontal period different from the first period of the horizontal period, and each of the plurality of second scan lines is connected to second sub-pixel circuits of a corresponding row among the plurality of sub-pixel circuits, wherein the scan driver is configured to generate, for each of the plurality of second scan lines, the scan signal having the inactive level in the first period of the horizontal period and the active level in the second period of the horizontal period, and wherein the first sub-pixel circuits and the second sub-pixel circuits are alternately disposed in the corresponding row”, as claimed in claim 1.
Regarding claims 2-11, these claims are allowed based on their dependence from claim 1.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant's arguments filed on 4/13/2026 have been fully considered but they are not persuasive.
Regarding claim 12, the applicant argues on pages 12-14 of the remarks that “Xiang fails to teach "a data driver outputting data to k output lines; a scan driver outputting a scan signal to m first scan lines and m second scan lines; and a pixel unit connected to the k output lines, first scan lines, and second scan lines, wherein the pixel unit comprises: a plurality of sub-pixel circuits disposed in a matrix form including m rows and 2k columns" as claimed”. The examiner respectfully disagrees. As shown in the above rejection, Xiang discloses a data driver outputting data to k output lines (regarding Fig. 6, note that since “the organic light-emitting display device 600 comprises the organic light-emitting display panel of the… embodiments”, it is clear that it necessarily comprises “known structures” such as a data driver that outputs data signals to the plurality of sub-pixel circuits in Figs. 3B and 4A-4B through data voltage signal lines Vdata; see e.g. three data voltage signal lines Vdata in Fig. 3B; para[0076]; for clarification, see para[0007] of Shin et al. (US 2006/ 0001617) which states an “OLED display requires a scan driver for driving scan lines and a data driver for driving data lines”, as evidentiary support); a scan driver outputting a scan signal to m first scan lines and m second scan lines (see e.g. scan driver 510 in Fig. 5A, necessarily included in the organic light-emitting display device 600 of Fig. 6, to output control signals to first control signal lines S11 to SM1 and second control signal lines S12 to SM2, or first control signal lines S11 to Sn1 and second control signal lines S12 to Sn2 in Fig. 3B, that is, to e.g. four first control signal lines and to e.g. four second control signal lines; para[0070]; para[0076]; for clarification, see para[0007] of Shin et al. (US 2006/0001617) which states an “OLED display requires a scan driver for driving scan lines and a data driver for driving data lines”, as evidentiary support); and a pixel unit connected to the k output lines, first scan lines, and second scan lines (see e.g. pixel unit in Fig. 3B connected to three data voltage signal lines Vdata, first control signal lines S11 to Sn1 and second control signal lines S12 to Sn2), wherein the pixel unit comprises: a plurality of sub-pixel circuits disposed in a matrix form including m rows and 2k columns (see sub-pixel circuits in Figs. 4A and 4B disposed in a matrix including e.g. four rows and six columns, as shown e.g. in Fig. 3B).
Regarding claim 19, the applicant argues on pages 14-16 of the remarks that “nothing in the cited art teaches or suggests "a data driver outputting a data signal to the plurality of sub-pixel circuits through a plurality of output lines directly connected between the data driver and the plurality of sub-pixel circuits" as claimed in Claim 19”. It is noted that newly added limitation of “a data driver outputting the data signal to the plurality of sub-pixel circuits through a plurality of output lines directly connected between the data driver and the plurality of sub-pixel circuits” have now been treated on the merits, as shown in the above rejection. In addition, in the new combination of references, Xiang discloses a data driver outputting a data signal to the plurality of sub-pixel circuits through a plurality of output lines (regarding Fig. 6, note that since “the organic light-emitting display device 600 comprises the organic light-emitting display panel of the… embodiments”, it is clear that it necessarily comprises “known structures” such as a data driver that outputs data signals to the plurality of sub-pixel circuits in Figs. 3B and 4A-4B through data voltage signal lines Vdata; para[0076]; for clarification, see para[0007] of Shin et al. (US 2006/0001617) which states an “OLED display requires a scan driver for driving scan lines and a data driver for driving data lines”, as evidentiary support).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GLORYVID FIGUEROA-GIBSON whose telephone number is (571)272-5506. The examiner can normally be reached on 9am-5pm, Monday -Friday, Eastern Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nitin Patel can be reached on 571-272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/GLORYVID FIGUEROA-GIBSON/Patent Examiner, Art Unit 2628
/NITIN PATEL/Supervisory Patent Examiner, Art Unit 2628
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