Prosecution Insights
Last updated: July 17, 2026
Application No. 18/800,623

PROTECTING VEHICLE BUSES FROM CYBER-ATTACKS

Final Rejection §103
Filed
Aug 12, 2024
Priority
Jun 08, 2018 — provisional 62/682,803 +1 more
Examiner
ALMEIDA, DEVIN E
Art Unit
2492
Tech Center
2400 — Computer Networks
Assignee
NVIDIA Corporation
OA Round
2 (Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
1y 8m
Est. Remaining
83%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
436 granted / 609 resolved
+13.6% vs TC avg
Moderate +11% lift
Without
With
+11.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
20 currently pending
Career history
633
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
80.9%
+40.9% vs TC avg
§102
13.9%
-26.1% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 609 resolved cases

Office Action

§103
CTFR 18/800,623 CTFR 82247 DETAILED ACTION This action is in response to amendments filed 2/12/2026. Claims 1-20 are pending with claims 1-7, 9-11, 14-18 and 20 having been amended. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Priority Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). The certified copy has been received. Response to Arguments Applicant’s arguments with respect to claim(s) 1, 9 and 16 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 1-4 and 6-20 are rejected under 35 U.S.C. 103 as being unpatentable over Argus Cyber Security Ltd. (EP 2892199) listed on IDS filed 1/27/2025 in view of Polzbauer et al., "Analysis and Optimization of Message Acceptance Filter Configurations for Controller Area Network (CAN)" listed on IDS filed 1/27/2025 in view of Wu et al (US 2017/0054574) . With respect to claim 1 Argus Cyber teaches a hardware device (see Agus Cyber paragraph 22:" Whereas in Figs. 1A and 1B Watchmen 40 are schematically shown as separate components that appear to be hardware components,..."; Figure 1B) comprising: the hardware device configured to store a message identifier (ID) of a Controller Area Network (CAN) message (see Agus Cyber paragraph 52 i.e. CAN message lists that are relevant to messages received via port 45. In a decision block 107 the processor vets the 11 or 29 CAN message ID bits of the message to determine if the message ID is valid and may be allowed ingress to high-speed bus 61; paragraph 63 i.e. In a block 152, Watchman 40B receives bits of a CAN message propagating on high-speed bus 61. In a decision block 154 processor 41 of the Watchman vets the ID of the message to determine if it is an ID of a potentially damaging message, which advantageously should not be allowed to propagate on high-speed bus 61); the hardware device configured to store a reference message ID based at least on an analysis (see Agus Cyber paragraph 63 i.e. For example, the ID may be the ID of a black listed message...); the hardware device configured to generate an output signal indicative of a result of a comparison between the message ID of the CAN message and the reference message ID (see Agus Cyber paragraph 63 i.e. If Watchman 40B determines that the message should be blocked, it proceeds to a block 171 to begin a process of poisoning and corrupting the message so that it is unacceptable to nodes connected to high-speed bus 61; Figure 2C step 171); and an interference circuit of the host system configured to, responsive to the output signal, block the CAN message from being successfully transmitted on the CAN bus (see Agus Cyber paragraph 66 i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). Agus Cyber dos not disclose a first register a second register and at least one logic gate coupled to the first register and the second register. Polzlbauer teaches a first register a second register and at least one logic gate coupled to the first register and the second register (see Polzlbauer section 2.2 i.e. The hardware-based acceptance filtering works as follows: The ID of an incoming message is compared against the specified acceptance filter pattern. If the ID matches the filter pattern, the message passes through, and is stored in the receive buffer. If the ID does not match the filter pattern, the message is blocked. The filter pattern comprises two registers per filter: The mask specifies which bits of the ID are considered, and the tag specifies the corresponding ID-values that are allowed to pass. The filter logic is shown in the pseudo-code below; however, note that the actual implementation is by shift registers and logic gates in hardware). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Agus Cyber in view of Polzlbauer to have used the hardware based filtering device of Polzlbauer as registers and logic gate are well know hardware of a hardware based filtering device (see Polzlbauer section 2.2). Therefore one would have been motivated to have used the hardware based filtering device of Polzlbauer. Agus Cyber in view of Polzlbauer does not teach the Controller Area Network (CAN) message being transmitted on a CAN bus using a physical interface of a host system responsive to a transmission, in a virtualized environment of the host system, of a virtual message to the physical interface or wherein the analysis is done within the virtualized environment associated with the transmission of the virtual message. Wu teaches the Controller Area Network (CAN) message being transmitted on a CAN bus using a physical interface of a host system responsive to a transmission, in a virtualized environment of the host system, of a virtual message to the physical interface and or wherein the analysis is done within the virtualized environment associated with the transmission of the virtual message (see Wu figure 1 and paragraphs 0018-0020 i.e. As a first example consider a message that is transmitted from node A (118) on physical CAN bus 112. Node A transmits the message along with a message ID that identifies an intended destination node 13 (120). Node B is on physical CAN bus 115. Physical CAN buses 112 and 115 are associated with the same virtual CAN bus 102 and thus share a common CAN bus ID that is associated with the virtual CAN bus. When the ECU in node A (118) broadcasts the message (with a message ID) onto the CAN bus 112, the source CAN controller 106 checks the message to determine, according to a preset filter with filtering criteria, whether the CAN message is acceptable or should be terminated… If the CAN message is acceptable, then the message is encapsulated into an Ethernet frame along with a CAN bus ID. The CAN has ID identifies the virtual bus that includes the physical bus that source node A is on. The Ethernet frame is transmitted over the Ethernet to the destination CAN controller 108. The destination CAN controller 108 decodes the Ethernet frame to extract the message and message ID and the CAN bus ID. The destination CAN controller 108 transmits the message and message ID onto every physical bus 114, 115 (that the controller 108 serves) that is associated with the virtual bus identified by the bus ID. The message ID is used by destination node B (120) to determine that the message is relevant and receive the message ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify further modified Argus Cyber in view of Wu to formed a virtual CAN bus from Multiple CAN buses that have different physical speeds (i.e., baud rates) since the use of a virtual CAN buses can break line length restrictions and bridge buses of different speeds (See Wu paragraph 0015). Therefore one would have been motivated to have used virtual CAN bus to break line length restrictions and bridge buses of different speeds. With respect to claim 2 Argus Cyber, Polzlbauer and Wu teaches the hardware device of claim 1, wherein analysis is performed over a receive path of a virtual CAN bus connected to a guest operating system within the virtualized environment (see Wu figure 1 and paragraphs 0018-0020 i.e. As a first example consider a message that is transmitted from node A (118) on physical CAN bus 112. Node A transmits the message along with a message ID that identifies an intended destination node 13 (120). Node B is on physical CAN bus 115. Physical CAN buses 112 and 115 are associated with the same virtual CAN bus 102 and thus share a common CAN bus ID that is associated with the virtual CAN bus. When the ECU in node A (118) broadcasts the message (with a message ID) onto the CAN bus 112, the source CAN controller 106 checks the message to determine, according to a preset filter with filtering criteria, whether the CAN message is acceptable or should be terminated… If the CAN message is acceptable, then the message is encapsulated into an Ethernet frame along with a CAN bus ID. The CAN has ID identifies the virtual bus that includes the physical bus that source node A is on. The Ethernet frame is transmitted over the Ethernet to the destination CAN controller 108. The destination CAN controller 108 decodes the Ethernet frame to extract the message and message ID and the CAN bus ID. The destination CAN controller 108 transmits the message and message ID onto every physical bus 114, 115 (that the controller 108 serves) that is associated with the virtual bus identified by the bus ID. The message ID is used by destination node B (120) to determine that the message is relevant and receive the message ). With respect to claim 3 Argus Cyber, Polzlbauer and Wu teaches the hardware device of claim 1, reference message ID is stored based at least on detecting an unauthorized instance of the message ID on a virtual CAN bus within the virtualized environment (see Agus Cyber paragraph 63 i.e. For example, the ID may be the ID of a black listed message... and Wu figure 1 and paragraphs 0018-0020). With respect to claim 4 Argus Cyber, Polzlbauer and Wu teaches the hardware device of claim 1, wherein blocking includes altering a control field of the CAN message (see Agus Cyber Figure 2C step 171 and paragraph 63-64 i.e. If Watchman 40B determines that the message should be blocked, it proceeds to a block 171 to begin a process of poisoning and corrupting the message so that it is unacceptable to nodes connected to high-speed bus 61 … processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). With respect to claim 6 Argus Cyber, Polzlbauer and Wu teaches the hardware device of claim 1, but does not disclose wherein the interference circuit includes a programmable window of time over which the blocking is performed (see Agus Cyber paragraph 66 i.e. i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). With respect to claim 7 Argus Cyber, Polzlbauer and Wu teaches the hardware device of claim 1, wherein virtual message is a virtual version of the CAN message and is received by a virtual CAN interface coupled to the physical interface (see Wu figure 1 and paragraphs 0018-0020 i.e. As a first example consider a message that is transmitted from node A (118) on physical CAN bus 112. Node A transmits the message along with a message ID that identifies an intended destination node 13 (120). Node B is on physical CAN bus 115. Physical CAN buses 112 and 115 are associated with the same virtual CAN bus 102 and thus share a common CAN bus ID that is associated with the virtual CAN bus. When the ECU in node A (118) broadcasts the message (with a message ID) onto the CAN bus 112, the source CAN controller 106 checks the message to determine, according to a preset filter with filtering criteria, whether the CAN message is acceptable or should be terminated… If the CAN message is acceptable, then the message is encapsulated into an Ethernet frame along with a CAN bus ID. The CAN has ID identifies the virtual bus that includes the physical bus that source node A is on. The Ethernet frame is transmitted over the Ethernet to the destination CAN controller 108. The destination CAN controller 108 decodes the Ethernet frame to extract the message and message ID and the CAN bus ID. The destination CAN controller 108 transmits the message and message ID onto every physical bus 114, 115 (that the controller 108 serves) that is associated with the virtual bus identified by the bus ID. The message ID is used by destination node B (120) to determine that the message is relevant and receive the message ). With respect to claim 8 Argus Cyber, Polzlbauer and Wu teaches the hardware device of claim 1, wherein the hardware device is comprised in at least one of: a control system for an autonomous or semi-autonomous machine; a perception system for an autonomous or semi-autonomous machine; a system for performing one or more simulation operations; a system for performing light transport simulation; a system for performing one or more deep learning operations; a system implemented using a robot; a system for performing one or more generative AI operations; a system for presenting at least one of virtual reality content or augmented reality content; a system incorporating one or more virtual machines (VMs); a system implemented at least partially in a data center; or a system implemented at least partially using cloud computing resources (see Agus Cyber paragraph 3 i.e. Over the last half century the automotive industry has, initially slowly, and subsequently with great rapidity, been evolving from mechanical control systems for controlling a vehicle’s functions to electronic "drive by wire" control systems for controlling the functions. In mechanical vehicular control systems a driver of a vehicle controls components of a vehicle that control vehicle functions by operating mechanical systems that directly couple the driver to the components via mechanical linkages. In drive by wire vehicle control systems a driver may be coupled directly, and/or very often indirectly, to vehicle control components that control vehicle functions by electronic control systems and electronic wire and/or wireless communication channels, rather than direct mechanical linkages. The driver controls the control components by generating electronic signals that are input to the electronic control systems and the communication channels). With respect to claim 9 Argus Cyber teaches a method comprising: storing, in a first register, a message identifier (ID) of a Controller Area Network (CAN) message (see Agus Cyber paragraph 52 i.e. CAN message lists that are relevant to messages received via port 45. In a decision block 107 the processor vets the 11 or 29 CAN message ID bits of the message to determine if the message ID is valid and may be allowed ingress to high-speed bus 61; paragraph 63 i.e. In a block 152, Watchman 40B receives bits of a CAN message propagating on high-speed bus 61. In a decision block 154 processor 41 of the Watchman vets the ID of the message to determine if it is an ID of a potentially damaging message, which advantageously should not be allowed to propagate on high-speed bus 61); storing, in a second register, a reference message ID (see Agus Cyber paragraph 63 i.e. For example, the ID may be the ID of a black listed message...); comparing, using at least one logic gate coupled to the first register and the second register, the message ID of the CAN message and the reference message ID (see Agus Cyber paragraph 63 i.e. If Watchman 40B determines that the message should be blocked, it proceeds to a block 171 to begin a process of poisoning and corrupting the message so that it is unacceptable to nodes connected to high-speed bus 61; Figure 2C step 171); generating an output signal indicative of a result of the comparing of the message ID to the reference message ID; and responsive to the output signal, blocking the CAN message from being successfully transmitted on the CAN bus using an interference circuit of the host system (see Agus Cyber paragraph 63 i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). Agus Cyber dos not disclose a first register a second register and at least one logic gate coupled to the first register and the second register. Polzlbauer teaches a first register a second register and at least one logic gate coupled to the first register and the second register (see Polzlbauer section 2.2 i.e. The hardware-based acceptance filtering works as follows: The ID of an incoming message is compared against the specified acceptance filter pattern. If the ID matches the filter pattern, the message passes through, and is stored in the receive buffer. If the ID does not match the filter pattern, the message is blocked. The filter pattern comprises two registers per filter: The mask specifies which bits of the ID are considered, and the tag specifies the corresponding ID-values that are allowed to pass. The filter logic is shown in the pseudo-code below; however, note that the actual implementation is by shift registers and logic gates in hardware). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Agus Cyber in view of Polzlbauer to have used the hardware based filtering device of Polzlbauer as registers and logic gate are well know hardware of a hardware based filtering device (see Polzlbauer section 2.2). Therefore one would have been motivated to have used the hardware based filtering device of Polzlbauer. Agus Cyber in view of Polzlbauer does not teach the Controller Area Network (CAN) message being transmitted on a CAN bus using a physical interface of a host system responsive to a transmission, in a virtualized environment of the host system, of a virtual message to the physical interface or wherein the analysis is done within the virtualized environment associated with the transmission of the virtual message. Wu teaches the Controller Area Network (CAN) message being transmitted on a CAN bus using a physical interface of a host system responsive to a transmission, in a virtualized environment of the host system, of a virtual message to the physical interface and or wherein the analysis is done within the virtualized environment associated with the transmission of the virtual message (see Wu figure 1 and paragraphs 0018-0020 i.e. As a first example consider a message that is transmitted from node A (118) on physical CAN bus 112. Node A transmits the message along with a message ID that identifies an intended destination node 13 (120). Node B is on physical CAN bus 115. Physical CAN buses 112 and 115 are associated with the same virtual CAN bus 102 and thus share a common CAN bus ID that is associated with the virtual CAN bus. When the ECU in node A (118) broadcasts the message (with a message ID) onto the CAN bus 112, the source CAN controller 106 checks the message to determine, according to a preset filter with filtering criteria, whether the CAN message is acceptable or should be terminated… If the CAN message is acceptable, then the message is encapsulated into an Ethernet frame along with a CAN bus ID. The CAN has ID identifies the virtual bus that includes the physical bus that source node A is on. The Ethernet frame is transmitted over the Ethernet to the destination CAN controller 108. The destination CAN controller 108 decodes the Ethernet frame to extract the message and message ID and the CAN bus ID. The destination CAN controller 108 transmits the message and message ID onto every physical bus 114, 115 (that the controller 108 serves) that is associated with the virtual bus identified by the bus ID. The message ID is used by destination node B (120) to determine that the message is relevant and receive the message ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify further modified Argus Cyber in view of Wu to formed a virtual CAN bus from Multiple CAN buses that have different physical speeds (i.e., baud rates) since the use of a virtual CAN buses can break line length restrictions and bridge buses of different speeds (See Wu paragraph 0015). Therefore one would have been motivated to have used virtual CAN bus to break line length restrictions and bridge buses of different speeds. With respect to claim 10 Argus Cyber, Polzlbauer and Wu teaches the method of claim 9, wherein the blocking includes raising arbitration on the CAN bus, and based at least on the arbitration, writing an erroneous value to a Cyclic Redundancy Check (CRC) field of the CAN message on the CAN bus (see Agus Cyber paragraph 63 i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). With respect to claim 11 Argus Cyber, Polzlbauer and Wu teaches the method of claim 9, wherein a receive acceptance filter of the physical interface is disabled (see Agus Cyber paragraph 63 i.e. If Watchman 40B determines that the message should be blocked, it proceeds to a block 171 to begin a process of poisoning and corrupting the message so that it is unacceptable to nodes connected to high-speed bus 61; Figure 2C step 171). With respect to claim 12 Argus Cyber, Polzlbauer and Wu teaches the method of claim 9, wherein the comparing is between the message ID and each of a plurality of reference message IDs (see Agus Cyber paragraph 63 i.e. If Watchman 40B determines that the message should be blocked, it proceeds to a block 171 to begin a process of poisoning and corrupting the message so that it is unacceptable to nodes connected to high-speed bus 61; Figure 2C step 171). With respect to claim 13 Argus Cyber, Polzlbauer and Wu teaches the method of claim 9, but does not disclose wherein the first register and the interference circuit are coupled to the CAN bus in a vehicle. Polzlbauer teaches wherein the first register and the interference circuit are coupled to the CAN bus in a vehicle (see Polzlbauer section 2.2 i.e. The hardware-based acceptance filtering works as follows: The ID of an incoming message is compared against the specified acceptance filter pattern. If the ID matches the filter pattern, the message passes through, and is stored in the receive buffer. If the ID does not match the filter pattern, the message is blocked. The filter pattern comprises two registers per filter: The mask specifies which bits of the ID are considered, and the tag specifies the corresponding ID-values that are allowed to pass. The filter logic is shown in the pseudo-code below; however, note that the actual implementation is by shift registers and logic gates in hardware). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Agus Cyber in view of Polzlbauer to have used the hardware based filtering device of Polzlbauer as registers and logic gate are well know hardware of a hardware based filtering device (see Polzlbauer section 2.2). Therefore one would have been motivated to have used the hardware based filtering device of Polzlbauer. With respect to claim 14 Argus Cyber, Polzlbauer and Wu teaches the method of claim 9, wherein the interference circuit includes a programmable window of time over which the blocking is performed (see Agus Cyber paragraph 66 i.e. i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). With respect to claim 15 Argus Cyber, Polzlbauer and Wu teaches the method of claim 9, wherein the blocking is performed over a window of time that is time synced to a CAN controller data frame (see Agus Cyber paragraph 66 i.e. i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). With respect to claim 16 Argus Cyber teaches a system comprising: a system on chip (SoC) having autonomous or semi-autonomous control software for a vehicle and security software configured to block a Controller Area Network (CAN) message on a CAN bus of the vehicle using: the hardware device configured to store a message identifier (ID) of a Controller Area Network (CAN) message, the message ID to be received from a CAN bus during transmission of the CAN message (paragraph 52 i.e. CAN message lists that are relevant to messages received via port 45. In a decision block 107 the processor vets the 11 or 29 CAN message ID bits of the message to determine if the message ID is valid and may be allowed ingress to high-speed bus 61; paragraph 63 i.e. In a block 152, Watchman 40B receives bits of a CAN message propagating on high-speed bus 61. In a decision block 154 processor 41 of the Watchman vets the ID of the message to determine if it is an ID of a potentially damaging message, which advantageously should not be allowed to propagate on high-speed bus 61); the hardware device configured to store a reference message ID (paragraph 63 i.e. For example, the ID may be the ID of a black listed message...); the hardware device configured to generate an output signal indicative of a result of a comparison between the message ID of the CAN message and the reference message ID (see paragraph 63 i.e. If Watchman 40B determines that the message should be blocked, it proceeds to a block 171 to begin a process of poisoning and corrupting the message so that it is unacceptable to nodes connected to high-speed bus 61; Figure 2C step 171); and an interference circuit of the SoC configured to, responsive to the output signal, block the CAN message from being successfully transmitted on the CAN bus (see Agus Cyber paragraph 63 i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). Agus Cyber dos not disclose a first register a second register and at least one logic gate coupled to the first register and the second register. Polzlbauer teaches a first register a second register and at least one logic gate coupled to the first register and the second register (see Polzlbauer section 2.2 i.e. The hardware-based acceptance filtering works as follows: The ID of an incoming message is compared against the specified acceptance filter pattern. If the ID matches the filter pattern, the message passes through, and is stored in the receive buffer. If the ID does not match the filter pattern, the message is blocked. The filter pattern comprises two registers per filter: The mask specifies which bits of the ID are considered, and the tag specifies the corresponding ID-values that are allowed to pass. The filter logic is shown in the pseudo-code below; however, note that the actual implementation is by shift registers and logic gates in hardware). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Agus Cyber in view of Polzlbauer to have used the hardware based filtering device of Polzlbauer as registers and logic gate are well know hardware of a hardware based filtering device (see Polzlbauer section 2.2). Therefore one would have been motivated to have used the hardware based filtering device of Polzlbauer. Agus Cyber in view of Polzlbauer does not teach the Controller Area Network (CAN) message being transmitted on a CAN bus using a physical interface of a host system responsive to a transmission, in a virtualized environment of the host system, of a virtual message to the physical interface or wherein the analysis is done within the virtualized environment associated with the transmission of the virtual message. Wu teaches the Controller Area Network (CAN) message being transmitted on a CAN bus using a physical interface of a host system responsive to a transmission, in a virtualized environment of the host system, of a virtual message to the physical interface and or wherein the analysis is done within the virtualized environment associated with the transmission of the virtual message (see Wu figure 1 and paragraphs 0018-0020 i.e. As a first example consider a message that is transmitted from node A (118) on physical CAN bus 112. Node A transmits the message along with a message ID that identifies an intended destination node 13 (120). Node B is on physical CAN bus 115. Physical CAN buses 112 and 115 are associated with the same virtual CAN bus 102 and thus share a common CAN bus ID that is associated with the virtual CAN bus. When the ECU in node A (118) broadcasts the message (with a message ID) onto the CAN bus 112, the source CAN controller 106 checks the message to determine, according to a preset filter with filtering criteria, whether the CAN message is acceptable or should be terminated… If the CAN message is acceptable, then the message is encapsulated into an Ethernet frame along with a CAN bus ID. The CAN has ID identifies the virtual bus that includes the physical bus that source node A is on. The Ethernet frame is transmitted over the Ethernet to the destination CAN controller 108. The destination CAN controller 108 decodes the Ethernet frame to extract the message and message ID and the CAN bus ID. The destination CAN controller 108 transmits the message and message ID onto every physical bus 114, 115 (that the controller 108 serves) that is associated with the virtual bus identified by the bus ID. The message ID is used by destination node B (120) to determine that the message is relevant and receive the message ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify further modified Argus Cyber in view of Wu to formed a virtual CAN bus from Multiple CAN buses that have different physical speeds (i.e., baud rates) since the use of a virtual CAN buses can break line length restrictions and bridge buses of different speeds (See Wu paragraph 0015). Therefore one would have been motivated to have used virtual CAN bus to break line length restrictions and bridge buses of different speeds. With respect to claim 17 Argus Cyber, Polzlbauer and Wu teaches the system of claim 16, wherein the blocking comprises raising arbitration on the CAN bus, and based at least on the arbitration, writing an erroneous value to a Cyclic Redundancy Check (CRC) field of the CAN message on the CAN bus (see Agus Cyber paragraph 63 i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message). With respect to claim 18 Argus Cyber, Polzlbauer and Wu teaches the system of claim 16, wherein the blocking is performed based at least on the result of the comparison indicating that the message ID matches the reference message ID (see Agus Cyber paragraph 63 i.e. If Watchman 40B determines that the message should be blocked, it proceeds to a block 171 to begin a process of poisoning and corrupting the message so that it is unacceptable to nodes connected to high-speed bus 61; Figure 2C step 171). With respect to claim 19 Argus Cyber, Polzlbauer and Wu teaches the system of claim 16, wherein the comparison is between the message ID and each of a plurality of reference message IDs (see Agus Cyber paragraph 63 i.e. If Watchman 40B determines that the message should be blocked, it proceeds to a block 171 to begin a process of poisoning and corrupting the message so that it is unacceptable to nodes connected to high-speed bus 61; Figure 2C step 171). With respect to claim 20 Argus Cyber, Polzlbauer and Wu teaches the system of claim 16, wherein the interference circuit includes a programmable window of time over which the blocking is performed (see Agus Cyber paragraph 66 i.e. i.e. processor 41 may operate to control Watchman 40B to transmit at least one dominant bit to replace at least one passive CRC bit of the message rather than to replace data bits of the message. For example, Watchman 40B may transmit a dominant 0 to replace a passive 1 in the CRC to to destroy and block the CAN message) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. With respect to claim 5 the prior art does not teach Argus Cyber teaches the hardware device of claim 1, but does not disclose wherein the virtual message is transmitted by a first guest operating system within the virtualized environment, and the analysis is performed using a receive path to a second guest operating system within the virtualized environment. Prior Art Ben Noon et al (US 9,840,212) titled “Bus Watchman”. Du et al (US 2015/0347258) titles “METHOD AND APPARATUS FOR SHORT FAULT DETECTION IN A CONTROLLER AREA NETWORK”. Peirce et al (US 2014/0032800) titled “VEHICLE MESSAGE FILTER”. Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. 07-102 Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEVIN E ALMEIDA whose telephone number is (571)270-1018 . The examiner can normally be reached on Monday-Thursday from 7:30 A.M . to 5:00 P.M . The examiner can also be reached on alternate Fridays from 7:30 A.M. to 4:00 P.M . If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Rupal Dharia , can be reached on 571-272-3880 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /DEVIN E ALMEIDA/Examiner, Art Unit 2492 Application/Control Number: 18/800,623 Page 2 Art Unit: 2492 Application/Control Number: 18/800,623 Page 3 Art Unit: 2492 Application/Control Number: 18/800,623 Page 4 Art Unit: 2492 Application/Control Number: 18/800,623 Page 5 Art Unit: 2492 Application/Control Number: 18/800,623 Page 6 Art Unit: 2492 Application/Control Number: 18/800,623 Page 7 Art Unit: 2492 Application/Control Number: 18/800,623 Page 8 Art Unit: 2492 Application/Control Number: 18/800,623 Page 9 Art Unit: 2492 Application/Control Number: 18/800,623 Page 10 Art Unit: 2492 Application/Control Number: 18/800,623 Page 11 Art Unit: 2492 Application/Control Number: 18/800,623 Page 12 Art Unit: 2492 Application/Control Number: 18/800,623 Page 13 Art Unit: 2492 Application/Control Number: 18/800,623 Page 14 Art Unit: 2492 Application/Control Number: 18/800,623 Page 15 Art Unit: 2492 Application/Control Number: 18/800,623 Page 16 Art Unit: 2492 Application/Control Number: 18/800,623 Page 17 Art Unit: 2492 Application/Control Number: 18/800,623 Page 18 Art Unit: 2492 Application/Control Number: 18/800,623 Page 19 Art Unit: 2492 Application/Control Number: 18/800,623 Page 20 Art Unit: 2492 Application/Control Number: 18/800,623 Page 21 Art Unit: 2492 Application/Control Number: 18/800,623 Page 22 Art Unit: 2492 Application/Control Number: 18/800,623 Page 23 Art Unit: 2492
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Prosecution Timeline

Aug 12, 2024
Application Filed
Nov 13, 2025
Non-Final Rejection mailed — §103
Feb 12, 2026
Response Filed
Jun 02, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
72%
Grant Probability
83%
With Interview (+11.2%)
3y 7m (~1y 8m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 609 resolved cases by this examiner. Grant probability derived from career allowance rate.

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