DETAILED ACTION
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park et al., US 2015/0351228, in view of Kaneko, US 8,357,860.
Regarding claim 2, Park (figure 1) teaches a semiconductor device comprising:
a first substrate portion 131 comprising:
a conductive pattern 110;
first conductive vias 155 coupled to the first conductive pattern 113; and
a first insulative body 131 covering the first conductive pattern 110 and the first conductive vias 155 and comprising a first insulative body top side and a first insulative body bottom side, wherein:
the first conductive pattern 110 is exposed from the first insulative body top side;
portions 112 of the first conductive pattern 110 are devoid of the first conductive vias 155; and
the first conductive vias 155 are exposed from the first insulative body bottom side;
a second substrate portion 132 adjacent to the first insulative body 131 and comprising:
second conductive vias 172 coupled to the first conductive vias 155; and
a second insulative body 132 covering at least a portion of the first insulative body 131 and the second conductive vias 172 wherein:
the second insulative body 132 comprises a second insulative body top side and a second insulative body bottom side; and
the second conductive vias 172 are exposed from the second insulative body bottom side.
Park fails to teach a surface finish material over the second conductive vias exposed from the second insulative body bottom side; a semiconductor component coupled to the first conductive pattern; and an encapsulant covering at least a portion of the first substrate portion and the semiconductor component.
Kaneko (figure 4D) teaches a surface finish material 32 over the second conductive vias exposed from the second insulative body bottom side; and Kaneko (figure 7) teaches a semiconductor component coupled to the first conductive pattern; and an encapsulant covering at least a portion of the first substrate portion and the semiconductor component.
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the surface finish material and encapsulated semiconductor component of Kaneko in the invention of Park because Kaneko teaches the surface finish material is used to connect a semiconductor element to a substrate (column 1, lines 22-27). Also, it would have been obvious to one of ordinary skill in the art at the time of the invention to use the encapsulated semiconductor component of Kaneko in the invention of Park because it is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
With respect to claim 3, Park (figure 1) teaches a second conductive pattern 142, wherein: the second insulative body 132 at least partially surrounds the second conductive pattern 142 at the second insulative body top side.
As to claim 4, Park (figure 1) teaches a portion of the second conductive pattern 142 is devoid of any the second conductive vias 172.
In re claim 5, Kaneko (column 4, lines 57-58) teaches the surface finish material comprises nickel/gold (Ni/Au).
Concerning claim 6, Park (paragraph 0055) teaches the second conductive vias 172 comprise copper.
Pertaining to claim 7, Park (figure 1) teaches the first conductive pattern 110 is an outermost conductor in the first substrate portion 131; and the first insulative body top side is devoid of the first conductive pattern 110 overlapping onto the first insulative body top side.
In claim 8, Kaneko (figure 7) teaches conductive interconnect structures (wires), wherein the semiconductor component 61 is attached to a portion of the first conductive pattern with the conductive interconnect structures.
Regarding claim 9, Kaneko (figure 4C/4D) teaches the second insulative body 35 comprises openings exposing the second conductive vias 36 proximate to the second insulative body 35 bottom side; the second conductive vias 36 comprise recessed surfaces recessed within the openings; and the surface finish material 33 contacts the recessed surfaces of the second conductive vias 36 within the openings.
With respect to claim 10, Kaneko (figure 4D) teaches the surface finish material 33 is substantially coplanar with the second insulative body bottom side 35.
As to claim 11, Park (paragraph 0022) teaches the first insulative body 131 comprises resin; and the first conductive pattern 110 is coplanar with the first insulative body top side.
In re claim 12, Park (figure 1) teaches a packaged electronic device, comprising:
a first substrate portion 131 comprising:
a first conductive pattern 110;
first conductive pillars 155 coupled to the first conductive pattern 110; and
a first insulating body 131 covering the first conductive pattern 110 and the first conductive pillars 155 and comprising a first insulating body top side and a first insulating body bottom side, wherein:
the first conductive pattern 110 is exposed from the first insulating body top side; and
the first conductive pillars 155 are exposed from the first insulating body bottom side;
a second substrate portion 132 adjacent to the first substrate portion 131 and comprising:
second conductive pillars 172 coupled to the first conductive pillars 155; and
a second insulating body 132 adjacent the first insulating body bottom side and surrounding the second conductive pillars 172, wherein:
the second insulating body 132 comprises a second insulating body top side and a second insulating body bottom side; and
the second conductive pillars 172 are exposed from the second insulating body bottom side.
Park fails to teach a surface finish material over the second conductive vias exposed from the second insulative body bottom side; a semiconductor component coupled to the first conductive pattern; and an encapsulant covering at least a portion of the first substrate portion and the semiconductor component, wherein: the second conductive pillars comprise a first material; and the surface finish material comprises a second material different than the first material.
Kaneko (figure 4D) teaches a surface finish material 32 over the second conductive vias exposed from the second insulative body bottom side; and Kaneko (figure 7) teaches a semiconductor component coupled to the first conductive pattern; and an encapsulant covering at least a portion of the first substrate portion and the semiconductor component, wherein: the second conductive pillars comprise a first material; and the surface finish material comprises a second material different than the first material.
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the surface finish material and encapsulated semiconductor component of Kaneko in the invention of Park because Kaneko teaches the surface finish material is used to connect a semiconductor element to a substrate (column 1, lines 22-27), and Park teaches the second conductive pillars 172 comprise a first material (paragraph 0035); and Kaneko (column 4, lines 57-58) teaches the surface finish material comprises a second material different than the first material. Also, it would have been obvious to one of ordinary skill in the art at the time of the invention to use the encapsulated semiconductor component of Kaneko in the invention of Park because it is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
Concerning claim 13, Park (figure 1) teaches a second conductive pattern 142 embedded within the second insulating body 132 proximate to the second insulating body top side.
Pertaining to claim 14, Park (paragraph 0035) teaches the first material comprises copper (Cu); and Kaneko (column 4, lines 57-58) teaches the second material comprises nickel/gold (Ni/Au).
In claim 15, Park (figure 1) teaches portions 112 of the first conductive pattern 110 are devoid of the first conductive pillars 155.
Regarding claim 16, Kaneko (figure 4C/4D) teaches the second insulating body 35 comprises openings exposing the second conductive pillars 36 proximate to the second insulating body bottom side; the second conductive pillars 36 comprise recessed surfaces recessed within the openings; and the surface finish material 33 contacts the recessed surfaces of the second conductive pillars 36.
With respect to claim 17, Kaneko (figure 4D) teaches the surface finish material 33 is substantially coplanar with the second insulating body 35 bottom side.
As to claim 18, park (figure 1) teaches method of manufacturing a packaged electronic device, comprising:
providing a first substrate portion 131 comprising:
a first conductive pattern 110;
first conductive pillars 155 coupled to the first conductive pattern 110; and
a first insulating body 131 covering the first conductive pattern 110 and the first conductive pillars 155 and comprising a first insulating body top side and a first insulating body bottom side, wherein:
the first conductive pattern 110 is exposed from the first insulating body top side; and
the first conductive pillars 155 are exposed from the first insulating body bottom side;
providing a second substrate portion 132 adjacent to the first substrate portion 131 and comprising:
second conductive pillars 172 coupled to the first conductive pillars 155; and
a second insulating body 132 adjacent the first insulating body bottom side and surrounding the second conductive pillars 172, wherein:
the second insulating body 132 comprises a second insulating body top side and a second insulating body bottom side; and
the second conductive pillars 172 are exposed from the second insulating body bottom side.
Park fails to teach a surface finish material over the second conductive vias exposed from the second insulative body bottom side; a semiconductor component coupled to the first conductive pattern; and an encapsulant covering at least a portion of the first substrate portion and the semiconductor component, wherein: the second conductive pillars comprise a first material; and the surface finish material comprises a second material different than the first material.
Kaneko (figure 4D) teaches providing a surface finish material 32 over the second conductive vias exposed from the second insulative body bottom side; and Kaneko (figure 7) teaches providing a semiconductor component coupled to the first conductive pattern; and an encapsulant covering at least a portion of the first substrate portion and the semiconductor component, wherein: the second conductive pillars comprise a first material; and the surface finish material comprises a second material different than the first material.
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the surface finish material and encapsulated semiconductor component of Kaneko in the invention of Park because Kaneko teaches the surface finish material is used to connect a semiconductor element to a substrate (column 1, lines 22-27), and Park teaches the second conductive pillars 172 comprise a first material (paragraph 0035); and Kaneko (column 4, lines 57-58) teaches the surface finish material comprises a second material different than the first material. Also, it would have been obvious to one of ordinary skill in the art at the time of the invention to use the encapsulated semiconductor component of Kaneko in the invention of Park because it is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
In re claim 19, Park (figure 1q) teaches providing a second conductive pattern 142 embedded within the second insulating body 132 proximate to the second insulating body top side; wherein Park (paragraph 035) teaches the first material comprises copper (Cu); and Kaneko (column 4, lines 56-63) teaches the second material comprises nickel/gold (Ni/Au).
Concerning claim 20, Kaneko (figures 4C/4D) teaches providing the second substrate portion 35 comprises providing the second insulating body 35 comprising openings exposing the second conductive pillars 36 proximate to the second insulating body bottom side; and providing the second conductive pillars 36 comprises recessed surfaces within the openings; and providing the surface finish material 33 comprises providing the surface finish material 33 contacting the recessed surfaces of the second conductive pillars 361.
Pertaining to claim 21, Kaneko (figure 4D) teaches providing the surface finish material 33 comprises providing the surface finish material substantially coplanar with the second insulating body bottom side.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art teaches various aspects of the invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A ZARNEKE whose telephone number is (571)272-1937. The examiner can normally be reached M-F.
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/DAVID A ZARNEKE/ Primary Examiner, Art Unit 2891 9/15/26
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