Prosecution Insights
Last updated: July 17, 2026
Application No. 18/800,842

APPARATUSES AND METHODS FOR TESTING SEMICONDUCTOR CIRCUITRY USING MICROELECTROMECHANICAL SYSTEMS SWITCHES

Non-Final OA §DP
Filed
Aug 12, 2024
Priority
May 18, 2021 — provisional 63/190,203 +1 more
Examiner
ZHANG, HAIDONG
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Analog Devices Inc.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
1y 0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
381 granted / 470 resolved
+13.1% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
12 currently pending
Career history
489
Total Applications
across all art units

Statute-Specific Performance

§101
7.0%
-33.0% vs TC avg
§103
73.5%
+33.5% vs TC avg
§102
2.3%
-37.7% vs TC avg
§112
13.4%
-26.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 470 resolved cases

Office Action

§DP
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 21, 29, 30, 33, 35 and 40 are rejected on the ground of nonstatutory double patenting as being unpatentable over corresponding claim 1, 12, 1, 12, 1 and 12 of U.S. Patent No. US 12,099,085 B2 in view of Song et al. (US 2013/0342236) found in IDS. A comparison of the claims is presented in the following table with exact correspondence in bold face. Instant Application U.S. Patent No.: US 12,099,085 B2 21. (New) An apparatus comprising: a plurality of first terminals configured to be coupled to a semiconductor circuit under test; a plurality of second terminals configured to be coupled to a first test equipment; and a plurality of microelectromechanical systems (MEMS) switches coupled to the plurality of first terminals, wherein the plurality of MEMS switches comprise: a first MEMS switch having at least one input comprising a first terminal of the plurality of first terminals, wherein the first MEMS switch is configured to connect or disconnect a first output comprising a first signal line of a radio frequency (RF) path, a second output comprising a second signal line of a direct current (DC) path, and a third output; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch. 1. An apparatus comprising: a plurality of first terminals configured to be coupled to a semiconductor circuit under test; a plurality of second terminals configured to be coupled to a test equipment; and a plurality of microelectromechanical systems (MEMS) switches coupled to the plurality of first terminals, wherein the plurality of MEMS switches are configured to: operate in a first state to enable a direct current (DC) path between the semiconductor circuit and the test equipment; and operate in a second state to enable a radio frequency (RF) path; wherein the plurality of MEMS switches comprise: a first MEMS switch coupled to a first terminal of the plurality of first terminals and configured to connect or disconnect a first signal line of the RF path; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch. Regarding claim 21, claim 1 of U.S. Patent No. US 12,099,085 B2 meets all claim limitation of claim 21, except the claim limitations of “having at least one input”, “a first output”, and “a second output comprising a second signal line of a direct current (DC) path, and a third output”. Song teaches a switch having at least one input comprising a first terminal of a plurality of first terminals (e.g. fig. 9, [0077], switch matrix layer 3001 has first terminal I01 of a plurality of input terminals 160, 170, 180), wherein the switch is configured to connect or disconnect a first output comprising a first signal line of a path (e.g. fig. 9, [0077], switch matrix layer’s corresponding output DQ1 comprising a first signal line of a path 322), a second output comprising a second signal line of a direct current (DC) path (e.g. fig. 9, a second output VDDP comprising a second signal line of a DC path 323), and a third output (e.g. fig. 9, a third output ADDP). It would produce a predictive result of using the first MEMS switch having at least one input, a first output, a second output comprising a second signal line of a direct current (DC) path, and a third output, for the purpose of increasing functionalities and flexibilities of the first MEMS switch to improve signal routing efficiency. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified claim 1 of U.S. Patent No. US 12,099,085 B2 by applying the teaching of Song to explicitly have the limitations of “a first MEMS switch having at least one input comprising a first terminal of the plurality of first terminals, wherein the first MEMS switch is configured to connect or disconnect a first output comprising a first signal line of a radio frequency (RF) path, a second output comprising a second signal line of a direct current (DC) path, and a third output”, for the purpose of increasing functionalities and flexibilities of the first MEMS switch to improve signal routing efficiency. Regarding claim 29, claim 29 is further met by claim 12 of U.S. Patent No. US 12,099,085 B2. A comparison of the claims is presented in the following table with exact correspondence in bold face. Instant Application U.S. Patent No.: US 12,099,085 B2 30. (New) An apparatus comprising: a plurality of first terminals configured to be coupled to a semiconductor circuit under test; a plurality of second terminals configured to be coupled to a test equipment; and a plurality of microelectromechanical systems (MEMS) switches coupled to the plurality of first terminals, wherein the plurality of MEMS switches comprise: a first MEMS switch coupled to a first terminal of the plurality of first terminals and configured to connect or disconnect a first signal line of a first radio frequency (RF) path, a second signal line of a second RF path, and a third signal line of a direct current (DC) path; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the first RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the first RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch. 1. An apparatus comprising: a plurality of first terminals configured to be coupled to a semiconductor circuit under test; a plurality of second terminals configured to be coupled to a test equipment; and a plurality of microelectromechanical systems (MEMS) switches coupled to the plurality of first terminals, wherein the plurality of MEMS switches are configured to: operate in a first state to enable a direct current (DC) path between the semiconductor circuit and the test equipment; and operate in a second state to enable a radio frequency (RF) path; wherein the plurality of MEMS switches comprise: a first MEMS switch coupled to a first terminal of the plurality of first terminals and configured to connect or disconnect a first signal line of the RF path; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch. Regarding claim 30, claim 1 of U.S. Patent No. US 12,099,085 B2 meets all claim limitation of claim 30, except the claim limitations of “a second signal line of a second RF path, and a third signal line of a direct current (DC) path”. Song teaches a first signal line of a first path (e.g. fig. 9, [0078], first signal path 322), a second signal line of a second path (e.g. fig. 9, [0078], second signal path 321), and a third signal line of a direct current (DC) path (e.g. fig. 9, [0078], third signal DC path 323). It would produce a predictive result of using the first MEMS switch having a second signal line of a second RF path, and a third signal line of a direct current (DC) path, for the purpose of increasing functionalities and flexibilities of the first MEMS switch to improve signal routing efficiency. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified claim 1 of U.S. Patent No. US 12,099,085 B2 by applying the teaching of Song to explicitly have the limitations of “a second signal line of a second RF path, and a third signal line of a direct current (DC) path”, for the purpose of increasing functionalities and flexibilities of the first MEMS switch to improve signal routing efficiency. Regarding claim 33, claim 33 is further met by claim 12 of U.S. Patent No. US 12,099,085 B2. A comparison of the claims is presented in the following table with exact correspondence in bold face. Instant Application U.S. Patent No.: US 12,099,085 B2 35. (New) An apparatus comprising: a plurality of first terminals configured to be coupled to a semiconductor circuit under test; a plurality of second terminals configured to be coupled to a test equipment; and a plurality of microelectromechanical systems (MEMS) switches coupled to the plurality of first terminals, wherein the plurality of MEMS switches are configured to: operate in a first state to enable a direct current (DC) path between the semiconductor circuit and the test equipment; and operate in a second state to enable a first radio frequency (RF) path or a second RF path; wherein the plurality of MEMS switches comprise: a first MEMS switch coupled to a first terminal of the plurality of first terminals and configured to connect or disconnect a first signal line of the first RF path and a second signal line of the second RF path; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the first RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the first RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch. 1. An apparatus comprising: a plurality of first terminals configured to be coupled to a semiconductor circuit under test; a plurality of second terminals configured to be coupled to a test equipment; and a plurality of microelectromechanical systems (MEMS) switches coupled to the plurality of first terminals, wherein the plurality of MEMS switches are configured to: operate in a first state to enable a direct current (DC) path between the semiconductor circuit and the test equipment; and operate in a second state to enable a radio frequency (RF) path; wherein the plurality of MEMS switches comprise: a first MEMS switch coupled to a first terminal of the plurality of first terminals and configured to connect or disconnect a first signal line of the RF path; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch. Regarding claim 35, claim 1 of U.S. Patent No. US 12,099,085 B2 meets all claim limitation of claim 35, except the claim limitations of “a second RF path and a second signal line of the second RF path. Song teaches a first signal line of a first path (e.g. fig. 9, [0078], first signal path 322), and a second signal line of a second path (e.g. fig. 9, [0078], first signal path 321). It would produce a predictive result of using the first MEMS switch having a second RF path and a second signal line of the second RF path, for the purpose of increasing functionalities and flexibilities of the first MEMS switch to improve signal routing efficiency. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified claim 1 of U.S. Patent No. US 12,099,085 B2 by applying the teaching of Song to explicitly have the limitations of “a second RF path and a second signal line of the second RF path”, for the purpose of increasing functionalities and flexibilities of the first MEMS switch to improve signal routing efficiency. Regarding claim 40, claim 40 is further met by claim 12 of U.S. Patent No. US 12,099,085 B2. This is a double patenting rejection since the conflicting claims have been patented. Allowable Subject Matter Claims 21-40 are objected to as being dependent upon a nonstatutory double patenting of 21, 30 and 35 but would be allowable the nonstatutory double patenting rejection of independent claims 21, 30 and 35 are properly overcome without broadening the scopes of independent claims 21, 30 and 35. Reasons for Allowance The following is an examiner’s statement of reasons for allowance: Regarding independent claim 21, the cited and/or searched prior arts either singularly or in combination fail to teaches all the limitations of independent claim 21, in particular the claim limitation of “wherein the plurality of MEMS switches comprise: a first MEMS switch having at least one input comprising a first terminal of the plurality of first terminals, wherein the first MEMS switch is configured to connect or disconnect a first output comprising a first signal line of a radio frequency (RF) path, a second output comprising a second signal line of a direct current (DC) path, and a third output; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch”; therefore, independent claim 21 is allowed, as are its dependent claims 22-29. Regarding independent claim 30, the cited and/or searched prior arts either singularly or in combination fail to teaches all the limitations of independent claim 30, in particular the claim limitation of “wherein the plurality of MEMS switches comprises: a first MEMS switch coupled to a first terminal of the plurality of first terminals and configured to connect or disconnect a first signal line of a first radio frequency (RF) path, a second signal line of a second RF path, and a third signal line of a direct current (DC) path; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the first RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the first RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch”; therefore, independent claim 30 is allowed, as are its dependent claims 31-34. Regarding independent claim 35, the cited and/or searched prior arts either singularly or in combination fail to teaches all the limitations of independent claim 35, in particular the claim limitation of “wherein the plurality of MEMS switches comprise: a first MEMS switch coupled to a first terminal of the plurality of first terminals and configured to connect or disconnect a first signal line of the first RF path and a second signal line of the second RF path; and a second MEMS switch coupled to a second terminal of the plurality of first terminals and configured to connect or disconnect the first signal line of the first RF path; wherein the first terminal and the second terminal are configured to be respectively coupled to a transmitter (Tx) pin and a receiver (Rx) pin of the semiconductor circuit so that the first signal line of the first RF path, when connected, extends between the Tx pin and the Rx pin of the semiconductor circuit and through the first MEMS switch and the second MEMS switch”; therefore, independent claim 35 is allowed, as are its dependent claims 36-40. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Prior Art of Record The prior art made of record is considered pertinent to applicant's disclosure. Jayaraman et al. (US 2018/0102581) teaches “a radio frequency system 20 in which coupler circuits 10a, 10b, and 10c are arranged in a daisy chain according to an embodiment. Each of the coupler circuits 10a, 10b, and 10c can implement the coupler circuit 10 of FIG. 1 in a different module. In particular, the coupler circuit 10a can be implemented in module 1, the coupler circuit 10b can be implemented in module 2, and the coupler circuit 10c can be implemented in module 3. As illustrated, each of the coupler circuits 10a, 10b, and 10c have the same circuit topology. This can provide flexibility in arranging the modules that include these coupler circuits in a daisy chain and/or including one of more of the coupler circuits in a different daisy chain arrangement with one or more coupler circuits from one or more other modules. Coupler circuits of different modules can be electrically connected to each other by way of contacts (e.g., pins, pads, etc.) of the modules. Only one of the coupler circuits 10a, 10b, and 10c can be receiving an internal coupler signal from an RF coupler at a time. A DC blocking element 22 can be coupled between an output of the daisy chain and a transceiver 24. The DC blocking element 22 can be a DC blocking capacitor arranged to block a DC component of the output of the daisy chain. A power detector of the transceiver 24 can receive the output of the daisy chain with the DC component stripped and provide an indication of power of a signal associated with a signal path of an active module. As shown in FIG. 2, modules 1 and 3 are inactive and module 2 is active. Accordingly, the power detector can provide an indication of power of a signal path of module 2 in a state corresponding to FIG. 2” (e.g. fig. 2, [0058]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAIDONG ZHANG whose telephone number is (571)270-5815. The examiner can normally be reached on M-F 8:00 AM - 5:00 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached on (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAIDONG ZHANG/Examiner, Art Unit 2858 /RAUL J RIOS RUSSO/Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Aug 12, 2024
Application Filed
Sep 11, 2024
Response after Non-Final Action
Jun 29, 2026
Non-Final Rejection mailed — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
94%
With Interview (+13.3%)
2y 11m (~1y 0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 470 resolved cases by this examiner. Grant probability derived from career allowance rate.

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