Prosecution Insights
Last updated: October 02, 2026
Application No. 18/801,310

IMAGE SENSOR AND IMAGE SENSOR MANUFACTURING METHOD

Non-Final OA §102
Filed
Aug 12, 2024
Priority
Feb 27, 2024 — JP 2024-027164
Examiner
ARMAND, MARC ANTHONY
Art Unit
Tech Center
Assignee
OmniVision Technologies Inc.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
901 granted / 1080 resolved
+23.4% vs TC avg
Minimal +4% lift
Without
With
+4.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
32 currently pending
Career history
1097
Total Applications
across all art units

Statute-Specific Performance

§101
3.7%
-36.3% vs TC avg
§103
58.1%
+18.1% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
8.4%
-31.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1080 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-5,8-15,18-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim et al., (Kim) US 2024/0162257. Regarding claim 1, Kim shows in FIG. 2-7, and discloses an image sensor including a substrate (110)[0027] having a multilayer structure, the image sensor comprising: a photodiode (PD)[0065] formed in a lower layer of the substrate (110); a floating diffusion (FD)[0066] and a ground region [0080], each of which is formed in or on top of an upper layer of the substrate (110); a transfer channel (between GBH1,2)[0040] having a lower end connected to the photodiode (PD) and an upper end connected to the floating diffusion (FD); and an insulation film (142)[0040] blocking at least a shortest path between the transfer channel and the ground region [0040]. Regarding claim 2, Kim shows in FIG. 2-7, an image sensor, wherein a trench is formed (TG) [0062], which has a frame shape that surrounds the transfer channel [0040], a gate insulation film (142) is formed at least at a side surface of the trench, and the transfer channel is enclosed in a tubular manner (between GB1, GB2) by the gate insulation film (142). Regarding claim 3, Kim shows in FIG. 2-7, an image sensor, wherein the gate insulation film (142) is formed at a bottom surface of the trench in addition to at the side surface, a transfer gate (TG) is formed on top of the gate insulation film (142), a depth of the trench exceeds a thickness of the transfer gate, and the transfer gate is formed at a bottom part of the trench. Regarding claim 4, Kim shows in FIG. 2-7, an image sensor, wherein the floating diffusion (FD) is an epitaxial layer [0027]. Regarding claim 5, Kim shows in FIG. 2-7, an image sensor, wherein the transfer channel (TG) has a lower impurity concentration (boron)(epitaxial can be n or P type)[0027] than the floating diffusion and the photodiode. Regarding claim 8, Kim shows in FIG. 2-7, an image sensor, further comprising: a transfer gate (TG) located adjacent to the transfer channel in a surface direction; and an element-isolating insulation film (122)[0079] that surrounds the photodiode (PD), wherein the transfer channel [0040] is enclosed in a tubular manner by the gate insulation film (142) and the element-isolating insulation film. Regarding claim 9, Kim shows in FIG. 2-7, an image sensor, comprising a photoelectric conversion unit including the photodiode (PD), the transfer gate (TG), the gate insulation film (142), and the element-isolating insulation film (120), wherein the image sensor includes a plurality of such photoelectric conversion units, and a single such transfer channel and a single such floating diffusion (FD) which are surrounded by the plurality of photoelectric conversion units (see FIG. 2). Regarding claim 10, Kim shows in FIG. 2-7, an image sensor wherein the ground region is an epitaxial layer [0027]. Regarding claim 11, Kim shows in FIG. 2-7, a manufacturing method of an image sensor including a substrate (110)[0065] having a multilayer structure, the image sensor manufacturing method comprising: forming a photodiode (PD) in a lower layer of the substrate; forming a transfer channel (TG) such that its lower end is connected to the photodiode (PD)[0068]; forming a floating diffusion (FD) in or on top of an upper layer of the substrate such that an upper end of the transfer channel is connected thereto; and forming a ground region (GND) in or on top of the upper layer, wherein the image sensor manufacturing method further comprises forming an insulation film which blocks at least a shortest path between the transfer channel (between GB1,2) and the ground region (GND). Regarding claim 12, Kim shows in FIG. 2-7, an image sensor manufacturing method, comprising: forming a trench [0062] having a frame shape that surrounds the transfer channel (between TG)[0040]; and forming a gate insulation film (142) at least at a side surface of the trench, wherein the transfer channel is enclosed in a tubular manner by the gate insulation film. Regarding claim 13, Kim shows in FIG. 2-7, an image sensor manufacturing method comprising: forming the gate insulation film (142) at a bottom surface of the trench in addition to at the side surface; and forming a transfer gate (TG) on top of the gate insulation film, wherein a depth of the trench exceeds a thickness of the transfer gate, and the transfer gate (TG) is formed at a bottom part of the trench. Regarding claim 14, Kim shows in FIG. 2-7, an image sensor manufacturing method comprising forming the floating diffusion (FD) by epitaxial growth [0027]. Regarding claim 15, Kim shows in FIG. 2-7, an image sensor manufacturing method wherein the transfer channel (between TG) has a lower impurity concentration than the floating diffusion and the photodiode [0027]. Regarding claim 18, Kim shows in FIG. 2-7, an image sensor manufacturing method further comprising: forming a transfer gate (TG)adjacent to the transfer channel in a surface direction; and forming an element-isolating insulation film (120) that surrounds the photodiode (PD), the transfer channel (between TG), the floating diffusion (FD), and the transfer gate, wherein an entire periphery of the transfer channel is enclosed by the gate insulation film and the element-isolating insulation film. Regarding claim 19, Kim shows in FIG. 2-7, an image sensor manufacturing method comprising: forming a photoelectric conversion unit including the photodiode (PD), the transfer gate (TG), the gate insulation film (142), and the element-isolating insulation film (120); and further forming a plurality of such photoelectric conversion units, and a single such transfer channel and a single such floating diffusion which are surrounded by the plurality of photoelectric conversion units (see FIG. 2). Regarding claim 20, Kim shows in FIG. 2-7, an image sensor manufacturing method comprising forming the ground region (GND) by epitaxial growth [0027]. Allowable Subject Matter Claims 6,7,16,17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARC-ANTHONY ARMAND whose telephone number is (571)272-5178. The examiner can normally be reached 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B Gauthier can be reached at 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MARC - ANTHONY ARMAND Primary Examiner Art Unit 2813 /MARC-ANTHONY ARMAND/Primary Examiner, Art Unit 2813
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Prosecution Timeline

Aug 12, 2024
Application Filed
Aug 12, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
88%
With Interview (+4.2%)
2y 5m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1080 resolved cases by this examiner. Grant probability derived from career allowance rate.

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