Prosecution Insights
Last updated: October 04, 2026
Application No. 18/801,758

METHOD FOR ATTACHING A BRIDGING METAL LAYER IN VIA HOLES FOR SUPPORTING POSTS

Non-Final OA §102§103
Filed
Aug 13, 2024
Examiner
PAGE, STEVEN MITCHELL CHR
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
National Chung Shan Institute of Science and Technology
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
387 granted / 463 resolved
+15.6% vs TC avg
Moderate +9% lift
Without
With
+8.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
24 currently pending
Career history
477
Total Applications
across all art units

Statute-Specific Performance

§101
3.8%
-36.2% vs TC avg
§103
38.9%
-1.1% vs TC avg
§102
35.6%
-4.4% vs TC avg
§112
20.6%
-19.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 463 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-5 and 7-9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (CN 108507685 B, hereinafter Wang) With regards to claim 1, Wang discloses a method for attaching a bridging metal layer in supporting post via holes for an integrated circuit device, (FIGS. 1-15) the method comprising (A) providing an integrated circuit wafer (at least wafer 1) with an outermost layer as a first coating layer; (SiN insulating medium layer 3) (B) forming a sacrificial layer (polyimide layer 4) on the first coating layer, and then forming a dielectric supporting layer (SiO film 6) on the sacrificial layer to obtain a plurality of supporting post via holes; (C) forming a bridging metal layer (metal layer 12) in the supporting post via holes and then forming a second coating layer; (SiN layer 14) and (D) forming a connecting metal layer (metal layer 18) on the bridging metal layer and then forming a third coating layer (SIN protective layer 21) on the bridging metal layer to obtain a plurality of supporting posts. With regards to claim 2, Wang discloses the method of claim 1, wherein the first coating layer, the second coating layer, and the third coating layer are made from silicon nitride. (SiN layer 3, 14, and 21. See Paragraphs [0021]-[0084]) With regards to claim 3, Wang discloses the method of claim 1, wherein the sacrificial layer is made from polyimide. (polyimide. See Paragraph [0048]) With regards to claim 4, Wang discloses the method of claim 1, wherein the bridging metal layer is made from titanium. (“…the electrode layer 12 of the electrode metal is TiN, Ti…”) With regards to claim 5, Wang discloses the method of claim 4, wherein the deposition area of the bridging metal layer is controlled using a photomask design. (“Step 102: spin-coating polyimide on the insulating medium layer to obtain the first sacrificial layer, and using photolithography…”) With regards to claim 7, Wang discloses the method of claim 1, wherein one end of the supporting post comprises a supporting post base. (See at least FIG. 4, showing the base) With regards to claim 8, Wang discloses the method of claim 7, wherein the supporting post base comprises the supporting post via hole. (See at least FIG. 4, showing the hole) With regards to claim 8, Wang discloses the method of claim 7, wherein the supporting post base is cylindrical, elliptical, or rectangular. (See FIGS. 4 and 16, showing the rectangular shape) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 108507685 B, hereinafter Wang) With regards to claim 6, Wang discloses the method of claim 1. However, Wang does not explicitly teach wherein the connecting metal layer is made from vanadium. It should be noted that Vanadium is one of a limited number of well-known metals, and it would be obvious to substitute one known element for another to obtain predictable results, namely conduction. Therefore, it would have been obvious to one of ordinary skill in the art to modify the device of Wang to have Vanadium as the electrode material. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Mezenner (US 20050146770 A1) – via hole Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN M Page whose telephone number is (571)272-3249. The examiner can normally be reached M-F: 10:00AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8548. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STEVEN M PAGE/Primary Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 13, 2024
Application Filed
Aug 28, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
92%
With Interview (+8.7%)
2y 3m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 463 resolved cases by this examiner. Grant probability derived from career allowance rate.

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