DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 29, 2026 has been entered.
Status of the Claims
Amendment filed May 29, 2026 is acknowledged. Claims 1, 16 and 18-20 have been amended. Claims 1-20 are pending.
Action on merits of claims 1-20 follows.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
There does not appear to be a written description of the claim limitation “a top surface of each of the p-type region and the n-type region is in contact with bottoms of at least three of the plurality of trenches” (amended claims 1); and “a top surface of each of the n-type region and the plurality of p-type regions is in contact with the bottoms of the plurality of trenches” (amended claim 16); and “a top surface of each of the plurality of p-type regions and the n-type region is in contact with bottoms of at least three of the plurality of trenches” (amended claim 20) (emphasis added) in the application as filed.
Applicant must cancel the un-support new matters in response to the Office Action.
Applicant insists that top surface of n-type region 15 is in contact with the bottoms of at least three, or plurality of trenches 30.
However, as clearly shown in FIGs. 7A and 7B, the top surface of the n-type region 15 is way above the bottoms of the trenches 30.
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The rejection is maintained.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 9 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 recites: the power semiconductor device according to claim 8, further comprising a plurality of unit cells, wherein one of the plurality of unit cells includes one of the plurality of n-type regions that is in contact with a bottom, and a portion of a side wall, of one of the plurality of trenches.
However, amended independent claim 1 has already claimed: “a top surface of each of the p-type region and the n-type region is in contact with bottoms of at least three of the plurality of trenches”.
Claim 9 contravenes claim 1 because: if the top surface of the n-type region is in contact with bottom surface of the trenches (claim 1), then the n-type region cannot in contact with a side wall of the trenches.
Claim 9 contravenes claim 1. Therefore, claim 9 is indefinite.
Further, how many bottom does a trench have?
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 7 and 10 are rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Claim 7 recites: the power semiconductor device according to claim 4, wherein bottom surfaces of the plurality of p-type regions are in contact with the drift layer.
However, amended independent claim 1 has already claimed: “a bottom surface of the p-type region and a bottom surface of the n-type region are in contact with the drift layer at a same depth”.
Therefore, claim 7 fails to further limit claim 1.
Claim 10 recites: the power semiconductor device according to claim 8, wherein bottom surfaces of the plurality of n-type regions are in contact with the drift layer.
However, amended independent claim 1 has already claimed: “a bottom surface of the p-type region and a bottom surface of the n-type region are in contact with the drift layer at a same depth”.
Therefore, claim 10 fails to further limit claim 1.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-5, 7-12 and 14-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by NOBORIO et al. (US. Pub. No. 2012/0319136).
With respect to claim 1, As best understood by the Examiner, NOBORIO teaches a trench-type power semiconductor device, as claimed including:
an n-type drift layer (2);
a p-type base layer (3) provided above the drift layer (2);
a plurality of trenches (6) penetrating through the base layer (3);
an n-type region (2a) formed between the base layer (3) and the drift layer (2) in a thickness direction (z) of the base layer (3); and
a p-type region (10) selectively formed between the base layer (3) and the drift layer (2) in the thickness direction (z), wherein
a top surface of each of the p-type region (10) and the n-type region (2a) is in contact with bottoms of at least three (not shown) of the plurality of trenches,
a bottom surface of the p-type region (10) and a bottom surface of the n-type region (2a) are in contact with the drift layer (2) at a same depth, and
the n-type region has an impurity concentration higher than an impurity concentration of the drift layer (2). (See FIGs. 23D-E, 25 D-E).
Note that, NOBORIO designates “n-” for the n-type region between the p-type regions 10 (see FIG. 23D) and “2a” that includes portions n+ and n- for the n-type region between the p-type regions 10 (see FIG. 24D).
Reading the limitation: “a top surface of each of the p-type region and the n-type region is in contact with bottoms of at least three of the plurality of trenches”, since both p-type region (10) and the n-type region (2a) are contacted with the bottom surface of the trench 6, the limitation is met.
Regarding the limitation: “a bottom surface of the p-type region and a bottom surface of the n-type region are in contact with the drift layer at a same depth”, as shown in FIG. 23D and 24D, both p-type region 10 and n-type region (n-) are in contact with the drift layer at a same depth, the limitation is met.
Regarding the limitation “the n-type region has an impurity concentration higher than an impurity concentration of the drift layer”, NOBORIO, ¶ [0165] and [0171], teaches: “a region of the n- type drift layer 2 sandwiched between two adjacent p type deep layers 10 can be formed as a region having a higher concentration than a region located below the p type deep layer 10”, thus, the limitation is met.
Therefore, claim 1 is anticipated by NOBORIO.
With respect to claim 2, each of the plurality of trenches (6) of NOBORIO has a striped planar pattern.
With respect to claim 3, the p-type region (10) of NOBORIO has an impurity concentration (E17-E19) higher than an impurity concentration (5E15-5E16) of the base layer (3).
With respect to claim 4, the p-type region (10) of NOBORIO is provided in plurality, the plurality of trenches (6) extend in parallel with each other, and the plurality of p-type regions (10a) each have a stripe shape and are provided side by side successively in a longitudinal direction of the plurality of trenches (6) in which the plurality of trenches (6) each extend.
With respect to claim 5, the power semiconductor device of NOBORIO further comprises a plurality of unit cells, wherein one of the plurality of unit cells includes one of the plurality of p-type regions (5) that is apart from the base layer (3).
With respect to claim 7, bottom surfaces of the plurality of p-type regions (10) of NOBORIO are in contact with the drift layer (2).
With respect to claim 8, the n-type region of NOBORIO is provided in plurality, the plurality of trenches (6) extend in parallel with each other, and the plurality of n-type regions each have a stripe shape and are provided side by side successively in a longitudinal direction of the plurality of trenches (6) in which the plurality of trenches each extend.
With respect to claim 9, As best understood by the Examiner, the power semiconductor device of NOBORIO further comprises a plurality of unit cells, wherein one of the plurality of unit cells includes one of the plurality of n-type regions that is in contact with a bottom, and a portion of a side wall, of one of the plurality of trenches (6).
With respect to claim 10, As best understood by the Examiner, bottom surfaces of the plurality of n-type regions (2a) of NOBORIO are in contact with the drift layer (2).
With respect to claim 11, top surfaces of the plurality of n-type regions of NOBORIO are in contact with the base layer (3).
With respect to claim 12, the plurality of trenches (6) of NOBORIO extend in parallel with each other and the p-type region (10) is provided in plurality, and the plurality of p-type regions (10) and the n-type region (2a) are provided such that one of the plurality of p-type regions (10) and the n-type region (2a) alternate in a direction (y) in which the plurality of trenches (6) extend.
With respect to claim 14, the power semiconductor device of NOBORIO is a silicon carbide semiconductor device.
With respect to claim 15, the power semiconductor device of NOBORIO is a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated-gate bipolar transistor (IGBT).
With respect to claim 16, As best understood by the Examiner, NOBORIO teaches a trench-type power semiconductor device, as claimed including:
an n-type drift layer (2);
a p-type base layer (3) provided above the drift layer;
a plurality of trenches (6) penetrating through the base layer (3) and extending in parallel with each other;
an n-type region (2a) formed between the base layer (3) and the drift layer (2) in a thickness direction (z) of the base layer; and
a plurality of p-type regions (10) selectively formed between base layer (3) and the drift layer (2) in the thickness direction (z), each p-type region (10) having a stripe shape and extending in a width direction (x) of the plurality of trenches, wherein
a top surface of each of the n-type region (2a) and the plurality of p-type regions (10) is in contact with the bottoms of the plurality of trenches (6),
a bottom surface of the p-type region (10) and a bottom surface of the n-type region (2a) are in contact with the drift layer (2) at a same depth, and
the n-type regions (2a) has an impurity concentration higher than an impurity concentration of the drift layer. (See FIGs. 23D-E, 25 D-E).
Note that, NOBORIO designates “n-” for the n-type region between the p-type regions 10 (see FIG. 23D) and “2a” that includes portions n+ and n- for the n-type region between the p-type regions 10 (see FIG. 24D).
Reading the limitation: “a top surface of each of the p-type region and the n-type region is in contact with bottoms of at least three of the plurality of trenches”, since both p-type region (10) and the n-type region (2a) are contacted with the bottom surface of the trench 6, the limitation is met.
Regarding the limitation: “a bottom surface of the p-type region and a bottom surface of the n-type region are in contact with the drift layer at a same depth”, as shown in FIG. 23D and 24D, both p-type region 10 and n-type region (n-) are in contact with the drift layer at a same depth, the limitation is met.
Regarding the limitation “the n-type region has an impurity concentration higher than an impurity concentration of the drift layer”, NOBORIO, ¶ [0165] and [0171], teaches: “a region of the n- type drift layer 2 sandwiched between two adjacent p type deep layers 10 can be formed as a region having a higher concentration than a region located below the p type deep layer 10”, thus, the limitation is met.
Therefore, claim 16 is anticipated by NOBORIO.
With respect to claim 17, As best understood by the Examiner, at least one of the plurality of p-type regions (10) of NOBORIO is in contact with a bottom, and a portion of a side wall, of at least one of the plurality of trenches (6).
With respect to claim 18, As best understood by the Examiner, each of the plurality of n-type regions (2a) of NOBORIO is in contact with bottoms, and portions of side walls, of the plurality of trenches (6).
With respect to claim 19, As best understood by the Examiner, the power semiconductor device of NOBORIO further comprises a plurality of unit cells, wherein in a cross section in the width direction, where one of the plurality of p-type regions (10) is in contact with bottoms of at least three of the trenches (6), a bottom surface of the base layer (3) is in contact with n-type regions (2a) in one of the plurality of unit cells and in contact with the one of the plurality of p-type regions (10) in another one of the plurality of unit cells.
With respect to claim 20, As best understood by the Examiner, NOBORIO teaches a trench-type power semiconductor device having a plurality of unit cells, as claimed including:
an n-type drift layer (2);
a p-type base layer (3) provided above the drift layer;
a plurality of trenches (6) penetrating through the base layer (3) and extending in parallel with each other;
an n-type region (2a) formed between the base layer (3) and the drift layer (2) in a thickness direction (z) of the base layer; and
a plurality of p-type regions (10) selectively formed between the base layer (3) and the drift layer (2) in the thickness direction (z), wherein
a top surface of each of the plurality of p-type regions (10) and the n-type region (2a) each having a top surface is in contact with bottoms of at least three of the plurality of trenches (6),
a bottom surface of the p-type region (10) and a bottom surface of the n-type region (2a) are in contact with the drift layer (2) at a same depth,
the n-type region (2a) has an impurity concentration higher than an impurity concentration of the drift layer (2), and
in a cross section passing through the plurality of p-type regions (10) in a width direction (x) of the plurality of trenches, a bottom surface of the base layer (3) is in contact with the top surface of the n-type region (2a) in one of the plurality of unit cells, and the bottom surface of the base layer (3) is in contact with the top surface of a corresponding one of the plurality of p-type regions (10) in another one of the plurality of unit cells. (See FIGs. 23D-E, 25 D-E).
Note that, NOBORIO designates “n-” for the n-type region between the p-type regions 10 (see FIG. 23D) and “2a” that includes portions n+ and n- for the n-type region between the p-type regions 10 (see FIG. 24D).
Reading the limitation: “a top surface of each of the p-type region and the n-type region is in contact with bottoms of at least three of the plurality of trenches”, since both p-type region (10) and the n-type region (2a) are contacted with the bottom surface of the trench 6, the limitation is met.
Regarding the limitation: “a bottom surface of the p-type region and a bottom surface of the n-type region are in contact with the drift layer at a same depth”, as shown in FIG. 23D and 24D, both p-type region 10 and n-type region (n-) are in contact with the drift layer at a same depth, the limitation is met.
Regarding the limitation “the n-type region has an impurity concentration higher than an impurity concentration of the drift layer”, NOBORIO, ¶ [0165] and [0171], teaches: “a region of the n- type drift layer 2 sandwiched between two adjacent p type deep layers 10 can be formed as a region having a higher concentration than a region located below the p type deep layer 10”, thus, the limitation is met.
Therefore, claim 20 is anticipated by NOBORIO.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over NOBORIO ‘136 as applied to claims 4 and 1 above, and further in view of HARA et al. (US. Pub. No. 2004/0094798).
With respect to claim 6, NOBORIO teaches the power semiconductor device as described in claim 4 above including the one of the plurality of unit cells includes the n-type region (2a), the n-type region (2a) being provided between the one of the plurality of p-type regions (10).
Thus, NOBORIO is shown to teach all the features of the claim with the exception of explicitly disclosing the n-type region being provided between the one of the plurality of p-type regions and the base layer.
However, HARA teaches a power semiconductor device including: one of the plurality of unit cells includes an n-type region (9), the n-type region (9) being provided between one of a plurality of p-type regions (10) and the base layer (5). (See FIG. 1).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the n-type region of NOBORIO being provided between one of the plurality of p-type regions and the base layer as taught by HARA to reduce parasitic capacitance of the semiconductor device.
With respect to claim 13, in view of HARA, the power semiconductor device further including a plurality of unit cells, a cell pitch of 1.05 µm, hence less than 4.0 μm.
It is well settled that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Claimed process which was performed at a temperature between 40 ºC and 80 ºC and an acid concentration between 25% and 70% was held to be prima facie obvious over a reference process which differed from the claims only in that the reference process was performed at a temperature of 100 ºC and an acid concentration of 10%.); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382 ("The normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages.").
Response to Arguments
Applicant’s arguments with respect to amended claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/ANH D MAI/Primary Examiner, Art Unit 2893
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