DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after allowance or after an Office action under Ex Parte Quayle, 25 USPQ 74, 453 O.G. 213 (Comm'r Pat. 1935). Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant's submission filed on July 27, 2026 has been entered.
Information Disclosure Statement
The references cited in the IDS have been considered by examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-6 and 8-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fujii (U.S. Patent Pub. No. 2014/0333676; already of record in IDS) and in view of Gao (U.S. Patent Pub. No. 2019/0004383).
Regarding claim 2, Fujii discloses a display device (10), (fig. 1, [0046]), comprising:
a display panel (600) comprising a first pixel column (i.e. column of pixels connected to sub-data line DA1) in which first color pixels (R) and third color pixels (B) are alternately disposed in a listed order, a second pixel column (i.e. column of pixels connected to sub-data line DB1) in which second color pixels (G) are disposed, a third pixel column (i.e. column of pixels connected to sub-data line DA2) in which the third color pixels (B) and the first color pixels (R) are alternately disposed in a listed order, a fourth pixel column (i.e. column of pixels connected to sub-data line DB2) in which the second color pixels (G) are disposed, and a fifth pixel column (i.e. extending the pattern further would result in the fifth pixel column being connected to sub-data line DA3) in which the first color pixels (R) and the third color pixels (B) are alternately disposed in a listed order, (fig. 6, [0111-0116]);
a scan driver (200) configured to successively apply a scan signal (S[1]-S[n]) having a gate-on voltage to scan lines connected to the first color pixels (R) , the second color pixels (G), and the third color pixels (B), (figs. 1 and 6, [0052]);
a data driver (300) comprising a first source channel (D1) configured to supply a first color data signal (R) corresponding to the first color pixels (R) and a second color data signal (G) corresponding to the second color pixels (G) to a first data line (D1), a second source channel (D2) configured to supply the second color data signal (G) and a third color data signal (D) corresponding to the third color pixels (D) to a second data line (D2), and a third source channel (D3) configured to supply the first color data signal (B) to a third data line (D3), (figs. 1 and 6, [0053, 0055 and 0120-0121]); and
a demultiplexer (500) connected both to a plurality of first sub-data lines (DA1-DAm) connected to the first color pixels (R) or the third color pixels (B), and to a plurality of second sub-data lines (DB1-DBm) connected to the second color pixels (G), and configured to successively select the first sub-data lines (DA1-DAm) and the second sub-data lines (DB1-DBm) during a period in which the scan signal (S1-Sn) having a gate-on level is supplied to each scan line, (figs. 6-7, [0112-0113, 0116 and 0125-0126]),
wherein the first sub-data lines (DA1-DAm) comprise a 1-1-th sub-data line (DA1) connected to the first color pixels (R) in the first pixel column, a 1-2-th sub-data line (DA2) connected to the third color pixels (B) in the third pixel columns, and a 1-3-th sub-data line (DA3) connected to the first color pixels (R) in the fifth pixel columns, (fig. 6, [0116]),
wherein each of the first color pixels (R) disposed in an odd-numbered pixel row (i.e. first row connected to scan line S1) comprises a first anode (i.e. anode of OLED) and a first connection portion (i.e. line that connects from sub-data line DA1 to pixel R) electrically connecting the first anode and a pixel circuit (i.e. anode of OLED and pixel circuit 20 of fig. 2) of the corresponding first color pixel (R), (figs. 2 and 6, [0058, 0062, 0064 and 0116]),
wherein each of the first color pixels (R) disposed in an even-numbered pixel row (i.e. second row connected to scan line S2) comprises a second anode (i.e. anode of OLED) and a second connection portion (i.e. line that connects from sub-data line DA2 to pixel R) electrically connecting the second anode and a pixel circuit (i.e. anode of OLED and pixel circuit 20 of fig. 2) of the corresponding first color pixel (R), (figs. 2 and 6, [0058, 0062, 0064 and 0116]).
However, Fujii does not mention a 1-2-th sub-data line connected to the third color pixels in the first and third pixel columns, and a 1-3-th sub-data line connected to the first color pixels in the third and fifth pixel columns.
In a similar field of endeavor, Gao teaches
a 1-2-th sub-data line (Data2) connected to the third color pixels (B) in the first and third pixel columns, and a 1-3-th sub-data line (Data3) connected to the first color pixels (R) in the third and fifth pixel columns, (fig. 2, [0028-0031]),
wherein each of the first color pixels (R) disposed in an odd-numbered pixel row (i.e. first row of pixels) comprises a first anode and a first connection portion (i.e. connection portion from data line Data3 to the transistor of R sub-pixel of the first row by fifth column) electrically connecting the first anode and a pixel circuit (i.e. sub-pixel circuit R) of the corresponding first color pixel (R),
wherein each of the first color pixels (R) disposed in an even-numbered pixel row (i.e. second row of pixels) comprises a second anode and a second connection portion (i.e. connection portion from data line Data3 to the transistor of R sub-pixel of the second row by third column) electrically connecting the second anode and a pixel circuit (i.e. sub-pixel circuit R) of the corresponding first color pixel (R), and
wherein a length of the first connection portion differs from a length of the second connection portion (i.e. length that connects from the data line Data3 to sub-pixel R of the first row by fifth column is shorter than the length that connects from the data line Data3 to the sub-pixel R of the second row by third column), (fig. 2, [0030-0032]).
Therefore, it would have been obvious to one of ordinary skills in the art at the effective filing date of the claimed invention to modify Fujii, by specifically providing the 1-2-th sub-data line connected to the third color pixels in the first and third pixel columns, and a 1-3-th sub-data line connected to the first color pixels in the third and fifth pixel columns, as taught by Gao, for the purpose of achieving a consistent charging state of each pixel, [0003].
Regarding claim 3, Gao discloses wherein the length of the first connection portion is shorter than the length of the second connection portion (i.e. length that connects from the data line Data3 to sub-pixel R of the first row by fifth column is shorter than the length that connects from the data line Data3 to the sub-pixel R of the second row by third column), (fig. 2, [0030-0032]).
Therefore, it would have been obvious to one of ordinary skills in the art at the effective filing date of the claimed invention to modify Fujii, by specifically providing the different connection portions, as taught by Gao, for the purpose of achieving a consistent charging state of each pixel, [0003].
Regarding claim 4, Gao discloses wherein each of the third color pixels (B) disposed in the odd-numbered pixel row (first row) comprises a third anode and a third connection portion (i.e. connection portion from data line Data2 to transistor of subpixel B of the first row by third column) electrically connecting the third anode and a pixel circuit of the corresponding third color pixel (i.e. sub-pixel B of the first row by third column),
wherein each of the third color pixels (B) disposed in the even-numbered pixel row (second row) comprises a fourth anode and a fourth connection portion (i.e. connection portion from data line Data2 to transistor of subpixel B of the second row by first column) electrically connecting the fourth anode and a pixel circuit of the corresponding third color pixel (i.e. subpixel B of the second row by first column), and
wherein a length of the third connection portion differs from a length of the fourth connection portion (i.e. the connection portion from data line Data2 to the subpixel B of the first row by third column is shorter than the connection portion from the data line Data2 to the subpixel B of the second row by first column), (fig. 2, [0028-0032]).
Therefore, it would have been obvious to one of ordinary skills in the art at the effective filing date of the claimed invention to modify Fujii, by specifically providing the different connection portions, as taught by Gao, for the purpose of achieving a consistent charging state of each pixel, [0003].
Regarding claim 5, Gao discloses wherein the length of the third connection portion is shorter than the length of the fourth connection portion (i.e. the connection portion from data line Data2 to the subpixel B of the first row by third column is shorter than the connection portion from the data line Data2 to the subpixel B of the second row by first column), (fig. 2, [0028-0032]).
Therefore, it would have been obvious to one of ordinary skills in the art at the effective filing date of the claimed invention to modify Fujii, by specifically providing the different connection portions, as taught by Gao, for the purpose of achieving a consistent charging state of each pixel, [0003].
Regarding claim 6, Fujii discloses wherein the demultiplexer (500) repeatedly selects the first sub-data lines (DA1) and the second sub-data lines (DB1) on a scan line (S1) basis, (figs. 6-7, [0123-0126]).
Regarding claim 8, Fujii discloses wherein the second sub-data lines (DB1-DBm) comprise a 2-1-th sub-data line (DB1) connected to the second color pixels (G) disposed in the second pixel column, and a 2-2-th sub-data line (DB2) connected to the second color pixels (G) disposed in the fourth pixel column, (fig. 6, [0116]).
Regarding claim 9, Fujii discloses wherein the 2-1-th and 2-2-th sub-data lines (DB1 and DB2) are supplied with only the second color data signal (G), (figs. 6-7, [0116 and 0126]).
Regarding claim 10, Fujii discloses wherein each of the second color pixels (G) disposed in the odd-numbered pixel row (i.e. pixel row connected to scan line S1) comprises a fifth anode (i.e. anode of OLED of the pixel) and a fifth connection portion (i.e. connection portion from the sub-data line DB1 to the pixel G) electrically connecting the fifth anode and a pixel circuit (20) of the corresponding second color pixel (G), wherein each of the second color pixels (G) disposed in the even-numbered pixel row (i.e. pixel row connected to scan line S2) comprises a sixth anode (i.e. anode of OLED of the pixel) and a sixth connection portion (i.e. connection potion from the sub-data line DB1 to the pixel G) electrically connecting the sixth anode and a pixel circuit (20) of the corresponding second color pixel (G), and wherein a length of the fifth connection portion is the same as a length of the sixth connection portion (i.e. the connection portions from the sub-data line DB1 to the pixels G of rows 1 and 2 are the same length), (figs. 2 and 6, [0058, 0062 and 0116]).
Regarding claim 11, Fujii discloses wherein the demultiplexer (500) comprises:
a plurality of first select transistors (MA1-MAm) disposed between the first data line (D1) and the 1-1-th sub-data line (DA1), between the second data line (D2) and the 1-2-th sub-data line (DA2), and between the third data line (D3) and the 1-3-th sub-data line (DA3); and
a plurality of second select transistors (MB1-MBm) disposed between the first data line (D1) and the 2-1-th sub-data line (DB1) and between the second data line (D2) and the 2-2-th sub-data line (DB2), (fig. 6, [0111-116]).
Regarding claim 12, Fujii discloses wherein a color of the first color pixels is red (R), a color of the second color pixels is green (G), and a color of the third color pixels is blue (B), (fig. 6).
Regarding claim 13, Fujii discloses wherein, when the display panel express a red pattern, the first select transistor (MA1) disposed between the first data line (D1) and the 1-1-th sub-data line (DA1) among the plurality of first select transistors (MA1-MAm) is turned on and the first source channel (D1) supplies the first color data signal (red data signal Red(i)) to the 1-1-th sub-data line (DA1) , and the first select transistor (MA1) between the third data line (D3) and the 1-3-th sub-data line (DA3) among the plurality of first select transistors (MA1-MAm) is turned on and the third source channel (D3) supplies the first color data signal (red data signal Red(i)) to the 1-3-th sub-data line (DA3), (figs. 6-7, [0113-0116, 0123-0125 and 0127]).
Regarding claim 14, Fujii discloses wherein, when the display panel express a green pattern,
the second select transistor (MB1) disposed between the first data line (D1) and the 2-1- th sub-data line (DB1) among the plurality of second select transistors (MB1-MBm) is turned on and the first source channel (D1) supplies the second color data signal (green data signal Green(i)) to the 2-1-th sub-data line (DB1), and
the second select transistor (MB2) between the second data line (D2) and the 2-2-th sub-data line (MB2) among the plurality of second select transistors (MB1-MBm) is turned on and the second source channel (D2) supplies the second color data signal (Green(i)) to the 2-2-th sub-data line (DB2), (figs. 6-7, [0113-0116 and 0123-0126]).
Regarding claim 15, Fujii discloses wherein, when the display panel express a blue pattern, the first select transistor (MA2) disposed between the second data line (D2) and the 1-2- th sub-data line (DA2) among the plurality of first select transistors (MA1-MAm) is turned on and the second source channel (D2) supplies the third color data signal (blue data signal (Blue(i)) to the 1-2-th sub-data line (DA2), (figs. 6-7, [0112-0114 and 0123-0125]).
Allowable Subject Matter
Claim 7 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Allowance
Claim 7, none of the prior art of record teaches alone or in combination the limitation “wherein the 1-1-th and 1-3-th sub-data lines are supplied with only the first color data signal, the 1-2-th sub-data line is supplied with only the third color data signal.”
Inquiries
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LONG D PHAM whose telephone number is (571)270-5573. The examiner can normally be reached Monday - Friday: 9am-5pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh D Nguyen can be reached at 571-272-7772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LONG D PHAM/Primary Examiner, Art Unit 2623
Prosecution Insights