Prosecution Insights
Last updated: October 01, 2026
Application No. 18/806,055

PACKAGE SUBSTRATE AND FABRICATING METHOD THEREOF

Non-Final OA §102§103
Filed
Aug 15, 2024
Priority
Jun 05, 2024 — TW 113120889
Examiner
ANYA, IGWE U
Art Unit
Tech Center
Assignee
Siliconware Precision Industries Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
817 granted / 961 resolved
+25.0% vs TC avg
Minimal -4% lift
Without
With
+-3.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
26 currently pending
Career history
970
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
36.6%
-3.4% vs TC avg
§112
6.9%
-33.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 961 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 – 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Li et al. (TW202308487). PNG media_image1.png 281 567 media_image1.png Greyscale (Claim 1) Li et al. teach a package substrate, comprising: a dielectric layer (11) having a first surface (11/30 interface) and a second surface (11/15 interface) opposite to the first surface; a first circuit layer (13) embedded in the first surface (11/30 interface) of the dielectric layer, wherein the first circuit layer (13) is flush with the first surface (11/30 interface) of the dielectric layer (11); a heterogeneous layer (30) formed on the first surface (11/30 interface) of the dielectric layer (11); a second circuit layer (15) formed on the second surface (11/15 interface) of the dielectric layer (11); and a plurality of conductive blind holes (via connecting 13 and 15) formed in the dielectric layer and electrically connected to the first circuit layer and the second circuit layer. (Claim 2) Li et al. teach wherein a material forming the first circuit layer (metal foil) is different from a material forming the heterogeneous layer (30, anisotropic film, see paragraphs under “MODE-FOR-INVENTION”). (Claim 3) Li et al. teach wherein the heterogeneous layer (30) is a conductive material excluding a copper layer. (Claim 4) Li et al. teach wherein the conductive material (30, anisotropic film) is an anisotropic conductive film. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 5 – 10 are rejected under 35 U.S.C. 103 as being unpatentable over Applicant’s Admitted prior Art (AAPA). (Claim 5) AAPA teach a method of manufacturing an electronic package, comprising: providing a board body (fig. 1 A #9) having a forming a first circuit layer on the forming a dielectric layer on the wherein the dielectric layer has a first surface and a second surface opposite to the first surface, and the first surface of the dielectric layer is bonded to the heterogeneous layer; forming a second circuit layer on the second surface of the dielectric layer, and forming a plurality of conductive blind holes in the dielectric layer which are electrically connected to the first circuit layer and the second circuit layer in the dielectric layer; and removing the board body. AAPA lack wherein the bonding layer is a heterogeneous layer. However, Li et al. teach wherein the bonding layer (30) is a heterogeneous layer as art recognized equivalents (see paragraphs under “MODE-FOR-INVENTION”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references as recognized equivalents. (Claim 6) AAPA lack wherein a material forming the first circuit layer is different from a material forming the heterogeneous layer. However, Li et al. teach wherein a material forming the first circuit layer (13, metal foil) is different from a material forming the heterogeneous layer (30, anisotropic conductive film) as art recognized equivalents (see paragraphs under “MODE-FOR-INVENTION”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references as recognized equivalents. However, Li et al. teach wherein a material forming the first circuit layer (13, metal foil) is different from a material forming the heterogeneous layer (30, anisotropic conductive film) as art recognized equivalents (see paragraphs under “MODE-FOR-INVENTION”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references as recognized equivalents. (Claim 7) AAPA lack wherein the heterogeneous layer is made from a conductive material exclusive of copper. However, Li et al. teach wherein the heterogeneous layer (30, anisotropic conductive film) is made from a conductive material exclusive of copper as art recognized equivalents (see paragraphs under “MODE-FOR-INVENTION”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references as recognized equivalents. (Claim 8) AAPA lack wherein the conductive material is an anisotropic conductive film. However, Li et al. teach wherein the conductive material (30) is an anisotropic conductive film (30, anisotropic conductive film) as art recognized equivalents (see paragraphs under “MODE-FOR-INVENTION”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references as recognized equivalents. (Claim 9) AAPA teach wherein a release layer is first formed on the board body, and then the heterogeneous layer is formed on the release layer. (Claim 10) AAPA teach the method, further comprising removing the Conclusion Prior art made of record and not relied upon, considered pertinent to applicant's disclosure are listed in PTO – 892 Form. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to IGWE U ANYA whose telephone number is (571)272-1887. The examiner can normally be reached 8:00 AM - 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571) 272- 1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /IGWE U ANYA/Primary Examiner, Art Unit 2891 August 22, 2026
Read full office action

Prosecution Timeline

Aug 15, 2024
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
81%
With Interview (-3.7%)
2y 6m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 961 resolved cases by this examiner. Grant probability derived from career allowance rate.

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