Prosecution Insights
Last updated: October 04, 2026
Application No. 18/806,197

SCAN NEEDLE AND SCAN DISPLAY SYSTEM INCLUDING SAME

Non-Final OA §102§103§112
Filed
Aug 15, 2024
Priority
Aug 05, 2020 — continuation of 11/527,572 +1 more
Examiner
GEBREMARIAM, SAMUEL A
Art Unit
Tech Center
Assignee
Jade Bird Display (shanghai) Limited
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
704 granted / 846 resolved
+23.2% vs TC avg
Moderate +8% lift
Without
With
+8.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
20 currently pending
Career history
856
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
38.4%
-1.6% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
22.6%
-17.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 846 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The limitation “the bonding layer” as recited in claim 4 is unclear as to what it refers to in claim 1. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-8, 10-15, 17, 19 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al., US 2018/0090058. Regarding claim 1, Chen discloses (figs. 3-15 and related text) a micro-light emitting diode (LED) structure [0040], comprising: a substrate (310); at least one micro-LED (320) formed above the substrate (310), wherein the at least one micro-LED comprises: a metal layer (317, fig. 3) formed above the substrate (310); a light emitting layer (solid black layer [0040]) formed above the metal layer (317); an insulating layer (1310) covering the micro-LED (fig. 13A) and including an opening exposing a portion of the light emitting layer (fig. 13A); and a transparent conductive layer (1320, [0054]) covering the insulating layer (1310) and electrically connected to the light emitting layer via the opening of the insulating layer [0054]. Regarding claim 2, Chen discloses a micro-lens (1570) formed above the micro-LED (320) and vertically aligned with the micro-LED (fig. 15). Regarding claim 3, Chen discloses a transparent isolation layer (1560) formed between the micro-lens (1570) and the micro-LED (320). Regarding claim 4, as best the examiner is able to ascertain the claimed invention, Chen discloses a profile of the light emitting layer ([0040]) vertically projected on a top surface of the substrate (310) is surrounded by a profile of the metal layer (fig. 13C) vertically projected on the top surface of the substrate (310). Regarding claim 5, Chen discloses the insulating layer (1310) includes a protrusion protruding in a direction away from the substrate (310), the protrusion surrounding the opening of the insulating layer (1310, fig. 13A). Regarding claim 6, Chen discloses a plurality of the micro-LEDs (320, [0040]) formed above the substrate (310). Regarding claim 7, Chen discloses a light-isolating wall (1335/1337) formed between adjacent micro-LEDs (fig. 13C). Regarding claim 8, Chen discloses a height of the light-isolating wall (1335/1337) is greater than or equal to a height of the adjacent micro-LED (fig. 13C). Regarding claim 10, Chen discloses the plurality of the micro-LEDs are configured to emit light having different colors [0037]. Regarding claim 11, Chen discloses the plurality of the micro-LEDs are arranged in an array (fig. 3, [0040]). Regarding claim 12, Chen discloses each one of the plurality of the micro-LEDs is a red LED, a green LED, or a blue LED (RGB [0034]). Regarding claim 13, Chen discloses each one of the plurality of the micro-LEDs is configured to emit light with a color selected from red, green, blue, and yellow (RGB, [0034]). Regarding claim 14, Chen discloses a pixel is formed by an array of the plurality of the micro-LEDs (fig. 1 and related text). Regarding claim 15, Chen discloses a pixel is formed by one of the plurality of the micro-LEDs (fig. 1 and related text). Regarding claim 17, Chen discloses the plurality of the micro-LEDs are formed to have the same size (fig. 3). Regarding claim 19, Chen discloses the substrate comprises: a drive circuit (315) configured to control the at least one micro-LED; and an interconnection layer electrically connected to the metal layer of the at least one micro-LED [0040]. Regarding claim 21, Chen discloses the insulating layer (1310) is formed at least at the sidewall of the micro-LED (fig. 13A). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 9 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hiroyama US 2009/0166644. Regarding claim 9, Chen does not disclose the plurality of the micro-LEDs are configured to emit light having the same color. Hiroyama discloses the plurality of the micro-LEDs are configured to emit light having the same color ([0089], white light) to provide monolithic light emitting device excellent in color tone stability [0010]. Chen and Hiroyama are analogous art because they both are directed to semiconductor devices with metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chen with the specified features as taught by Hiroyama because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, on the effective filing date of the claimed invention, to modify Chen to include the micro-LEDs as taught by Hiroyama to provide monolithic light emitting device excellent in color tone stability [0010]. Claim(s) 16 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Chen. Regarding claims 16 and 18, Chen does not explicitly disclose a space between adjacent micro-LEDs is less than 5 μm or the plurality of the micro-LEDs are formed to have different sizes. Parameters such as spacing between adjacent devices and sizes of devices in the art of semiconductor process are subject to routine experimentation and optimization to achieve the desired device characterization during fabrication. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize appropriate spacing or size of the devices as claimed to meet the requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233. Claim(s) 20 and 22-24 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hsia et al., US 20120181568. Regarding claim 20, Chen does not explicitly disclose the metal layer contacts an entirety of a bottom surface of the light emitting layer. Hsia discloses (fig. 5 and related text) a metal (136) contacts an entirety of a bottom surface of the light emitting layer (112) to make LED packaging structures and methods that are capable of providing electrical connections for the LEDs with a small form factor while reducing manufacturing cost and time [0002]. Chen and Hsia are analogous art because they both are directed to semiconductor devices with metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chen with the specified features of Hsia because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, on the effective filing date of the claimed invention, to modify Chen to include the metal layer as taught by Hsia to make LED packaging structures and methods that are capable of providing electrical connections for the LEDs with a small form factor while reducing manufacturing cost and time [0002]. Regarding claim 22, Chen does not disclose the insulating layer is further formed on the sidewall surface of the metal layer. Hsia discloses the insulating layer (140) is formed on a surface of the sidewall of the metal layer (136) to make LED packaging structures and methods that are capable of providing electrical connections for the LEDs with a small form factor while reducing manufacturing cost and time [0002]. Chen and Hsia are analogous art because they both are directed to semiconductor devices with metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chen with the specified features of Hsia because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, on the effective filing date of the claimed invention, to modify Chen to include the insulating layer as taught by Hsia to make LED packaging structures and methods that are capable of providing electrical connections for the LEDs with a small form factor while reducing manufacturing cost and time [0002]. Regarding claim 23, Chen as modified by Hsia the insulating layer (140, Hsia) is further formed on the substrate (126, Hsia) at a side of the metal layer (136, Hsia). Regarding claim 24, Chen does not disclose the light emitting layer comprises multiple layers. Hsia discloses a light emitting layer (112) comprising multiple quantum wells [0010] to make LED packaging structures and methods that are capable of providing electrical connections for the LEDs with a small form factor while reducing manufacturing cost and time [0002]. Chen and Hsia are analogous art because they both are directed to semiconductor devices with metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chen with the specified features of Hsia because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, on the effective filing date of the claimed invention, to modify Chen to include the multiple quantum layers as taught by Hsia to make LED packaging structures and methods that are capable of providing electrical connections for the LEDs with a small form factor while reducing manufacturing cost and time [0002]. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL A GEBREMARIAM whose telephone number is (571)272-1653. The examiner can normally be reached 8:30-4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811
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Prosecution Timeline

Aug 15, 2024
Application Filed
Sep 18, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
91%
With Interview (+8.1%)
2y 9m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 846 resolved cases by this examiner. Grant probability derived from career allowance rate.

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