DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 11-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin (CN217507310U).
Regarding claim 1, Lin teaches a method for forming a bonded structure, comprising:
providing a first carrier having an upper surface (Fig. 4A, first carrier 31),
providing a bonding structure over the upper surface of the first carrier, wherein the bonding structure comprises a contact pad at least partially embedded in a first dielectric material, and wherein a first surface of the bonding structure comprising the first dielectric material and the contact pad is adjacent the upper surface of the first carrier (Fig. 4B, first dielectric material 102, contact pad 101),
providing a routing structure over a second surface of the bonding structure (Fig. 4E, 10),
removing the first carrier to expose the first surface (Fig. 4I), and
hybrid bonding the first surface of the bonding structure to another element (Fig. 4J, steps similar to those of Fig. 3; see Fig. 3F and corresponding text referring to HBI (hybrid bonding interconnect)).
Regarding claim 11, Lin teaches providing a second carrier over the routing structure (Fig. 4H, 32),
directly bonding the first surface of the bonding structure to a semiconductor device, wherein the first dielectric material is directly bonded to a dielectric material disposed in a bonding layer of the semiconductor device and the contact pad is directly bonded to a conductive feature embedded in the dielectric material of the bonding layer of the semiconductor device (see Background for definition of HBI),
removing the second carrier (Fig. 4L), and
configuring the routing structure for bonding to a substrate (Fig. 4L, layer 107 removed to expose contacts 106, see Fig. 3I and corresponding text).
Regarding claim 12, Lin teaches wherein providing a second carrier over the routing structure is before removing the first carrier (Fig. 4H).
Regarding claim 13, Lin teaches depositing an encapsulant material embedding the semiconductor device (Fig. 4K, 203).
Regarding claim 14, Lin teaches wherein depositing the encapsulant material is before removing the second carrier (Fig. 4K).
Regarding claim 15, Lin teaches providing a support structure over the routing structure (Fig. 4H, 32),
directly bonding the first surface of the bonding structure to a semiconductor device, wherein the first dielectric material is directly bonded to a dielectric material disposed in a bonding layer of the semiconductor device and the contact pad is directly bonded to a conductive feature embedded in the dielectric material of the bonding layer of the semiconductor device (see Background for definition of HBI).
Claims 37 and 42 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lv (CN114171467A).
Regarding claim 37, Lv teaches an interconnect structure (Figs. 23-24) comprising:
a routing structure (circuit layer 200),
a bonding layer coupled with the routing structure and having a hybrid bonding surface, the bonding layer comprising:
a dielectric layer and a conductive contact feature at least partially embedded in the dielectric layer, wherein a cross-sectional area of the conductive contact feature increases with a distance from the hybrid bonding surface, wherein the cross-sectional area is parallel with the hybrid bonding surface (Figs. 23-24, reinforcing layer 200, metal material 265).
Regarding claim 42, Lv teaches wherein the routing structure is configured to solder attach to a substrate (Fig. 20, substrate 100, solder 1200).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (CN217507310U).
Regarding claim 2, Lin teaches wherein a dishing of the contact pad at the first surface is less than 5 nm (see Fig. 3I and corresponding text, Ra lower than 5 nm). In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. See MPEP 2144.05. Therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Lin such that a dishing of the contact pad at the first surface is less than 1 nm.
Regarding claim 4, Lin teaches wherein a dishing of the contact pad at the first surface is less than 5 nm (see Fig. 3I and corresponding text, Ra lower than 5 nm). Applicant’s Specification teaches where substantial flatness corresponds to 1nm of surface roughness ([0063]). In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. See MPEP 2144.05. Therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Lin such that the first surface is substantially flat.
Claims 2 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (CN217507310U) in view of Yu (U.S. PGPub 2020/0185330).
Regarding claim 2, Lin teaches wherein a dishing of the contact pad at the first surface is less than 5 nm (see Fig. 3I and corresponding text, Ra lower than 5 nm). In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. See MPEP 2144.05. Therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Lin such that a dishing of the contact pad at the first surface is less than 1 nm.
Regarding claim 4, Lin teaches wherein a dishing of the contact pad at the first surface is less than 5 nm (see Fig. 3I and corresponding text, Ra lower than 5 nm). Applicant’s Specification teaches where substantial flatness corresponds to 1nm of surface roughness ([0063]). In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. See MPEP 2144.05. Therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Lin such that the first surface is substantially flat.
Claims 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (CN217507310U) in view of Yu (U.S. PGPub 2020/0185330).
Regarding claims 6-9, Lin teaches releasing the first carrier from the bonding structure (Fig. 4I) but does not explicitly teach how the release is performed.
Yu teaches a release layer provided between a carrier and bonding structure (Fig. 15, 136, [0052]), wherein the release layer comprises a thermal, optical, or chemical release layer ([0052], UV debonding; Fig. 16, [0062], chemical or thermal release).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Yu with Lin such that the a release layer is formed between the first carrier and the bonding structure, wherein the release layer comprises a thermal release layer, an optical release layer, or a chemical release layer for the purpose of implementing the release process of Lin.
Claims 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (CN217507310U) in view of Rubin (U.S. PGPub 2021/0134728).
Regarding claim 10, Lin does not explicitly teach wherein the routing structure comprises an electrical device.
Rubin teaches wherein a routing structure comprises an electrical device (Figs. 4A-4B, 110, 450, [0073]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Rubin with Lin such that the routing structure comprises an electrical device for the purpose of providing an interconnect bridge (Rubin, [0073]).
Claims 26-27 and 32-33 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (CN217507310U) in view of Tu (CN114256167A).
Regarding claim 26, Lin teaches a method for forming a bonded structure, comprising:
providing a first carrier having an upper surface (Fig. 4A, first carrier 31),
forming a contact pad comprising a conductive material in a cavity in a first dielectric layer (Fig. 4B, first dielectric material 102, contact pad 101),
providing a routing structure over the first dielectric layer and the conductive material (Fig. 4E, 10),
removing the first carrier to expose a hybrid bonding surface comprising the first dielectric layer and the contact pad (Fig. 4I-4J, steps similar to those of Fig. 3; see Fig. 3F and corresponding text referring to HBI (hybrid bonding interconnect)).
Lin does not explicitly teach wherein the contact pad is formed by depositing a first dielectric layer over a first carrier, the first carrier having an upper surface, patterning the first dielectric layer to form at least one cavity through the first dielectric layer, and filling the at least one cavity with a conductive material to form a contact pad.
Tu teaches a depositing a first dielectric layer over a first carrier, the first carrier having an upper surface, patterning the first dielectric layer to form at least one cavity through the first dielectric layer, and filling the at least one cavity with a conductive material to form a contact pad (Figs. 3A-3F and corresponding text, dielectric 108, cavity 105, conductive material 122), and removing the first carrier to expose a hybrid bonding surface comprising the first dielectric layer and the contact pad (Figs. 3H-3G and corresponding text).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Tu with Lin such that the contact pad is formed by depositing a first dielectric layer over a first carrier, the first carrier having an upper surface, patterning the first dielectric layer to form at least one cavity through the first dielectric layer, and filling the at least one cavity with a conductive material to form a contact pad because the prior art teaches every element, a person of ordinary skill could have combined them as claimed and in combination each element performs the same function as it does separately, and the combination would have yielded predictable results to one of ordinary skill in the art before the time of the invention. See MPEP 2143(I)A.
Regarding claim 27, Lin teaches wherein a dishing of the contact pad at the first surface is less than 5 nm (see Fig. 3I and corresponding text, Ra lower than 5 nm). Applicant’s Specification teaches where substantial flatness corresponds to 1nm of surface roughness ([0063]). In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. See MPEP 2144.05. Therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Lin such that the first surface is substantially flat. It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Lin and Tu for the reasons set forth in the rejection of claim 26.
Regarding claim 32, Lin teaches providing a second carrier over the routing structure (Lin, Fig. 4H, 32), and directly bonding the first surface of the bonding structure to a semiconductor device, wherein the first dielectric material is directly bonded to a dielectric material disposed in a bonding layer of the semiconductor device and the contact pad is directly bonded to a conductive feature embedded in the dielectric material of the bonding layer of the semiconductor device (Lin, see Background for definition of HBI). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Lin and Tu for the reasons set forth in the rejection of claim 26.
Regarding claim 33, Lin teaches configuring the routing structure for bonding to a substrate (Lin, Fig. 4L, layer 107 removed to expose contacts 106, see Fig. 3I and corresponding text). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Lin and Tu for the reasons set forth in the rejection of claim 26.
Claim 36 is rejected under 35 U.S.C. 103 as being unpatentable over Lin (CN217507310U) in view of Tu (CN114256167A) and Seo (U.S. PGPub 2010/0285654).
Regarding claim 36, the combination of Lin and Tu does not explicitly teach patterning the first dielectric layer to form trenches having a gridline pattern, the trenches reaching the upper surface, providing an organic dielectric material over the first dielectric layer forming a second dielectric layer and filling the trenches, and wherein the at least one cavity is formed through the first dielectric layer and the second dielectric layer to receive the conductive material to form the contact pad.
Seo teaches patterning a dielectric layer to form trenches having a gridline pattern, the trenches reaching the upper surface, providing an organic dielectric material over the first dielectric layer forming a second dielectric layer and filling the trenches (Figs. 3A-3B, 120/125, [0057], filled with same material; [0030], polyimide; Fig. 5C, gridline).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Seo with Lin and Tu such that the method comprises patterning the first dielectric layer to form trenches having a gridline pattern, the trenches reaching the upper surface, providing an organic dielectric material over the first dielectric layer forming a second dielectric layer and filling the trenches, and wherein the at least one cavity is formed through the first dielectric layer and the second dielectric layer to receive the conductive material to form the contact pad for the purpose of relieving stress in the layer (Seo, [0019]-[0020]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALIA SABUR whose telephone number is (571)270-7219. The examiner can normally be reached M-F 9:30-5:30.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ALIA SABUR/Primary Examiner, Art Unit 2812