DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to because in figures 1 and 2 it is not possible to distinguish what components of the invention the labels 5 and 6 correspond to – both labels seem to point to the same part of the drawing. Drawings with clearer indications for elements 5 and 6 are required. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 1 is objected to because of the following informalities: there is no antecedent basis for the pillar region of the second doping type located in the cell area. If this is pillar region is part of a plurality of pillar regions of a second doping type disclosed earlier in claim 1, then a suggested correction is one of the plurality of pillar regions of the second doping type located in the cell area, if this is what is meant. Appropriate correction is required.
Claim 3 is objected to because of the following informalities: there is no antecedent basis for the first doping type initial region. Also, a well region of the second doping type is recited in claim 1; if this is the same well region of a second doping type as in claim 1, correct a to the in claim 3. Additionally, there is lack of antecedent basis for the second doping type well region. Appropriate correction is required.
Claims 7 and 8 are objected to because of the following informalities: there is no antecedent basis for the well region. Is it the well region of second doping type from claim 1 or another well region?
Claim 8 is objected to because of the following informalities: there is no antecedent basis for the collector electrode. If it is the same as a collector electrode of the second doping type, also recited in claim 8, it should be called that to avoid confusion with a collector electrode metal. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-7, 11, and 15 are rejected under 35 U.S.C. 102(1)(a) as being anticipated by Ono et al. US 20140284756.
Regarding claim 1, Ono discloses a bipolar junction field effect transistor ([0070]), comprising:
a drift region of a first doping type, formed in a cell area and a termination area of the bipolar junction field effect transistor (figure 1b, regions 11n are drift regions of the first doping type (n-type) [0024], formed in a cell area region 80 [0023] and a termination area region 81 [0024]), where regions 80 and 81 are divided by the dotted line in annotated figure 1b ;
a plurality of pillar regions of a second doping type, extended in a vertical direction, spaced out in a lateral direction, and arranged in the drift region of the first doping type (figure 1b shows a plurality of p-type pillars, 12p, extending in the vertical, z, direction, spaced out in a lateral, x, direction and arranged in the drift region 11n, having the first doping type, n-type [0024],
the pillar region of the second doping type located in the cell area being defined as a pillar region in the cell area (p-doped pillars 12p are located in the cell region 80, see figure 1b)
the drift region of the first doping type located in the cell area being defined as a drift region in the cell area (drift regions with n-type doping, 11n, are located in the region 80 [0025]);
a first doping type region and a well region of the second doping type formed inversely, successively arranged on a top of the pillar region in the cell area from near to far (n-type doping region 21, figure 1b, and p-type region 20, figure 1b are arranged in sequence in the vertical direction on top of the pillar region in region 80 [0026]; and
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in the termination area, a field oxide layer provided above the drift region of the first doping type, wherein the pillar region in the termination area is in contact with the field oxide layer (in the termination area 81, annotated figure 1b below, the oxide layer [0032] 41is located above the drift region 11n, and the pillar region (12p) is in contact with oxide layer 41).
Regarding claim 2, Ono discloses the bipolar junction field effect transistor according to claim 1, wherein a part of the pillar region of the second doping type below the first doping type region is defined as the pillar region in the cell area, the pillar region of the second doping type located in the termination area is defined as a pillar region in the termination area, and the pillar region in the termination area is higher than the pillar region in the cell area. (The pillar region 12p in the termination region 81 is higher than the pillar region 12p in the cell area 80, as shown in annotated figure 1b.)
Regarding claim 3, Ono discloses the bipolar junction field effect transistor according to claim 1,wherein the first doping type region and the second doping type well region are formed in such a manner that: downwardly from a top surface of the drift region and the pillar region in the cell area, transforming upper parts of the drift region and the pillar region in the cell area into the first doping type initial region by injection; and downwardly from a top surface of the first doping type initial region, inversely forming upper parts of the first doping type initial region into a well region of the second doping type by injection, the first doping type initial region located below the well region being defined as the first doping type region. This claim is a device claim, so produce-by-process limitations only provide limitations as to the structure related to the process limitation – see MPEP2113. The existence of the first doping type region and the second doping type well region in the specified relative positions is anticipated by Ono – see the rejection of claim 1 above.
Regarding claim 4, Ono discloses the bipolar junction field effect transistor according to claim 1, wherein a part of the drift region of the first doping type below the first doping type region is defined as the drift region in the cell area; the drift region of the first doping type located in the termination area being defined as a drift region in the termination area; and the drift region in the termination area is higher than the drift region in the cell area. A part of the drift region of the first doping type below the first doping type region is defined as the drift region in the cell area – this “drift region in the cell area” is the same region as defined in claim 1 as “the drift region of the first doping type located in the cell area.” In figure 1b, drift regions with n-type doping, 11n, are located in the region 80 [0025]). The drift region of the first doping type (see figure 1b, regions11n) located in the termination area 81. It is evident from figure 1b that the drift region in the termination area (11n in region 81) is higher (in the z direction) than the drift region in the cell area (11n in region 80.
Regarding claim 5, Ono discloses the bipolar junction field effect transistor according to claim 1, wherein a bottom surface of the pillar region in the termination area is even with a bottom surface of the pillar region in the cell area. Figure 1b shows that the bottom surfaces of the pillar region 12p are the same height in the z-direction in both regions 80 and 81.
Regarding claim 6, Ono discloses the bipolar junction field effect transistor according to claim 1, wherein the first doping type is N-type and the second doping type is P-type. See the rejection of claim 1 above, where the drift regions of the first doping type have n-type doping, as explained in paragraph [0024], and where the plurality of pillar regions of a second doping type 12p have p-type doping [0026].
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Regarding claim 7, Ono discloses the bipolar junction field effect transistor according to claim 1, further comprising: a termination second doping type main junction region, connected to the well region, The termination second doping type main junction region is indicated by the box in annotated figure 1b, and it is connected to well region 20.
Regarding claim 11, Ono discloses the bipolar junction field effect transistor according to claim 1, wherein a bottom of the drift region in the termination area is even with a bottom of the drift region in the cell area. See annotated figure 1b below, where the bottom of the drift region 11 is the at the same vertical level in both the cell area and the termination area.
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Regarding claim 15, Ono discloses a manufacturing method for a bipolar junction field effect transistor, comprising:
forming a drift region of a first doping type, wherein the drift region is formed in a cell area and a termination area of the bipolar junction field effect transistor, the drift region of the first doping type located in the cell area being defined as a drift region in the cell area (figure 1b, regions 11n are drift regions of the first doping type (n-type) [0024], formed in a cell area region 80 [0023] and a termination area region 81 [0024]), where regions 80 and 81 are divided by the dotted line in annotated figure 1b);
forming a plurality of pillar regions of a second doping type, each of the pillar regions extended in a vertical direction, spaced out in a lateral direction, and arranged in the drift region of the first doping type, the pillar region of the second doping type located in the cell area being defined as a pillar region in the cell area (figure 1b shows a plurality of p-type pillars, 12p, extending in the vertical, z, direction, spaced out in a lateral, x, direction and arranged in the drift region 11n, having the first doping type, n-type [0024]; p-doped pillars 12p are located in the cell region 80, see figure 1b; drift regions with n-type doping, 11n, are located in the region 80 [0025]);
successively forming a first doping type region and a well region of the second doping type formed inversely, on a top of the pillar region in the cell area from near to far (n-type doping region 21, figure 1b, and p-type region 20, figure 1b are formed in sequence in the vertical direction on top of the pillar region in region 80 [0026]; and
in the termination area, forming a field oxide layer above the drift region of the first doping type, wherein the pillar region in the termination area is in contact with the field oxide layer (in the termination area 81, annotated figure 1b from the rejection of claim 1 above, the oxide layer [0032] 41is formed above the drift region 11n, and the pillar region (12p) is in contact with oxide layer 41).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 8 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Ono in view of Pfirsch US 20170117394.
Regarding claim 8, Ono discloses the bipolar junction field effect transistor according to claim 1, further comprising:
a trench (containing gate electrode 30 in figure 1b [0026]), formed downwards from a top surface of the well region (This product-by-process limitation does not have weight since this is a device claim.);
a gate oxide layer, formed on a bottom and side walls of the trench (gate insulating film 31 comprises silicon oxide [0032] and is located on the bottom and walls of the trench, as illustrated in figure 1b);
a gate electrode, formed in a space enclosed by the gate oxide layer (figure 1b, 30 [0026]);
an emitter electrode of the first doping type, formed around the well region (figure 1b, 21 is an n-doped emitter region formed around well region 20 [0026]) ;
a gate dielectric layer, formed above the gate electrode (figure 1b, 31); and
an emitter electrode metal, formed above the gate dielectric layer (source electrode 90 [0027]) located above the gate dielectric (figure 1b, 31).
a collector region of the second doping type, located below the drift region in the termination area and the drift region in the cell area (paragraph [0070] discloses that in the case that the device is an IGBT, a p-type layer, which is a layer with the second doping type, is located between drift region 11 and drain, or collector, electrode 91, as in figure 1b, where it is located below the drift region in the termination area and the drift region in the cell area );
a collector electrode metal located below the collector electrode ([0070] figure 1b, layer 91);
Ono lacks:
a collector electrode of the second doping type, located below the collector region;
However, Pfirsch discloses an analogous IGBT device with a super junction, wherein the collector structure 130, illustrated in figure 9c, may have a multi-layer structure, comprising multiple collector layers of the second doping type [0040].
Therefore, it would have been obvious to a person having ordinary skill in the art before the date of filing to add the multiple collector layers of Pfirsch to the IGBT super junction device of Ono in order to improve performance by controlling carrier distribution in the device during different phases of operation and improve switching. (Pfirsch, background section)
Regarding claim 17, Ono discloses a bipolar junction field effect transistor ([0070]), comprising: the manufacturing method according to claim 16, further comprising:
forming the termination second doping type main junction region connected to the well region. The termination second doping type main junction region is indicated by the box in annotated figure 1b of the rejection of claim 7 above , and it is connected to well region 20.;
forming the collector region of the second doping type, the collector region being located below the drift region in the termination area and below the drift region in the cell area (paragraph [0070] discloses that in the case that the device is an IGBT, a p-type layer, which is a layer with the second doping type, is located between drift region 11 and drain, or collector, electrode 91, as in figure 1b, where it is located below the drift region in the termination area and the drift region in the cell area );
forming the collector electrode metal located below the collector electrode ([0070] figure 1b, layer 91);
forming the trench downwards from the top face of the well region (a trench is formed downward from the top face of the well region 20, containing gate electrode 30 in figure 1b [0026]),;
forming the gate oxide layer on the bottom and side walls of the trench (gate insulating film 31 comprises silicon oxide [0032] and is located on the bottom and walls of the trench, as illustrated in figure 1b);
forming the gate electrode in a space enclosed by the gate oxide layer (figure 1b, 30 [0026]);
forming the emitter electrode of the first doping type around the well region (figure 1b, 21 is an n-doped emitter region formed around well region 20 [0026]);
forming the gate dielectric layer above the gate electrode (figure 1b, 31); and
forming the emitter electrode metal above the gate dielectric layer (source electrode 90 [0027] located above the gate dielectric figure 1b, 31).
Ono lacks:
forming the collector electrode of the second doping type located below the collector region;
However, Pfirsch discloses an analogous IGBT device with a super junction, wherein the collector structure 130, illustrated in figure 9c, may have a multi-layer structure, comprising multiple collector layers of the second doping type [0040].
Therefore, it would have been obvious to a person having ordinary skill in the art before the date of filing to add the multiple collector layers of Pfirsch to the IGBT super junction device of Ono in order to improve performance by controlling carrier distribution in the device during different phases of operation and improve switching. (Pfirsch, background section)
Claims 9-10 and 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Ono in view of M. Antoniou, F. Udrea and F. Bauer, "The Superjunction Insulated Gate Bipolar Transistor Optimization and Modeling," in IEEE Transactions on Electron Devices, vol. 57, no. 3, pp. 594-600, March 2010.
Regarding claim 9, Ono discloses the bipolar junction field effect transistor according to claim 7.
Ono does not specify a depth of the termination second doping type main junction region has a range of greater than or equal to 3 microns and less than or equal to 5 microns.
Antoniou discloses that bipolar junction field effect transistors may have components with sizes in the range of single digit numbers of micrometers (figure 1).
MPEP 2144.04 IV A states:
Changes in Size/Proportion - In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955) (Claims directed to a lumber package "of appreciable size and weight requiring handling by a lift truck" were held unpatentable over prior art lumber packages which could be lifted by hand because limitations relating to the size of the package were not sufficient to patentably distinguish over the prior art.); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976) ("mere scaling up of a prior art process capable of being scaled up, if such were the case, would not establish patentability in a claim to an old process so scaled." 531 F.2d at 1053, 189 USPQ at 148.). In Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device.
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to create a depth of the termination second doping type main junction region in the range of greater than or equal to 3 microns and less than or equal to 5 microns, to optimize the performance of the device, as described by Antoniou while minimizing the size.
Regarding claim 10, Ono discloses the bipolar junction field effect transistor according to claim 1.
Ono lacks wherein a ratio of a top end width of the pillar region in the cell area to a width between top ends of the pillar regions in the cell area is 4:5.
Antoniou discloses an analogous bipolar junction field effect transistor wherein a ratio of a top end width of the pillar region in the cell area to a width between top ends of the pillar regions in the cell area is 1:1. (figure 1) and also discloses that the optimum performance depends on the width of the pillars and the width of the distances between them. They note that changing the widths of the pillars would alter the performance of the device in predictable ways. (section IV, penultimate paragraph).
Therefore, it would have been obvious to a person having reasonable skill in the art before the date of filing to adjust the widths and spacings of the pillars so that a ratio of a top end width of the pillar region in the cell area to a width between top ends of the pillar regions in the cell area is 4:5 in order to optimize the performance of the device in accordance with the doping concentration and other device parameters (MPEP 2144.04 IV A).
Regarding claim 12, Ono discloses the bipolar junction field effect transistor according to claim 7.
Ono does not specifically disclose wherein a width of the termination second doping type main junction region in an arrangement direction of the cell area and the termination area has a range of greater than or equal to 30 microns and less than or equal to 60 microns.
Antoniou discloses an analogous superjunction bipolar junction field effect transistor wherein the depth of the entire device is about 100 μm (figure 1).
Therefore, it would have been obvious to a person having reasonable skill in the art before the date of filing to create a device wherein a width of the termination second doping type main junction region in an arrangement direction of the cell area and the termination area has a range of greater than or equal to 30 microns and less than or equal to 60 microns in order to optimize the device performance within the range of sizes (microns for pillar width and spacings, approximately 100 microns for the device thickness) commonly used for superjunction IGBT’s (MPEP 2144.04 IV A).
Regarding claim 13, Ono discloses the bipolar junction field effect transistor according to claim 2.
Ono lacks wherein a ratio of a top end width of the pillar region in the termination area to a width between top ends of the pillar regions in the termination area is 4:5.
Antoniou discloses an analogous bipolar junction field effect transistor wherein a ratio of a top end width of the pillar region to a width between top ends of the pillar regions is 1:1. (figure 1) and also discloses that the optimum performance depends on the width of the pillars and the width of the distances between them. They note that changing the widths of the pillars would alter the performance of the device in predictable ways. (section IV, penultimate paragraph).
Therefore, it would have been obvious to a person having reasonable skill in the art before the date of filing to adjust the widths and spacings of the pillars so that a ratio of a top end width of the pillar region in the termination area to a width between top ends of the pillar regions in the termination area is 4:5 in order to optimize the performance of the device in accordance with the doping concentration and other device parameters (MPEP 2144.04 IV A.)
Regarding claim 14, Ono discloses the bipolar junction field effect transistor according to claim 2.
Ono lacks wherein doping concentrations of the pillar region in the cell area and the pillar region in the termination area are 4.5×1015/cm-3.
However, Antoniou discloses that the optimum pillars doping concentration for a similar superjunction IGBT device is in the range of 3×1015/cm-3 and 5×1015/cm-3. (see figure 7)
Therefore, it would have been obvious to a person having ordinary skill in the art before the date of filing to use a doping concentrations of the pillar region in the cell area and the pillar region in the termination area are 4.5×1015/cm-3, as such a doping concentration would optimize device performance.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Ono in view of Schultze et al. US 20140021590.
Regarding claim 16, Ono discloses a bipolar junction field effect transistor ([0070]), comprising: the manufacturing method according to claim 15, wherein a part of the pillar region of the second doping type below the first doping type region is defined as the pillar region in the cell area, the pillar region of the second doping type located in the termination area is defined as a pillar region in the termination area, and the pillar region in the termination area is higher than the pillar region in the cell area (The pillar region 12p in the termination region 81 is higher than the pillar region 12p in the cell area 80, as shown in annotated figure 1b, as in the rejection of claim 2 above. )
Ono lacks wherein a step of successively forming a first doping type region (21) and a well region of the second doping type (20) formed inversely, on the top of the pillar region in the cell area from near to far ( Ono’s n-type doping region 21, figure 1b, and p-type region 20, figure 1b are arranged in sequence in the vertical direction on top of the pillar region in region 80 [0026]); comprises: downwardly from a top surface of the drift region and the pillar region in the cell area, transforming the upper parts of the drift region and the pillar region in the cell area into the first doping type initial region by injection; and downwardly from a top surface of the first doping type initial region, inversely forming upper parts of the first doping type initial region into the well region of the second doping type by injection, the first doping type initial region being located below the well region as the first doping type region;
However, Schulze discloses wherein a step of successively forming regions of a first doping type (Schultze claim 1) and regions of the second doping type (Schultze claim 9) by ion implantation (injection) downwardly from a top surface.
Therefore, it would have been obvious to a person having ordinary skill in the art before the date of filing to form the structures as described by Ono (Ono’s n-type doping region 21, figure 1b, and p-type region 20) by downwardly from a top surface of the drift region and the pillar region in the cell area, transforming the upper parts of the drift region and the pillar region in the cell area into the first doping type initial region by the ion implantation method of Schultze; and downwardly from a top surface of the first doping type initial region, inversely forming upper parts of the first doping type initial region into the well region of the second doping type by the ion implantation method of Schultze, in order to create uniformly doped regions, and thus control and improve the performance of the device.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Lee et al. US 20210296437 discusses formation of doped regions in a semiconductor device similar to that of the instant application and also discusses effects of changing pillar sizes and doping concentrations on device performance.
Yedinak et al. US 20120273884 and Ghandi et al. US 10636660 discusse methods of manufacturing superjunction semiconductor devices.
Hirler et al. US 20170373140 describes use of field dielectrics in edge areas of semiconductor devices.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KATRINA M H WALJESKI-MOSES whose telephone number is (571)272-0731. The examiner can normally be reached Mon- Fri 7:30 am- 5 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KATRINA WALJESKI-MOSES/ Examiner, Art Unit 2818
/JEFF W NATALINI/ Supervisory Patent Examiner, Art Unit 2818
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