Prosecution Insights
Last updated: August 17, 2026
Application No. 18/809,684

FAULT AND ATTACK TOLERANT ELECTRONIC HARDWARE USING REPROGRAMMABLE LOGIC WITH SOFTWARE OVER THE AIR SUPPORT

Non-Final OA §103§112
Filed
Aug 20, 2024
Examiner
NAHAR, QAMRUN
Art Unit
2199
Tech Center
2100 — Computer Architecture & Software
Assignee
NXP Semiconductors N.V.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
1y 2m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
625 granted / 710 resolved
+33.0% vs TC avg
Moderate +10% lift
Without
With
+9.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
14 currently pending
Career history
726
Total Applications
across all art units

Statute-Specific Performance

§101
19.2%
-20.8% vs TC avg
§103
33.5%
-6.5% vs TC avg
§102
29.6%
-10.4% vs TC avg
§112
12.7%
-27.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 710 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 have been examined. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "the resource reallocation management subsystem" in line 3. There is insufficient antecedent basis for this limitation in the claim. Therefore, this limitation is interpreted as “a resource reallocation management subsystem”. Claims 2-7 are rejected for dependency upon rejected base claim 1 above. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tiwari (US 2021/0056207) in view of Munnangi (US 2023/0068583). Per Claim 1: Tiwari teaches receiving, at the resource reallocation management subsystem of the data processing system, a notification of a resource at one of the data processing subsystems (par. 0075-0076 and 0078); requesting, by the resource reallocation management subsystem, an over-the-air (OTA) update from an external system controller to provide update code; receiving, by the resource reallocation management subsystem, OTA update code from the external system controller; storing, by the resource reallocation management subsystem, the OTA update code at a flash memory (par. 0065; 0067-0068 and 0070); reconfiguring, by the resource reallocation management subsystem, a spare resource subsystem at the data processing system with the OTA update code stored at the flash memory, thereby generating a reconfigured spare resource subsystem (par. 0070-0073). Tiwari does not explicitly teach a faulty resource; isolating, by the resource reallocation management subsystem, the faulty resource by programming an interconnect manager at the interconnect bus to disconnect the faulty resource from the data processing system or reprogramming, by the resource reallocation management subsystem, the interconnect manager at the interconnect bus to connect the reconfigured spare resource subsystem with the data processing system. However, Munnangi teaches a faulty resource; isolating, by the resource reallocation management subsystem, the faulty resource by programming an interconnect manager at the interconnect bus to disconnect the faulty resource from the data processing system; and reprogramming, by the resource reallocation management subsystem, the interconnect manager at the interconnect bus to connect the reconfigured spare resource subsystem with the data processing system (par. 0016 and par. 0030). It would have been obvious to one having ordinary skill in the computer art before the effective filing date of the claimed invention to modify the method disclosed by Tiwari to include a faulty resource; isolating, by the resource reallocation management subsystem, the faulty resource by programming an interconnect manager at the interconnect bus to disconnect the faulty resource from the data processing system; and reprogramming, by the resource reallocation management subsystem, the interconnect manager at the interconnect bus to connect the reconfigured spare resource subsystem with the data processing system using the teaching of Munnangi. The modification would be obvious because one of ordinary skill in the art would be motivated to handle faults in a multiport power sourcing device (Munnangi, par. 0002). Per Claim 2: The rejection of claim 1 is incorporated, and Tiwari further teaches where receiving the notification of the resource comprises receiving an OTA update identifying a vulnerable resource at one of the data processing subsystems (par. 0075-0076 and 0078). Tiwari does not explicitly teach that the resource is a faulty resource. However, Munnangi teaches a faulty resource (par. 0016 and par. 0030). It would have been obvious to one having ordinary skill in the computer art before the effective filing date of the claimed invention to modify the method disclosed by Tiwari to include a faulty resource using the teaching of Munnangi. The modification would be obvious because one of ordinary skill in the art would be motivated to handle faults in a multiport power sourcing device (Munnangi, par. 0002). Per Claim 3: The rejection of claim 1 is incorporated, and Munnangi further teaches where receiving the notification of the faulty resource comprises receiving a notification of a permanent random hardware fault at one of the data processing subsystems (par. 0066). Per Claim 4: The rejection of claim 1 is incorporated, and Munnangi further teaches where isolating the faulty resource comprises programming the interconnect manager at the interconnect bus to switch off or disable a resource clock or interface signal sent over the interconnect bus to the faulty resource (par. 0016 and par. 0030). Per Claim 5: The rejection of claim 1 is incorporated, and Tiwari further teaches where reconfiguring the spare resource subsystem comprises reconfiguring a spare logic array at the data processing system with the OTA update code (par. 0062 and 0065). Per Claim 6: The rejection of claim 1 is incorporated, and Tiwari further teaches where reconfiguring the spare resource subsystem comprises reconfiguring a spare central processing unit (CPU) subsystem at the data processing system with the OTA update code (par. 0058-0059 and 0065). Per Claim 7: The rejection of claim 1 is incorporated, and Tiwari further teaches where reconfiguring the spare resource subsystem comprises reconfiguring a new hardware device added to the data processing system with the OTA update code (par. 0063 and 0065). Per Claims 8-14: These are system versions of the claimed method discussed above (claims 1-7, respectively), wherein all claim limitations also have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, these claims are also obvious. Per Claims 15-16: These are another versions of the claimed method discussed above (claim 1), wherein all claim limitations also have been addressed and/or covered in cited areas as set forth above, including “SoC device and a plurality of SoC subsystems” (Tiwari, par. 0061-0063). Thus, accordingly, these claims are also obvious. Per Claims 17-20: These are another versions of the claimed method discussed above (claims 4-7, respectively), wherein all claim limitations also have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, these claims are also obvious. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lin (US 2019/0391800) teaches a method for Over-The-Air upgrade. Any inquiry concerning this communication or earlier communications from the examiner should be directed to QAMRUN NAHAR whose telephone number is (571)272-3730. The examiner can normally be reached Monday - Friday 8-4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lewis Bullock can be reached on (571)272-3759. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /QAMRUN NAHAR/Primary Examiner, Art Unit 2199
Read full office action

Prosecution Timeline

Aug 20, 2024
Application Filed
Jul 23, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
98%
With Interview (+9.9%)
3y 2m (~1y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 710 resolved cases by this examiner. Grant probability derived from career allowance rate.

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