Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Foreign Priority
Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). The certified copy has been placed in the file of record.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US Pub # 2021/0020254).
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
Regarding independent claim 1, Kim et al. teach a method of programming a non-volatile memory device, the non-volatile memory device including a first cell string and a second cell string connected to one bit line and sharing a first ground selection line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125 where first and second cell string CS coupled to bitline BL1, GSL1 is first ground select line) the non-volatile memory device further including a third cell string and a fourth cell string connected to the one bit line and sharing a second ground selection line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125 where third and fourth cell string CS coupled to the same bitline BL1, GSL2 is second ground select line), the method comprising: performing a ground separate initial precharge operation in which a first voltage is applied to the first ground selection line and a second voltage is applied to the second ground selection line, based on the first cell string being selected as a selected cell string (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125, precharge voltage Vprch); performing a program voltage applying operation in which a program voltage is applied to a word line selected as a selected word line from among a plurality of word lines (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125, program voltage Vpgm); performing a verify operation in which a verify voltage is applied to the selected word line; and performing a recovery operation in which a recovery voltage is applied to the plurality of word lines connected to the first to fourth cell strings (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125, verify voltage Vfy and recovery voltage Vrcv applied during operation).
Even though Kim et al. teach performing a precharge operation but silent exclusively about performing a ground separate initial precharge operation. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to apply the teaching of Kim et al. where first ground selection line GSL1 and second ground selection line GSL2 are two separate line and voltage would be applied independently / separately to precharge in order to improve the degree of integration of memory device (see paragraph 0005).
Regarding claim 2, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 1 on which this claim depends.
Kim et al. further teach, wherein the method is sequentially performed from an uppermost unselected word line that is closest to a string selection line from among the plurality of word lines to a lowermost word line among the plurality of word lines along a top-down direction strings (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0115).
Regarding claim 3, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 2 on which this claim depends.
Kim et al. further teach, wherein, the ground separate initial precharge operation is performed concurrently with at least one memory cell connected to an upper unselected word line from among memory cells of the first cell string being in a state of being already programmed (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0120).
Regarding claim 4, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 3 on which this claim depends.
Kim et al. further teach, wherein the first voltage is smaller in magnitude than the second voltage (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103).
Regarding claim 5, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 3 on which this claim depends.
Kim et al. further teach, wherein performing the ground separate initial precharge operation includes applying the first voltage to the first ground selection line for a first time period, and applying the second voltage to the second ground selection line for a second time period, and the first time period is smaller than the second time period (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0101).
Regarding independent claim 6, Kim et al. teach a method of programming a non-volatile memory device, the non-volatile memory device including a plurality of cell strings connected to a same bit line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125 where first and second cell string CS coupled to bitline BL1), the method comprising: selecting one cell string of the plurality of cell strings as a selected cell string; selecting one word line of a plurality of word lines connected to the selected cell string as a selected word line; and performing a program operation on memory cells connected to the selected word line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125, program voltage Vpgm), wherein the performing of the program operation includes performing a ground separate initial precharge operation based on applying a first voltage to a first ground selection line connected to the selected cell string and applying a second voltage to a second ground selection line connected to an unselected cell string among the plurality of cell strings (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125, precharge voltage Vprch).
Even though Kim et al. teach performing a precharge operation but silent exclusively about performing a ground separate initial precharge operation. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to apply the teaching of Kim et al. where first ground selection line GSL1 and second ground selection line GSL2 are two separate line and voltage would be applied independently / separately to precharge in order to improve the degree of integration of memory device (see paragraph 0005).
Regarding claim 7, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 6 on which this claim depends.
Kim et al. further teach, wherein the program operation is sequentially performed from an uppermost unselected word line that is closest to a string selection line from among the plurality of word lines to a lowermost word line among the plurality of word lines along a top-down direction (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0100).
Regarding claim 8, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 7 on which this claim depends.
Kim et al. further teach, wherein the ground separate initial precharge operation is performed concurrently with at least one memory cell connected to an upper unselected word line from among memory cells of the plurality of cell strings being in a programmed state (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103).
Regarding claim 9, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 6 on which this claim depends.
Kim et al. further teach, wherein the performing of the program operation further includes: performing a program voltage applying operation on the selected word line; performing a verify operation in which a verify voltage is applied to the selected word line; and performing a recovery operation on the plurality of word lines (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0101).
Regarding claim 10, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 9 on which this claim depends.
Kim et al. further teach, wherein the first voltage is smaller in magnitude than the second voltage (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0099).
Regarding claim 11, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 9 on which this claim depends.
Kim et al. further teach, wherein performing the ground separate initial precharge operation includes applying the first voltage to the first ground selection line for a first time period, and applying the second voltage to the second ground selection line for a second time period, and the first time period is smaller than the second time period (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0101).
Regarding claim 12, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 9 on which this claim depends.
Kim et al. further teach, wherein performing the ground separate initial precharge operation includes applying a same voltage to the first ground selection line and the second ground selection line in a state where memory cells of cell strings connected to the first ground selection line are not programmed (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0100).
Regarding independent claim 13, Kim et al. teach a non-volatile memory device, comprising: a plurality of memory blocks, wherein each memory block of the plurality of memory blocks includes a first cell string and a second cell string connected to a same bit line and sharing a first ground selection line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125 where first and second cell string CS coupled to bitline BL1, GSL1 is first ground select line), and a third cell string and a fourth cell string connected to the same bit line and sharing a second ground selection line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125 where third and fourth cell string CS coupled to the same bitline BL1, GSL2 is second ground select line), wherein the non-volatile memory device is configured to perform a precharge operation on a cell string of the first to fourth cell strings, the precharge operation including independently controlling a first ground selection voltage applied to the first ground selection line and a second ground selection voltage applied to the second ground selection line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0125, precharge voltage Vprch).
Even though Kim et al. teach performing a precharge operation but silent exclusively about independently controlling a first ground selection voltage applied to the first ground selection line and a second ground selection voltage applied to the second ground selection line. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to apply the teaching of Kim et al. where first ground selection line GSL1 and second ground selection line GSL2 are two separate line and voltage would be applied independently / separately to precharge in order to improve the degree of integration of memory device (see paragraph 0005).
Regarding claim 14, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 13 on which this claim depends.
Kim et al. further teach, further comprising: a control logic circuit configured to generate a ground selection voltage control signal; and a ground selection voltage control circuit configured to control the first ground selection voltage and the second ground selection voltage based on the ground selection voltage control signal (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0095).
Regarding claim 15, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 14 on which this claim depends.
Kim et al. further teach, wherein the ground selection voltage control signal includes a first ground selection voltage control signal and a second ground selection voltage control signal, the ground selection voltage control circuit is configured to control a magnitude of the first ground selection voltage applied to the first ground selection line based on the first ground selection voltage control signal (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0090), and control a magnitude of the second ground selection voltage applied to the second ground selection line based on the second ground selection voltage control signal, and the magnitude of the first ground selection voltage is different from the magnitude of the second ground selection voltage (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103).
Regarding claim 16, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 15 on which this claim depends.
Kim et al. further teach, wherein the control logic circuit is configured to: control the first ground selection voltage control signal based on a string type of a cell string connected to the first ground selection line; and control the second ground selection voltage control signal based on a string type of a cell string connected to the second ground selection line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0121).
Regarding claim 17, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 15 on which this claim depends.
Kim et al. further teach, wherein the control logic circuit is configured to: control the first and second ground selection voltage control signals based on a first operation period such that the magnitude of the first ground selection voltage is smaller than the magnitude of the second ground selection voltage (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0091); and control the first and second ground selection voltage control signals based on a second operation period such that the magnitude of the second ground selection voltage is smaller than the magnitude of the first ground selection voltage, wherein the first operation period is a portion of a period where a program operation on a cell string connected to the first ground selection line is performed, and wherein the second operation period is a portion of a period where a program operation on a cell string connected to the second ground selection line is performed (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0101).
Regarding claim 18, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 14 on which this claim depends.
Kim et al. further teach, wherein the ground selection voltage control signal includes a first ground selection voltage control signal and a second ground selection voltage control signal, the ground selection voltage control circuit is configured to apply the first ground selection voltage to the first ground selection line for a first time period, based on the first ground selection voltage control signal (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0100), and apply the second ground selection voltage to the second ground selection line for a second time period, based on the second ground selection voltage control signal, and the first time period is different from the second time period (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0110).
Regarding claim 19, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 18 on which this claim depends.
Kim et al. further teach, wherein the control logic circuit is configured to: control the first ground selection voltage control signal based on a string type of a cell string connected to the first ground selection line; and control the second ground selection voltage control signal based on a string type of a cell string connected to the second ground selection line (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103).
Regarding claim 20, Kim et al. teach all claimed subject matter as applied in prior rejection of claim 18 on which this claim depends.
Kim et al. further teach, wherein the control logic circuit is configured to: control the first and second ground selection voltage control signals based on a first operation period such that the first time period is smaller than the second time period (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058); and control the first and second ground selection voltage control signals based on a second operation period such that the first time period is greater than the second time period, wherein the first operation period is a portion of a period where a program operation on a cell string connected to the first ground selection line is performed, and wherein the second operation period is a portion of a period where a program operation on a cell string connected to the second ground selection line is performed (see Fig. 1-2, 5-9, 11-14 and paragraph 0026-0055, 0058-0103, 0108-0121).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See attachment.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMED A BASHAR whose telephone number is 469-295-9277. The examiner can normally be reached on 9am-5pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Richard T Elms can be reached on 5712721869. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOHAMMED A BASHAR/Primary Examiner, Art Unit 2824