Prosecution Insights
Last updated: October 01, 2026
Application No. 18/810,911

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §103
Filed
Aug 21, 2024
Priority
Sep 26, 2023 — CN 202311249136.1
Examiner
SHARMA, ADITYA
Art Unit
Tech Center
Assignee
Innolux Corporation
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
31 granted / 39 resolved
+19.5% vs TC avg
Strong +28% interview lift
Without
With
+28.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
25 currently pending
Career history
60
Total Applications
across all art units

Statute-Specific Performance

§103
71.6%
+31.6% vs TC avg
§102
21.6%
-18.4% vs TC avg
§112
6.8%
-33.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 39 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on August 21, 2024, is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Response to Arguments Applicant’s election with traverse is acknowledged. The prior restriction requirement mistakenly identified Invention I as Claims 1-11. Claim 11 is directed to a method of manufacturing; therefore, the correct grouping is Invention I: Claims 1-10, and Invention II: Claims 11-20. Applicant’s arguments have been considered but are not persuasive because the product and manufacturing method require different search considerations. Accordingly, the restriction requirement is maintained. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5, 8, 10 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 115954368 A) and in further view of Mingyao (US 20240047476 A1) and Lee et al. (US 20210249490 A1) Regarding Claim 1 – Wang teaches an electronic device, comprising: a substrate (Fig 1; 101); a first metal layer disposed on the substrate, the first metal layer comprising a first edge and a second edge (Fig 3; gate line 102 / gate 2001, lateral edges of gate line 102); and a second metal layer disposed on the first metal layer, wherein the first metal layer is located between the substrate and the second metal layer (Fig 7; gate line 102 between substrate 101 and upper data line 104); wherein the side angle of the second edge is greater than or equal to 30 degrees and less than or equal to 45 degrees (Fig 3; gate 102, side angle α; Wang states “α is generally between 30° and 60°”). Wang does not explicitly disclose wherein the first edge does not overlap the second metal layer, the second edge overlaps the second metal layer, a side angle of the first edge is different from a side angle of the second edge. Mingyao teaches the first edge does not overlap the second metal layer, the second edge overlaps the second metal layer (Figs 5-6; Mingyao [0061] states “the first metal line 111 includes a planarization part 112 and an overlapping part 113 overlapping the second metal line 131”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Wang with the first edge does not overlap the second metal layer, the second edge overlaps the second metal layer as taught by Mingyao to reduce the climbing angle of the second metal line and thereby reduce breakage or abnormity and improve display-panel yield (Mingyao [0044, 0063]). Lee teaches a side angle of the first edge is different from a side angle of the second edge (Fig 5; 139, 139a, 139b, θ1, θ2; Lee [0095] states “The first conductive layer 139 may include a first sidewall 139 a having a first inclination angle θ1 and a second sidewall 139 b having a second inclination angle θ2 different from the first inclination angle θ1”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Wang with a side angle of the first edge is different from a side angle of the second edge as taught by Lee to prevent reduce loss of planarization layer material while maintaining high transmittance (Lee [0142-0143]). Regarding Claim 2 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, wherein the side angle of the first edge is greater than the side angle of the second edge (Lee Fig 5; 139a, 139b, θ1, θ2; Lee [0095] states “the second sidewall 139 b may have a steeper inclination angle than the second sidewall 139 b”). Regarding Claim 3 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, wherein the side angle of the first edge is greater than or equal to 45 degrees and less than or equal to 75 degrees (Lee Fig 5; 139a, θ1; Lee [0095] states “the first inclination angle θ1… may be 70 degrees or more and 90 degrees or less”). Regarding Claim 5 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, wherein the first edge is located in a region of the first metal layer serving as a scan line (Mingyao Fig 6; 111, 112; Mingyao [0079] states “the first metal layer 110 is a gate line metal layer, the first metal lines 111 are gate lines”; the first edge/non overlapping region is 112 or first metal line 111, and Mingyao identifies that as gate line). Regarding Claim 8 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, further comprising an insulating layer disposed between the first metal layer and the second metal layer (Mingyao Fig 3; 120; Mingyao [0059] states “the insulating layer 120 covers the first metal layer 110… the second metal layer 130 covers the insulating layer 120”). Regarding Claim 10 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, wherein the second metal layer serves as a data line (Mingyao Fig 6; 130/131; Mingyao [0079] states “the second metal layer 130 is a data line metal layer, and the second metal lines 131 are data lines”). Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 115954368 A) in view of Mingyao (US 20240047476 A1) and Lee et al. (US 20210249490 A1) and in further view of Xiao (US 20220123029 A1) Regarding Claim 4 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, but does not explicitly disclose wherein a side surface of the first metal layer has an arc-shaped profile. Xiao teaches a side surface of the first metal layer has an arc-shaped profile (Fig 1; M1 22, 222; Xiao [0036] states “The side walls 222 are shaped as arc-shaped grooves”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Wang in view of Mingyao and Lee with a side surface of the first metal layer has an arc-shaped profile to increase the deposition thickness of the insulating layer at the cross-line position, thereby preventing a short circuit between the first metal layer and the second metal layer and improving the stability of drive circuit (Xiao [0043]). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 115954368 A) in view of Mingyao (US 20240047476 A1) and Lee et al. (US 20210249490 A1) and in further view of Xian et al. (US 20180203305 A1) Regarding Claim 6 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, but does not explicitly disclose wherein the second edge is located in a region of the first metal layer serving as a common electrode line. Xian teaches the second edge is located in a region of the first metal layer serving as a common electrode line (Fig 1; 10, 50; Xian [0065] states “a gate electrode metal layer is formed… to form patterns of the gate line, the gate electrode and the required common electrode line”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Wang in view of Mingyao and Lee with the second edge is located in a region of the first metal layer serving as a common electrode line as taught by Xian to reduce light leakage at the edge of the pixel electrode and thereby improve display quality (Xian [0063]). Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 115954368 A) in view of Mingyao (US 20240047476 A1) and Lee et al. (US 20210249490 A1) and in further view of Zhang et al. (US 20210408192 A1) Regarding Claim 7 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, but does not explicitly disclose wherein the second edge is located in a region of the first metal layer serving as a light-shielding element. Zhang teaches the second edge is located in a region of the first metal layer serving as a light-shielding element (Fig 4A; 12, 122; Zhang [0056] states “the first metal layer 12 is patterned into… a light-shielding layer 122”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Wang in view of Mingyao and Lee with the second edge is located in a region of the first metal layer serving as a light-shielding element as taught by Zhang to protect the thin film transistor from ambient light and thereby reduce light-induced degradation of the transistor (Zhang [0003]). Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 115954368 A) in view of Mingyao (US 20240047476 A1) and Lee et al. (US 20210249490 A1) and in further view of Suzuki et al. (US 20180174539 A1) Regarding Claim 9 – Wang in view of Mingyao and Lee teaches the electronic device as claimed in claim 1, but does not explicitly disclose wherein a resistance value of a region of the first metal layer corresponding to the first edge is smaller than a resistance value of a region corresponding to the second edge. Suzuki teaches a resistance value of a region of the first metal layer corresponding to the first edge is smaller than a resistance value of a region corresponding to the second edge (Fig 17; 770, 748, 750; Suzuki [0068] states “The second portion 750 is higher in electric resistance than the first portion 748” and “the second portion 750 is made of the same material (for example, metal) as that of the first portion 748”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Wang in view of Mingyao and Lee with a resistance value of a region of the first metal layer corresponding to the first edge is smaller than a resistance value of a region corresponding to the second edge as taught by Suzuki to delay the transmitted signal and thereby decrease the peak level of potential variation of the common electrode and suppress variation of the common electrode potential (Suzuki [0069]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADITYA SHARMA whose telephone number is (571)270-7246. The examiner can normally be reached Monday - Friday 8:30 - 5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ADITYA SHARMA/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Aug 21, 2024
Application Filed
Sep 01, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+28.1%)
2y 8m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 39 resolved cases by this examiner. Grant probability derived from career allowance rate.

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