DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/13/2025 and 11/22/2024 was in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 6-11, 13-17, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Marakhtanov (US 20230215694 A1) in view of Guo (US 20230170194 A1).
With regards to claim 1. Marakhtanov disclose(s):
A computer implemented method (figs 1-14b) comprising:
receiving, by a processing circuit (114), a duty cycle parameter (117 [0041]) from a user interface associated with the processing circuit [0258];
generating, by the processing circuit (114), a control signal (131 [0053]) for a wafer pulse power supply (RFG1) of a plasma
and sending, by the processing circuit (114), the control signal to the wafer pulse power supply (RFG1) to thereby alter a duty cycle of a pulse signal generated by the wafer pulse power supply [0060-0061].
Marakhtanov does not disclose(s):
a plasma system being a plasma doping system
Guo teaches
a plasma system being a plasma doping system [0021]
Before the effective filing date of the claimed invention, it would have been obvious for one of ordinary skill in the art to have modified the device/method/system of Marakhtanov by implementing the plasma system being a plasma doping system as disclosed by Guo in order to manufacture a substrate while immersing a substrate in a dopant as taught/suggested by Guo ([0021]).
With regards to claim 2. Marakhtanov as modified disclose(s):
The computer implemented method of claim 1,
Marakhtanov further disclose(s):
wherein the duty cycle parameter includes a plurality of duty cycle parameters [0042].
With regards to claim 3. Marakhtanov as modified disclose(s):
The computer implemented method of claim 2,
Marakhtanov further disclose(s):
wherein each of the plurality of duty cycle parameters includes a unique duty cycle ratio of the pulse signal that is selectable at the user interface [0053, 0060-0061].
With regards to claim 4. Marakhtanov as modified disclose(s):
The computer implemented method of claim 2,
Marakhtanov further disclose(s):
wherein the plurality of duty cycle parameters includes a first duty cycle parameter and one or more subsequent duty cycle parameters with increasing duty cycle [0053].
With regards to claim 6. Marakhtanov as modified disclose(s):
The computer implemented method of claim 1,
Marakhtanov further disclose(s):
wherein the duty cycle parameter includes a predetermined amount of time [0044], and wherein the method further comprises:
maintaining, by the processing circuit, a clock or timer; wherein the control signal is generated in response to the clock or timer indicating that the predetermined amount of time has passed ([0043, 0071-0072]).
With regards to claim 7. Marakhtanov as modified disclose(s):
The computer implemented method of claim 1,
Marakhtanov further disclose(s):
wherein the duty cycle parameter is selected such that the generated control signal causes the pulse duty cycle to generate a doping profile in an experimental wafer to match a predetermined doping profile ([0250, 0043]).
With regards to claim 8. Marakhtanov as modified disclose(s):
The computer implemented method of claim 1,
Marakhtanov further disclose(s):
wherein the user interface is executed by a computer application of a computing device (fig 14a) in communication with the processing circuit [0250], the user interface having one or more selectable and alterable duty cycle parameter options (fig 14a; see UNFM1-UNFMp [0042]).
With regards to claim 9. Marakhtanov as modified disclose(s):
The computer implemented method of claim 1,
Marakhtanov further disclose(s):
wherein the wafer pulse power supply (RFG1; fig 1) is to provide a biasing voltage (122) to a semiconductor wafer (S in 124 [0040]) during a doping process thereof, the biasing voltage configured to provide sufficient energy to implant ions into the semiconductor wafer [0040].
Guo further discloses
a plasma system being a plasma doping system [0021]
With regards to claim 10. Marakhtanov disclose(s):
A plasma
a memory (memory in 114 [0039]) having instructions stored thereon;
a processing circuit (114) to execute the instructions, which when executed by the processing circuit causes the processing circuit to;
receive a duty cycle parameter (117 [0041]) from a user interface associated with the processing circuit (114) [0258];
generate a control signal (131 [0053]) for a wafer pulse power supply (RFG1) of a plasma
and send the control signal (131 [0053]) to the wafer pulse power supply (RFG1) to thereby alter a duty cycle of a pulse signal generated by the wafer pulse power supply [0060-0061].
Marakhtanov does not disclose(s):
a plasma system being a plasma doping system
Guo teaches
a plasma system being a plasma doping system [0021]
Before the effective filing date of the claimed invention, it would have been obvious for one of ordinary skill in the art to have modified the device/method/system of Marakhtanov by implementing the plasma system being a plasma doping system as disclosed by Guo in order to manufacture a substrate while immersing a substrate in a dopant as taught/suggested by Guo ([0021]).
With regards to claim 11. Marakhtanov as modified disclose(s):
The plasma doping system of claim 10,
Marakhtanov further disclose(s):
wherein the duty cycle parameter includes a plurality of duty cycle parameters [0042];
wherein each of the plurality of duty cycle parameters includes a unique duty cycle ratio of the pulse signal that is selectable at the user interface [0053, 0060-0061];
and wherein the plurality of duty cycle parameters includes a first duty cycle parameter and one or more subsequent duty cycle parameters with increasing duty cycle [0053].
With regards to claim 13. Marakhtanov as modified disclose(s):
The plasma doping system of claim 10,
Marakhtanov further disclose(s):
wherein the duty cycle parameter includes a predetermined amount of time, and wherein the processing circuit is further caused to:
maintaining a clock or timer, wherein the control signal is generated in response to the clock or timer indicating that the predetermined amount of time has passed ([0043, 0071-0072]).
With regards to claim 14. Marakhtanov as modified disclose(s):
The plasma doping system of claim 10,
Marakhtanov further disclose(s):
wherein the user interface is generated by a computer application (fig 14a) executed by the processing circuit [0250], the user interface having one or more selectable and alterable duty cycle parameter options (fig 14a; see UNFM1-UNFMp [0042]);
and wherein the duty cycle parameter is selected from among the one or more selectable and alterably duty cycle parameter options such that the generated control signal causes the pulse duty cycle to generate a doping profile in an experimental wafer to match a predetermined doping profile ([0250, 0043]).
With regards to claim 15. Marakhtanov as modified disclose(s):
The plasma doping system of claim 10,
Marakhtanov further disclose(s):
wherein the wafer pulse power supply (RFG1; fig 1) is to provide a biasing voltage (122) to a semiconductor wafer (S in 124 [0040]) during a
Guo further discloses
a plasma system being a plasma doping system [0021]
With regards to claim 16. Marakhtanov as modified disclose(s):
A non-transitory computer-readable storage medium ([0039]) having executable instructions stored thereon, which when executed by a processing circuit (114) causes the processing circuit to:
receive a duty cycle parameter (117 [0041]) from a user interface (fig 14a) associated with the processing circuit;
generate a control signal (131 [0053]) for a wafer pulse power supply (RFG1) of a plasma
and send the control signal (131 [0053]) to the wafer pulse power supply (RFG1) to thereby alter a duty cycle of a pulse signal generated by the wafer pulse power supply [0060-0061].
Marakhtanov does not disclose(s):
a plasma system being a plasma doping system
Guo teaches
a plasma system being a plasma doping system [0021]
Before the effective filing date of the claimed invention, it would have been obvious for one of ordinary skill in the art to have modified the device/method/system of Marakhtanov by implementing the plasma system being a plasma doping system as disclosed by Guo in order to manufacture a substrate while immersing a substrate in a dopant as taught/suggested by Guo ([0021]).
With regards to claim 17. Marakhtanov as modified disclose(s):
The non-transitory computer-readable storage medium of claim 16,
Marakhtanov further disclose(s):
wherein the wafer pulse power supply (RFG1; fig 1) is to provide a biasing voltage (122) to a semiconductor wafer during (S in 124 [0040]) a doping process thereof, the biasing voltage configured to provide sufficient energy to implant ions into the semiconductor wafer [0040];
wherein the duty cycle parameter includes a plurality of duty cycle parameters [0042];
wherein each of the plurality of duty cycle parameters includes a unique duty cycle ratio of the pulse signal that is selectable at the user interface [0053, 0060-0061];
and wherein the plurality of duty cycle parameters includes a first duty cycle parameter and one or more subsequent duty cycle parameters with increasing duty cycle [0053].
With regards to claim 19. Autor1 disclose(s):
The non-transitory computer-readable storage medium of claim 16,
Marakhtanov further disclose(s):
wherein the duty cycle parameter includes a predetermined amount of time [0044], and wherein the processing circuit is further caused to:
maintain a clock or timer, wherein the control signal is generated in response to the clock or timer indicating that the predetermined amount of time has passed ([0043, 0071-0072]).
With regards to claim 20. Autor1 disclose(s):
The non-transitory computer-readable storage medium of claim 16,
Marakhtanov further disclose(s):
wherein the user interface is generated by a computer application (fig 14a) executed by the processing circuit [0250], the user interface having one or more selectable and alterable duty cycle parameter options (fig 14a; see UNFM1-UNFMp [0042]);
and wherein the duty cycle parameter is selected from among the one or more selectable and alterably duty cycle parameter options such that the generated control signal causes the pulse duty cycle to generate a doping profile in an experimental wafer to match a predetermined doping profile ([0250, 0043]).
Claim(s) 5, 12, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Marakhtanov (US 20230215694 A1) in view of Guo (US 20230170194 A1) as applied to claims 1, 10, and 16 above, and further in view of Drewery (US 20230230805 A1).
With regards to claim 5. Marakhtanov as modified disclose(s):
The computer implemented method of claim 1,
wherein the duty cycle parameter includes a predetermined number of pulses sent by the wafer pulse power supply [0053], and wherein the method further comprises:
Marakhtanov as modified does not disclose(s):
maintaining, by the processing circuit, a counter of a number of pulses sent by the wafer pulse power supply; wherein the control signal is generated in response to the counter exceeding the predetermined number of pulse.
Drewery teaches
maintaining, by the processing circuit, a counter of a number of pulses sent by the wafer pulse power supply; wherein the control signal is generated in response to the counter exceeding the predetermined number of pulses [0067].
Before the effective filing date of the claimed invention, it would have been obvious for one of ordinary skill in the art to have modified the device/method/system of Marakhtanov by maintaining, by the processing circuit, a counter of a number of pulses sent by the wafer pulse power supply; wherein the control signal is generated in response to the counter exceeding the predetermined number of pulse as disclosed by Drewery in order to synchronize signals to generate an RF signal as taught/suggested by Drewery ([0067]).
With regards to claim 12. Marakhtanov as modified disclose(s):
The plasma doping system of claim 10,
Marakhtanov further disclose(s):
wherein the duty cycle parameter includes a predetermined number of pulses sent by the wafer pulse power supply (see pulses in cycles 1 and 2 in figs 2a and 2b) [0053], and wherein the processing circuit is further caused to:
Marakhtanov as modified does not disclose(s):
maintain a counter of a number of pulses sent by the wafer pulse power supply, wherein the control signal is generated in response to the counter exceeding the predetermined number of pulses.
Drewery teaches
maintain a counter of a number of pulses sent by the wafer pulse power supply, wherein the control signal is generated in response to the counter exceeding the predetermined number of pulses [0067].
Before the effective filing date of the claimed invention, it would have been obvious for one of ordinary skill in the art to have modified the device/method/system of Marakhtanov by maintain a counter of a number of pulses sent by the wafer pulse power supply, wherein the control signal is generated in response to the counter exceeding the predetermined number of pulses as disclosed by Drewery in order to synchronize signals to generate an RF signal as taught/suggested by Drewery ([0067]).
With regards to claim 18. Marakhtanov as modified disclose(s):
The non-transitory computer-readable storage medium of claim 16,
Marakhtanov further disclose(s):
wherein the duty cycle parameter includes a predetermined number of pulses sent by the wafer pulse power supply [0053], and wherein the processing circuit is further caused to:
Marakhtanov as modified does not disclose(s):
maintain a counter of a number of pulses sent by the wafer pulse power supply, wherein the control signal is generated in response to the counter exceeding the predetermined number of pulses.
Drewery teaches
maintain a counter of a number of pulses sent by the wafer pulse power supply, wherein the control signal is generated in response to the counter exceeding the predetermined number of pulses [0067].
Before the effective filing date of the claimed invention, it would have been obvious for one of ordinary skill in the art to have modified the device/method/system of Marakhtanov by implementing to maintain a counter of a number of pulses sent by the wafer pulse power supply, wherein the control signal is generated in response to the counter exceeding the predetermined number of pulses as disclosed by Drewery in order to synchronize signals to generate an RF signal as taught/suggested by Drewery ([0067]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Renan Luque whose telephone number is (571)270-1044. The examiner can normally be reached M-F 9:30AM-5:30PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander Taningco can be reached at (571) 272-8048. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/RENAN LUQUE/ Primary Examiner, Art Unit 2845
