Prosecution Insights
Last updated: October 25, 2026
Application No. 18/812,889

ENERGY-EFFICIENT INDIRECT PREFETCHER

Final Rejection §112
Filed
Aug 22, 2024
Examiner
VICARY, KEITH E
Art Unit
2183
Tech Center
2100 — Computer Architecture & Software
Assignee
Ampere Computing LLC
OA Round
4 (Final)
58%
Grant Probability
Moderate
5-6
OA Rounds
1y 8m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 58% of resolved cases
58%
Career Allowance Rate
405 granted / 700 resolved
+2.9% vs TC avg
Strong +40% interview lift
Without
With
+40.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 10m
Avg Prosecution
31 currently pending
Career history
754
Total Applications
across all art units

Statute-Specific Performance

§101
9.8%
-30.2% vs TC avg
§103
34.5%
-5.5% vs TC avg
§102
11.5%
-28.5% vs TC avg
§112
37.5%
-2.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 700 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 are pending in this office action and presented for examination. Claims 1, 4, 11-13, 18, and 20 are newly amended by the response received August 28, 2026. Claim 11 is associated with a “Previously Presented” status identifier; however, the claim contains newly added language. Claim 19 newly recites “(230)” in the third-to-last line, but this addition is not marked-up with underlining. Claim 19 contains an underlined “the” in the third-to-last line; however, this language was already present in the previous set of claims. Drawings The drawings are objected to because: In FIG. 2 as amended on January 28, 2026, reference characters 200 and 202 appear to be directed to a same element. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation “memory access information corresponding to two or more PCs of the plurality of PCs” in lines 4-5. However, it is indefinite as to whether a same instance of memory access information corresponds to two or more PCs of the plurality of PCs, or whether multiple instances of memory access information respectively correspond to two or more PCs of the plurality of PCs. Note that the limitation “the memory access information corresponding to the two or more PCs of the plurality of PCs” is recited in claim 1, lines 6-7. Claim 1 recites the limitation “the producer-consumer pair including a producer PC and a consumer PC of a data dependent access (DDA)” in lines 7-8. However, the metes and bounds of this limitation are indefinite. For example, the limitation uses the open-ended language “including”; however, it is unclear as to how a “pair” in the context of the instant invention can include an additional element beyond the recited producer PC and consumer PC. Claim 1 recites the limitation “a PC whose corresponding memory access information is stored in the ADT” in line 12. However, this limitation has insufficient antecedent basis, as, for example, “a PC” (which is not necessarily an earlier recited PC) was not previously recited to correspond to “memory access information”, whereas the “whose” language implies a PC that has already been recited to correspond to memory access information. For example, “a PC” (which is not necessarily an earlier recited PC) was not previously recited to correspond to memory access information that is stored in the ADT, whereas the “whose” language implies a PC that has already been recited to correspond to memory access information that is stored in the ADT. Claim 1 recites the limitation “the corresponding memory access information” in line 13. However, it is indefinite as to whether the antecedent basis for this limitation is the memory access information of the limitation “memory access information corresponding to…” in claim 1, lines 4-5, or “corresponding memory access information” in claim 1, line 12. Claims 2-17 are rejected for failing to alleviate the rejections of claim 1 above. Claim 2 recites the limitation “the first address and the second address of the PC” in lines 1-2. However, it is indefinite as to whether the first address is a PC address, or some other address associated with the PC (e.g., a load address of an instruction that is located at a PC). Similarly, it is indefinite as to whether the second address is a PC address, or some other address associated with the PC (e.g., a load address of an instruction that is located at a PC). Claim 11 recites the limitation “a potential producer’s PC’s data” in line 6. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to whether the “PC’s data” is an address of a program counter, or some other data indirectly associated with the PC. For example, a PC of the potential producer, and data of a PC of the potential producer, has not been previously recited and therefore has insufficient antecedent basis. (Note that, like the “whose” language addressed above, the use of apostrophes implies previously recited limitations.) Claim 11 recites the limitation “the ADT including the PC identifier, the first address, and the first data of the committed load instruction” in lines 9-10. However, there is insufficient antecedent basis for this limitation in the claims. Claim 11 recites the limitation “the PC identifier … of the committed load instruction” in lines 9-10. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to whether the “of the committed load instruction” language is or is not intended to apply to “the PC identifier” language. In the former case, the limitation does not appear to have antecedent basis. Claim 11 recites the limitation “the first address … of the committed load instruction” in lines 9-10. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to whether the “of the committed load instruction” language is or is not intended to apply to “the first address” language. In the former case, the limitation does not appear to have antecedent basis. Claim 11 recites the limitation “the first data of the committed load instruction” in lines 9-10. However, there is insufficient antecedent basis for this limitation in the claims. Claim 11 recites the limitation “the hardware stride fetcher” in line 11. However, there is insufficient antecedent basis for this limitation in the claims. Claim 12 recites the limitation “the commit PC” in line 3. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 12, line 5. Claim 12 recites the limitation “the hardware stride fetcher” in line 8. However, there is insufficient antecedent basis for this limitation in the claims. Claim 13 recites the limitation “the commit PC” in line 3. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 13, line 5. Claim 13 recites the limitation “the commit address” in lines 7-8. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 13, line 9. Claim 13 recites the limitation “the prefetch confidence of the first producer-consumer pair” in line 8. However, there is insufficient antecedent basis for this limitation in the claims. Claim 13 recites the limitation “the hardware stride fetcher” in line 10. However, there is insufficient antecedent basis for this limitation in the claims. Claim 18 recites the limitation “memory access information corresponding to two or more PCs of the plurality of PCs” in lines 3-4. However, it is indefinite as to whether a same instance of memory access information corresponds to two or more PCs of the plurality of PCs, or whether multiple instances of memory access information respectively correspond to two or more PCs of the plurality of PCs. Note that the limitation “the memory access information corresponding to the two or more PCs of the plurality of PCs” is recited in claim 18, lines 6-7. Claim 18 recites the limitation “the memory access information corresponding to the two or more PCs of the plurality of PCs” in lines 6-7. However, this limitation has insufficient antecedent basis in the claims. Claim 18 recites the limitation “the producer-consumer pair including a producer PC and a consumer PC of a data dependent access (DDA)” in lines 7-8. However, the metes and bounds of this limitation are indefinite. For example, the limitation uses the open-ended language “including”; however, it is unclear as to how a “pair” in the context of the instant invention can include an additional element beyond the recited producer PC and consumer PC. Claim 18 recites the limitation “the corresponding memory access information of the PC [of the two or more PCs]” in line 13. However, there is insufficient antecedent basis for this limitation in the claims. Claims 19-20 are rejected for failing to alleviate the rejections of claim 18 above. Claim 19 recites the limitation “the first address and the second address of the PC” in lines 1-2. However, it is indefinite as to whether the first address is a PC address, or some other address associated with the PC (e.g., a load address of an instruction that is located at a PC). Similarly, it is indefinite as to whether the second address is a PC address, or some other address associated with the PC (e.g., a load address of an instruction that is located at a PC). Claim 20 recites the limitation “data of a potential producer’s PC” in line 6. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to whether the “data of a potential producer’s PC” is an address of a program counter, or some other data indirectly associated with the PC. For example, a PC of the potential producer has not been previously recited and therefore has insufficient antecedent basis. (Note that, like the “whose” language addressed above, the use of apostrophes implies previously recited limitations.). Claim 20 recites the limitation “the ADT including the PC identifier, the first address, and the first data of the PC of the committed load instruction” in lines 9-10. However, there is insufficient antecedent basis for this limitation in the claims. Claim 20 recites the limitation “the PC identifier … of the PC of the committed load instruction” in lines 9-10. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to whether the “of the PC of the committed load instruction” language is or is not intended to apply to “the PC identifier” language. In the former case, the limitation does not appear to have antecedent basis. Claim 20 recites the limitation “the first address … of the PC of the committed load instruction” in lines 9-10. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to whether the “of the PC of the committed load instruction” language is or is not intended to apply to “the first address” language. In the former case, the limitation does not appear to have antecedent basis. Claim 20 recites the limitation “the first data of the PC of the committed load instruction” in lines 9-10. However, there is insufficient antecedent basis for this limitation in the claims. Claim 20 recites the limitation “the PC of the committed load instruction” in line 10. However, there is insufficient antecedent basis for this limitation in the claims. Response to Arguments Applicant on page 8 argues: “While Applicant does not necessarily agree, the specification is amended. In particular: … Applicant respectfully requests that the objections to the specification be withdrawn.” In view of the aforementioned amendments, the previously presented objections to the specification are withdrawn. Applicant on page 8 argues: “In particular, FIG. 2 stands objected. Applicant respectfully disagrees. Reference characters 200 and 202 are consistent with the Specification. In paragraph [0021], it is described that FIG. 2 illustrates an example of a domain-specific prefetcher hardware structure 200 for prefetching virtual addresses. Thus, the domain-specific prefetcher hardware structure 200 may also be referred to as a prefetcher 200. It is also described that the prefetcher may be included in a processing core 202, e.g., of a system-on-chip (SoC). There can be one-to- one correspondence between a prefetcher 200 and a core. Alternatively, there may be a one-to- many correspondence (i.e., a prefetcher 200 prefetching for multiple cores 202). In another alternative, there may be a many-to-one correspondence (i.e., multiple prefetchers 200 prefetching for a core 202). FIG. 2 illustrates these alternative correspondences. Applicant respectfully requests that the objections to the drawings be withdrawn.” However, Examiner notes that the objection to FIG. 2 was not based on the reference characters not being consistent with the specification. Rather, FIG. 2 was objected to based on reference characters 200 and 202 appearing to be directed to a same element (i.e., the dashed-line rectangle of FIG. 2). See MPEP 608.02, ¶ 6.22.02. Applicant on page 8 argues: “Claims 1, 4, 11, 12, 13, 18 and 20 are amended to address the issues raised. No new matter is introduced. Applicant respectfully requests that the objections to the claims be withdrawn.” In view of the aforementioned amendments, the previously presented objections to the claims are withdrawn. Applicant on page 9 argues: ‘The Examiner alleges that the "prefetch logic structure" in claims 4 is being interpreted under 35 U.S.C. § 112(f). The Examiner also indicates that the § 112(f) interpretation also covers the prefetch queue 250 and the prefetch outstanding buffer (POB) 260, which are parts of the prefetch logic 265. Applicant notes that the prefetch logic 265, as well as the prefetch queue 250 and the POB 260, are parts of the domain-specific prefetcher hardware structure 200 (also referred to as the prefetcher 200). E.g., see [0021]. Also, the specification specifically states that prefetch queue 250 and the POB 260 are themselves hardware structures. E.g., see [0036]. Nonetheless, to promote progress, claim is amended to recite "implemented in hardware". Applicant respectfully requests that the claims be correctly interpreted.’ However, Examiner submits that the aforementioned portions of the specification and recitation of hardware do not preclude the relevant limitations from being interpreted under 35 U.S.C. § 112(f). For example, an element being recited as being implemented in hardware does not preclude that element from being interpreted under 35 U.S.C. § 112(f). Applicant on page 9 argues: ‘In claim 1, the Examiner alleges that the phrase "memory access information corresponding to two or more PCs of the plurality of PCs" is indefinite. The Examiner questions whether a same instance of memory access information corresponds to two or more PCs or whether multiple instances of memory access information correspond. Applicant notes the following. In the first instance, the claim recites "memory access information corresponding to two or more PCs of the plurality of PCs". In a subsequent instance, the claim recites "the memory access information corresponding to the two or more PCs of the plurality of PCs". Applicant respectfully submits that the recitations are clear.’ However, the subsequent language cited by Applicant merely appears to use antecedent basis to refer back to the initial language and thus does not appear to shed light on which of the two possibilities is the case. In addition, claim language aside, Applicant does not appear to specify which of the two possibilities is the case. Applicant on page 9 argues: ‘In claim 1, the Examiner alleges that the metes and bounds of the recited feature "the producer-consumer pair including a producer PC and a consumer PC" is indefinite. Applicant respectfully disagrees. However, to promote progress of prosecution, the claim has been amended to recite "the producer PC and the consumer PC of the producer-consumer pair corresponding to each other" to address the issue.’ However, the aforementioned amendment does not appear to address the rationale of the rejection (which relates to the open-ended “including” language) — see the Claim Rejections - 35 USC § 112 section above. Applicant on page 10 argues: ‘In claim 1, the Examiner alleges that there is insufficient basis for the feature "wherein for a PC whose corresponding memory access information is stored in the ADT." Applicant respectfully disagrees. However, to promote progress of prosecution, claim 1 is amended to recite "a PC of the two or more PCs …” However, claim 1 does not appear to be amended to reflect the aforementioned language. Applicant on page 10 argues: ‘In claim 1, the Examiner alleges that "the corresponding memory access information" in line 13 is indefinite. Applicant respectfully disagrees. However, to promote progress of prosecution, claim 1 is amended to recite "the corresponding memory access information of the PC" to address the issue.’ However, claim 1 does not appear to be amended to reflect the aforementioned language. Applicant on page 10 argues: ‘In claim 2, the Examiner alleges that the feature "the first and the second address of the PC" is indefinite. Applicant respectfully disagrees. In claim 1, it is clearly stated "the first address being an address of a first load instruction of the PC". It is also clearly stated "the second address being an address of a second load instruction of the PC subsequent to the first load instruction of the PC."’ However, Examiner submits that an address of a PC is not necessarily identical to an address “of a load instruction” of a PC, and therefore it would not be clear that the aforementioned language of claim 2 should be interpreted in an identical manner as the aforementioned language of claim 1. Applicant on page 10 argues: ‘In claim 11, the Examiner alleges that the feature "a potential producer's PC's data" is indefinite. Applicant respectfully disagrees. However, to promote progress of prosecution, claim 11 is amended to recite "a potential producer's PC's data, producer PC data, the potential producer PC data being the data of a potential producer PC" for clarification purposes.’ However, claim 11 does not appear to be amended to reflect the aforementioned language. Applicant on page 10 argues: ‘In claim 11, the Examiner alleges that the feature "the ADT including the PC identifier, the first address, and the first data of the committed load instruction" is indefinite. Applicant respectfully disagrees. However, to promote progress of prosecution, claim 11 is amended to recite "the ADT including the PC identifier, the first address, and the first data of the PC of the committed load instruction" for clarification purposes.’ However, claim 11 does not appear to be amended to reflect the aforementioned language. Applicant on page 10 argues: ‘In claim 11, the Examiner alleges that the feature "the PC identifier ... of the committed load instruction" is indefinite. Applicant respectfully disagrees. However, to promote progress of prosecution, claim 11 is amended to recite "the PC identifier ... of the PC of the committed load instruction" for clarification purposes.’ However, claim 11 does not appear to be amended to reflect the aforementioned language. Applicant on page 10 argues: ‘Claim 11 is amended to recite "the hardware stride fetcher" for clarification purposes.’ However, the aforementioned amendment does not appear to overcome the associated indefinite rejection — see the Claim Rejections - 35 USC § 112 section above. Applicant on page 10 argues: ‘Claim 12 is amended to recite "The prefetcher of claim [[11]] 10" for clarification purposes.’ In view of the aforementioned amendment, the associated previously presented indefinite rejection is withdrawn. Applicant on page 11 argues: ‘Claim 12 is amended to recite "the hardware stride fetcher" for clarification purposes.’ However, the aforementioned amendment does not appear to overcome the associated indefinite rejection — see the Claim Rejections - 35 USC § 112 section above. Applicant on page 11 argues: ‘Claim 13 is amended to recite "The prefetcher of claim [[11]] 10" for clarification purposes.’ In view of the aforementioned amendment, the associated previously presented indefinite rejection is withdrawn. Applicant on page 11 argues: ‘Claim 13 is amended to recite "the hardware stride fetcher" for clarification purposes.’ However, the aforementioned amendment does not appear to overcome the associated indefinite rejection — see the Claim Rejections - 35 USC § 112 section above. Applicant on page 11 argues: ‘Claim 13 is amended to recite "increase [[the]] a prefetch confidence associated with the first producer-consumer pair" for clarification purposes.’ In view of the aforementioned amendment, the associated previously presented indefinite rejection is withdrawn. Applicant on page 11 argues: “In claim 18, amendments similar to claim 1 is made for clarification purposes.” Regarding amendments to claim 18 that are similar to amendments to claim 1, Examiner’s responses to arguments associated with those amendments to claim 1 are likewise relevant to the amendments to claim 18. Applicant on page 11 argues: ‘In claim 19, the Examiner alleges that the feature "the first and the second address of the PC" is indefinite. Applicant respectfully disagrees. In claim 18, it is clearly stated "the first address being an address of a first load instruction of the PC". It is also clearly stated "the second address being an address of a second load instruction of the PC subsequent to the first load instruction of the PC."’ However, Examiner submits that an address of a PC is not necessarily identical to an address “of a load instruction” of a PC, and therefore it would not be clear that the aforementioned language of claim 19 should be interpreted in an identical manner as the aforementioned language of claim 18. Applicant on page 11 argues: ‘In claim 20, the Examiner alleges that the feature "the first address ... of the committed load instruction" is indefinite. Applicant respectfully disagrees. However, to promote progress of prosecution, claim 20 is amended to recite "the first address ... of the PC of the committed load instruction" for clarification purposes.’ However, the aforementioned amendment does not appear to overcome the associated indefinite rejection — see the Claim Rejections - 35 USC § 112 section above. Applicant on page 11 argues: ‘In claim 20, the Examiner alleges that the feature "the first data of the committed load instruction" is indefinite. Applicant respectfully disagrees. However, to promote progress of prosecution, claim 20 is amended to recite "the first data of the PC of the committed load instruction" for clarification purposes.’ However, the aforementioned amendment does not appear to overcome the associated indefinite rejection — see the Claim Rejections - 35 USC § 112 section above. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEITH E VICARY whose telephone number is (571)270-1314. The examiner can normally be reached Monday to Friday, 9:00 AM to 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached at (571)270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEITH E VICARY/Primary Examiner, Art Unit 2183
Read full office action

Prosecution Timeline

Show 4 earlier events
Jan 23, 2026
Applicant Interview (Telephonic)
Jan 23, 2026
Examiner Interview Summary
Jan 28, 2026
Response after Non-Final Action
Feb 23, 2026
Request for Continued Examination
Mar 05, 2026
Response after Non-Final Action
Jun 03, 2026
Non-Final Rejection mailed — §112
Aug 28, 2026
Response Filed
Oct 06, 2026
Final Rejection mailed — §112 (current)

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Prosecution Projections

5-6
Expected OA Rounds
58%
Grant Probability
98%
With Interview (+40.1%)
3y 10m (~1y 8m remaining)
Median Time to Grant
High
PTA Risk
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