Prosecution Insights
Last updated: October 27, 2026

Keith E Vicary, USPTO Patent Examiner

Listed by the USPTO as VICARY, KEITH E

Tech Center 2100 • Art Units: 2100 2182 2183 2199

This examiner grants 58% of resolved cases

Analysis

Keith E. Vicary has resolved 700 cases in Art Unit 2100 and Tech Center 2100. The examiner's allowance rate is 57.9 percent. The median days to allowance is 1421, which suggests a relatively long prosecution cycle for applications in this unit. These figures provide a baseline for applicants to manage their expectations regarding both the likelihood of a grant and the time required to achieve it across these 700 resolved cases.

The interview lift is 40.1 percent. This 40.1 percent lift is very high, indicating that interviews are an extremely effective tool for applicants. Direct communication with Vicary can significantly improve the chances of securing an allowance, potentially helping to navigate the 1421-day median timeline more efficiently. The 40.1 percent lift suggests that the examiner is highly responsive to the clarifications provided during a formal discussion.

Intel Corporation and Texas Instruments Incorporated are top companies appearing before this examiner. International Business Machines Corporation is also a frequent applicant. Firms like FINNEGAN, HENDERSON, FARABOW, GARRETT & DUNNER and DICKINSON WRIGHT RLLP are frequently involved. Essential Patents Group, LLP. is another top firm. The 700 resolved cases and 57.9 percent allowance rate suggest a negotiable environment for patent applicants.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

57.9%
Allow Rate
+2.9% vs TC avg
754
Total Applications
+40.1%
Interview Lift
1421
Avg Prosecution Days
Based on 700 resolved cases, 2023–2026

Rejection Statute Breakdown

9.8%
§101 Eligibility
11.5%
§102 Novelty
34.5%
§103 Obviousness
37.5%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
19094393 MASKING/ZEROING PREDICATION IN PROCESSOR CIRCUITS Non-Final OA Apple Inc.
18680778 VARIABLE HISTORY LENGTH PERCEPTRON BRANCH PREDICTOR Non-Final OA Huawei Technologies Co., Ltd.
18326202 DEVICE AND METHOD OF DETECTING STRIDE ACCESS BASED ON PREDICTED ADDRESS FOR HARDWARE PREFETCH USED FOR CACHE MEMORY Final Rejection Fujitsu Limited
18661103 APPARATUSES AND METHODS FOR SPECULATIVE EXECUTION SIDE CHANNEL MITIGATION Final Rejection Intel Corporation
18478882 MEMORY SAFETY USING TAG CHECKING INSTRUCTIONS AND ISLANDS OF TAGS IN LINE WITH BUCKETED DATA Final Rejection Intel Corporation
18193232 INSTRUCTIONS FOR WRITE AND/OR READ OF CONTROL AND/OR STATUS REGISTERS Final Rejection INTEL CORPORATION
17957969 DEVICE, METHOD AND SYSTEM TO DETERMINE A MODE OF PROCESSOR OPERATION BASED ON PAGE TABLE METADATA Non-Final OA Intel Corporation
17708933 CONTROL REGISTER SET TO FACILITATE PROCESSOR EVENT BASED SAMPLING Final Rejection Intel Corporation
17484840 CIRCUITRY AND METHODS FOR ACCELERATING STREAMING DATA-TRANSFORMATION OPERATIONS Non-Final OA Intel Corporation
19206182 SECURING REGISTERS ACROSS SECURITY ZONES Non-Final OA TEXAS INSTRUMENTS INCORPORATED
19049097 PIPELINE PROTECTION FOR CPUS WITH SAVE AND RESTORE OF INTERMEDIATE RESULTS Non-Final OA TEXAS INSTRUMENTS INCORPORATED
19016487 EXIT HISTORY BASED BRANCH PREDICTION Final Rejection TEXAS INSTRUMENTS INCORPORATED
18958042 PROCESSOR WITH INSTRUCTION CONCATENATION Non-Final OA TEXAS INSTRUMENTS INCORPORATED
17876706 STORING A RESULT OF A FIRST INSTRUCTION OF AM EXECUTE PACKET IN A HOLDING REGISTER PRIOR TO COMPLETION OF A SECOND INSTRUCTION OF THE EXECUTE PACKET Final Rejection TEXAS INSTRUMENTS INCORPORATED
19142401 PROCESSOR WITH DELAYED INSTRUCTION PIPELINE FLUSH Non-Final OA Meta Platforms, Inc.
19210296 BRANCH PREDICTION USING SPECULATIVE INDEXING AND INTRALINE COUNT Non-Final OA INTERNATIONAL BUSINESS MACHINES CORPORATION
18680032 PHYSICAL REGISTER DEALLOCATION IN A PROCESSING SYSTEM Non-Final OA International Business Machines Corporation
18789957 PROCESSING DATA USING ACCELERATORS IN A SYSTEM ON A CHIP Final Rejection NVIDIA Corporation
18096115 Sorting Method and Control for Partially Ordered Data Arrays in Embedded Systems Non-Final OA SK hynix Inc.
19053672 FETCH QUEUE POPULATION Final Rejection Arm Limited
18619392 WAVE LEVEL MATRIX MULTIPLY INSTRUCTIONS Non-Final OA Advanced Micro Devices, Inc.
18390821 ACCUMULATION APERTURES Final Rejection Advanced Micro Devices, Inc.
18714604 DECODING METHOD, PROCESSOR, CHIP, AND ELECTRONIC DEVICE Final Rejection Hygon Information Technology Co., Ltd.

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Who Appears Before This Examiner

Top companies before this examiner

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Frequently Asked Questions

What is examiner Keith E Vicary's allowance rate?

57.9% of resolved applications examined by Keith E Vicary were allowed (700 resolved cases), compared with 38.8% across Art Unit 2100 over the last five years.

Does an interview help with examiner Keith E Vicary?

This examiner's interview lift is +40.1 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Keith E Vicary take to allow a patent?

Applications allowed by Keith E Vicary took 1,421 days on average from filing to allowance.

Which art unit does examiner Keith E Vicary work in?

Keith E Vicary examines applications in Art Unit 2100 in Tech Center 2100 (Computing & Software).

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