DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This Office Action is in response to Amendments/Remarks filed on July 22, 2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2, 6, and 11-13 are rejected under 35 U.S.C. 102(a)(1)(2) as being anticipated by U.S. Patent Application Publication No. 2021/0066200 A1 to Park et al. (“Park”). As to claim 1, Park discloses a semiconductor device, comprising: a bit line structure (BL) including a bit line contact plug (130) over a substrate (110) and a bit line (134) extended in one direction over the bit line contact plug (130); and a multi-layered spacer (142, 152, 147, 149) covering both sidewalls of the bit line structure (BL), wherein the multi-layered spacer (142, 152, 147, 149) of the bit line (134) is stacked in the order of a first boron-free nitride layer (142, 152), a boron nitride layer (147), and a second boron-free nitride layer (149), wherein the multi-layered spacer (142, 152, 147, 149) of the bit line contact plug (130) is stacked in the order of the first boron-free nitride layer (142, 152) and the boron nitride layer (147) (See Fig. 2, ¶ 0027-¶ 0051, ¶ 0072, ¶ 0118, ¶ 0126). As to claim 2, Park further discloses wherein the boron nitride layer (147) is silicon-free nitride (See ¶ 0047). As to claim 6, Park further discloses wherein the first (142, 152) and second (149) boron-free nitride layers include silicon nitride (See ¶ 0044, ¶ 0051, ¶ 0118). As to claim 11, Park discloses further comprising: a first impurity region (S/D, ¶ 0072) coupled to the bit line contact plug (130) and a second impurity region (S/D, ¶ 0072) in the substrate (110) (See Fig. 2, ¶ 0072). As to claim 12, Park discloses further comprising: a gate trench (T2) between the first impurity region (S/D, ¶ 0072) and the second impurity region (S/D, ¶ 0072); and a buried word line (118) formed in the gate trench (T2) (See Fig. 2, ¶ 0072). As to claim 13, Park discloses further comprising: a storage node contact plug (DC) coupled to the second impurity region (S/D, ¶ 0072); and a memory element (capacitor, ¶ 0126) formed over the storage node contact plug (DC) (See Fig. 2, ¶ 0126).
Claim(s) 1, 5, and 8 are rejected under 35 U.S.C. 102(a)(1)(2) as being anticipated by KR 20080084247 A to Ahn et al. (“Ahn”). As to claim 1, Ahn discloses a semiconductor device, comprising: a bit line structure (14) including a bit line contact plug (14a) over a substrate (10) and a bit line (14b) extended in one direction over the bit line contact plug (14a); and a multi-layered spacer (20a, 20b, 20c) covering both sidewalls of the bit line structure (14), wherein the multi-layered spacer (20a, 20b, 20c) of the bit line (14b) is stacked in the order of a first boron-free nitride layer (20a), a boron nitride layer (20b), and a second boron-free nitride layer (20c), wherein the multi-layered spacer (20a, 20b, 20c) of the bit line contact plug (14b) is stacked in the order of the first boron-free nitride layer (20a) and the boron nitride layer (20b) (See Fig. 1, Page 4-Page 7). As to claim 5, Ahn further discloses wherein the boron nitride layer (20b) has a thickness of 50 Å to 100 Å (See Page 5). As to claim 8, Ahn in view of Sarkar further discloses wherein the first boron-free nitride layer (20a) has a thickness of 5 Å to 10 Å (See Page 5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3 is rejected under 35 U.S.C. 103 as being unpatentable over KR 20080084247 A to Ahn et al. (“Ahn”) as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2021/0125929 A1 to Shin et al. (“Shin”). The teaching of Ahn has been discussed above. As to claim 3, although Ahn discloses wherein the boron nitride layer (20b) has a low dielectric constant (See Page 7), Ahn does not further disclose wherein the boron nitride layer is amorphous. However, Shin does disclose wherein the boron nitride layer is amorphous (See ¶ 0119). In view of the teachings of Ahn and Shin, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Ahn to have wherein the boron nitride layer is amorphous because such an amorphous boron nitride layer has a low dielectric constant and satisfactory mechanical strength that does not deteriorate (See Shin ¶ 0119).
Claim(s) 4 is rejected under 35 U.S.C. 103 as being unpatentable over KR 20080084247 A to Ahn et al. (“Ahn”) as applied to claim 1 above, and further in view of JP 2008-288560 A to Kikuchi (“Kikuchi”). The teaching of Ahn has been discussed above. As to claim 4, although Ahn does not further disclose wherein the boron nitride layer has a higher boron content than a nitride content, Kikuchi does further disclose wherein the boron nitride layer (15) has a higher boron content than a nitride content (See Page 13). In view of the teaching of Kikuchi, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Ahn to have wherein the boron nitride layer has a higher boron content than a nitride content because higher acid resistance is obtained such that the etching amount is relatively small during patterning processes to ensure high transistor characteristics (See Page 13).
Claim(s) 7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over KR 20080084247 A to Ahn et al. (“Ahn”) as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2020/0287133 A1 to Sarkar et al. (“Sarkar”). The teaching of Ahn has been discussed above. As to claim 7, although Ahn discloses the first boron-free nitride layer (20a) and the second boron-free nitride layer (20c) (See Fig. 1), Ahn does not further disclose wherein a thickness of the first boron-free nitride layer is smaller than a thickness of the second boron-free nitride layer. However, Sarkar does disclose wherein a thickness of the first boron-free nitride layer (504) is smaller than a thickness of the second boron-free nitride layer (508) (See Sarkar ¶ 0058, ¶ 0060, ¶ 0062) such that it would have been obvious the thicknesses and the number of layers are adjusted in view of thermal conductivity and adhesion property. As to claim 9, although Ahn discloses the second boron-free nitride layer (20c) (See Fig. 1,), Ahn does not further disclose wherein the second boron-free nitride layer has a thickness of 50 Å to 70 Å. However, Sarkar does disclose wherein the second boron-free nitride layer (508) has a thickness of 50 Å to 70 Å (See Sarkar ¶ 0058, ¶ 0060) such that it would have been obvious the thicknesses the number of layers are adjusted in view of thermal conductivity and adhesion property. Further, the applicant also has not established the critical nature of the “thicknesses”. “The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims….In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range.” In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir.1990). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention was made to have various ranges. It would also have been obvious to one of ordinary skill in the art at the time the invention was made to discover the optimum or workable ranges by routine experimentations to adjust the thicknesses in view of the desired adhesion property, thermal conductivity, and available dimensions. See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996) (claimed ranges of a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious).
Response to Arguments
Applicant's arguments with respect to claim 1 have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID CHEN whose telephone number is (571)270-7438. The examiner can normally be reached M-F 12-6.
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/DAVID CHEN/Primary Examiner, Art Unit 2815
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