Prosecution Insights
Last updated: October 02, 2026
Application No. 18/813,043

ORGANIC LIGHT-EMITTING DIODE DISPLAY PANEL

Non-Final OA §DP
Filed
Aug 23, 2024
Priority
Jan 18, 2021 — CN 202110061125.5 +2 more
Examiner
TYNES JR., LAWRENCE C
Art Unit
Tech Center
Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
676 granted / 791 resolved
+25.5% vs TC avg
Moderate +9% lift
Without
With
+8.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
22 currently pending
Career history
813
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
26.6%
-13.4% vs TC avg
§112
17.8%
-22.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 791 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. US 12101986 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application are broader than the claims of the cited patent. All OLED panels comprise an array of pixels which comprise a plurality of light emitting elements. 18813043 USPATENT 12101986 1. An organic light-emitting diode (OLED) display panel, comprising: a substrate; an organic light-emitting layer disposed on the substrate, and provided with a plurality of organic light-emitting monomers distributed in an array at intervals; a color filter layer disposed on a side of the organic light-emitting layer facing toward a light-exiting direction; and a light-absorbing material layer disposed on the side of the organic light-emitting layer facing toward the light-exiting direction; wherein the light-absorbing material layer comprises a plurality of pixel areas, non-pixel areas, and a first area; the plurality of pixel areas are disposed corresponding to the plurality of organic light-emitting monomers, and the non-pixel areas are disposed corresponding to spacer areas of the plurality of organic light-emitting monomers. 1. An organic light-emitting diode (OLED) display panel, comprising: a substrate; an organic light-emitting layer disposed on the substrate, and provided with a plurality of organic light-emitting monomers; a color filter layer disposed on a side of the organic light-emitting layer facing toward a light-exiting direction; and a light-absorbing material layer disposed on the side of the organic light-emitting layer facing toward the light-exiting direction; wherein the light-absorbing material layer comprises a plurality of second areas corresponding to a plurality of pixel areas of the plurality of organic light-emitting monomers; and the light-absorbing material layer further comprises a plurality of third areas corresponding to a plurality of non-pixel areas of spacer areas of the plurality of organic light-emitting monomers; and wherein on a side of the light-absorbing material layer facing away from the light-exiting direction, the plurality of third areas protrude from the plurality of second areas to separate the plurality of organic light-emitting monomers. 13. An organic light-emitting diode (OLED) display panel, comprising: a substrate; an organic light-emitting layer disposed on the substrate, and provided with a plurality of organic light-emitting monomers distributed in an array at intervals; a color filter layer disposed on a side of the organic light-emitting layer facing toward a light-exiting direction; and a light-absorbing material layer disposed on the side of the organic light-emitting layer facing toward the light-exiting direction, wherein the light-absorbing material layer comprises a plurality of pixel areas, non-pixel areas, and a first area, the plurality of pixel areas are disposed corresponding to the plurality of organic light-emitting monomers, and the non-pixel areas are disposed corresponding to spacer areas of the plurality of organic light-emitting monomers; a thickness of the light-absorbing material layer in the pixel areas is 50 nanometers to 2000 nanometers; and an absorbance of the light-absorbing material layer in the pixel areas for light with a wavelength of 380 nanometers to 700 nanometers is less than 95%. 13. An organic light-emitting diode (OLED) display panel, comprising: a substrate; an organic light-emitting layer disposed on the substrate, and provided with a plurality of organic light-emitting monomers; a color filter layer disposed on a side of the organic light-emitting layer facing toward a light-exiting direction; and a light-absorbing material layer disposed on the side of the organic light-emitting layer facing toward the light-exiting direction, wherein the light-absorbing material layer comprises a plurality of second areas corresponding to a plurality of pixel areas of the plurality of organic light-emitting monomers, and the light-absorbing material layer further comprises a plurality of third areas corresponding to a plurality of non-pixel areas of spacer areas of the plurality of organic light-emitting monomers; wherein on a side of the light-absorbing material layer facing away from the light-exiting direction, the plurality of third areas protrude from the plurality of second areas to separate the plurality of organic light-emitting monomers; wherein a thickness of the light-absorbing material layer in the pixel areas is 50 nanometers to 2000 nanometers; and wherein an absorbance of the light-absorbing material layer in the pixel areas for light with a wavelength of 380 nanometers to 700 nanometers is less than 95%. . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAWRENCE C TYNES JR. whose telephone number is (571)270-7606. The examiner can normally be reached 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LAWRENCE C TYNES JR./Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Aug 23, 2024
Application Filed
Sep 10, 2026
Non-Final Rejection mailed — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751324
SEMICONDUCTOR PACKAGE MANUFACTURED THROUGH A THERMOCOMPRESSION PROCESS USING A NON-CONDUCTIVE FILM (NCF)
3y 2m to grant Granted Sep 29, 2026
Patent 12751299
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
2y 3m to grant Granted Sep 29, 2026
Patent 12740072
DISCRETE DEVICE INTERCONNECTIONS BETWEEN STACKED SUBSTRATES
3y 7m to grant Granted Sep 15, 2026
Patent 12740134
MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
2y 4m to grant Granted Sep 15, 2026
Patent 12740488
SEMICONDUCTOR PACKAGE
2y 3m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
94%
With Interview (+8.8%)
2y 4m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 791 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month