DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Objections
2. Claims 1 and 2 are objected to because of the following informalities: claim 1, on the last line recites: “the top electrode” which lacks an antecedent basis. For examination purposes, claim 1:
“1. A semiconductor device, comprising:
a magnetic tunneling junction (MTJ) on a substrate;
a cap layer adjacent to the MTJ and extended to overlap a top surface of the MTJ;
a first inter-metal dielectric (IMD) layer around the MTJ, wherein a top surface of the cap layer is higher than a top surface of the first IMD layer; and
a stop layer on the first IMD layer and the top electrode.”
is interpreted to be:
“1. A semiconductor device, comprising:
a magnetic tunneling junction (MTJ) on a substrate;
a top electrode on the MTJ;
a cap layer adjacent to the MTJ and extended to overlap a top surface of the MTJ;
a first inter-metal dielectric (IMD) layer around the MTJ, wherein a top surface of the cap layer is higher than a top surface of the first IMD layer; and
a stop layer on the first IMD layer and the top electrode.”
and as such, “a top electrode on the MTJ” in claim 2 (which depends on claim 1) is removed.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
3. Claims 1-2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Li et al. U.S. Patent Application Publication 2010/0102404 A1 (the ‘404 reference).
The reference discloses in Figs. 4-5, para [13, 14] (paragraph(s) [0013], [0014] and other text a semiconductor device as claimed.
Referring to claim 1, the ‘404 reference discloses a semiconductor device, comprising:
a magnetic tunneling junction (MTJ) (502, para [40]) on a substrate (ILD/bottom line 240/205, para [18]);
a top electrode (416, para [32]) on the MTJ (206);
a cap layer (402) adjacent to the MTJ and extended to overlap a top surface of the MTJ (para [32]: “cap layer 402 is disposed on the patterned top electrode 416 and the bottom cap layer 202”);
a first inter-metal dielectric (IMD) layer (“first IMD”, a portion of ILD 404 (para [32]), label added by the examiner for ease of explanation, Fig. 5 reproduced below) around the MTJ (502), wherein a top surface of the cap layer (402, which is disposed on the top electrode 416) is higher than a top surface of the first IMD layer (the “first IMD”); and
a cap layer 412 (para [33]), which can be termed a “stop layer” as claimed, on the first IMD layer (the “first IMD”) and the top electrode.
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Referring to claim 2, the reference further discloses:
a metal interconnection (230, para [18]) under the MTJ (502); and
a second IMD layer (ILD 240, para [18]) around the metal interconnection (230), wherein the cap layer (402) is adjacent to the top electrode (416) and the MTJ (502) and on the second IMD layer (ILD).
Allowable Subject Matter
4. Claims 3-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for the indication of allowable subject matter: The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to teach or render obvious a semiconductor device with all exclusive limitations as recited in claims 3 and 4, which may be characterized (claim 3) in that a hard mask is on the stop layer, and (claim 4) in that a sidewall of the stop layer is aligned with a sidewall of the top electrode.
Conclusion
5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TU TU V HO whose telephone number is (571)272-1778. The examiner can normally be reached on Monday to Thursday 6:30 - 15:00, Monday through Thursday.
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10-09-2026
/TU-TU V HO/Primary Examiner, Art Unit 2818
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