DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2 and 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0371686 to Harada et al. (hereinafter Harada) in view of Nakamata (US 2022/0310466).
With respect to claim 1, Harada discloses a semiconductor module (e.g., a semiconductor device sealed with the sealing structure) (Harada, Fig. 1, ¶0001, ¶0017, ¶0034-¶0069), comprising:
a stacked substrate (e.g., an insulating substrate 5 including an insulating layer 52 and electrode patterns 51 and 53) (Harada, Fig. 1, ¶0034-¶0036);
a semiconductor device (e.g., power semiconductor elements 4) (Harada, Fig. 1, ¶0034-¶0035, ¶0042-¶0043) mounted on the stacked substrate (5);
a case (e.g., case member 2 encapsulating the power semiconductor elements 4 on the substrate 5) (Harada, Fig. 1, ¶0034, ¶0036, ¶0052) housing encapsulated members including the semiconductor device (4) and the stacked substrate (5);
an encapsulant (e.g., a silicone gel 8) (Harada, Fig. 1, ¶0034, ¶0037) filling the case (2) to encapsulate the encapsulated members (4/5); and
a sheet (e.g., plate 10 having a flat shape) (Harada, Fig. 1, ¶0040, ¶0054, ¶0069) provided on an upper surface of the encapsulant (8), wherein
the encapsulant (8) (Harada, Fig. 1, ¶0034, ¶0037) includes a gel at a position facing the sheet (10) and the sheet (10) is provided on the gel (8).
Further, Harada does not specifically disclose a mica sheet.
However, Harada teaches that the sheet (10) (Harada, Fig. 1, ¶0054) is in contact with the cured silicone gel (8) and includes resin material to suppress the detachment of silicone gel from insulating substrate, and to suppress insulation deterioration of the power module to provide reliable semiconductor device (Harada, ¶0064).
Further, Nakamata teaches forming a protective layer (21) (Nakamata, Fig. 1, ¶0025, ¶0044-¶0045,¶0061-¶0063, ¶0088-¶0090) on the encapsulant (20) and comprising a cured silicone rubber material and a specific amount of inorganic filler including mica having plate-like body, to improve the reliability of the protective layer (21), and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Harada by forming resin sheet including mica having plate-like body as a protective sheet as taught by Nakamata, wherein the resin sheet including mica is in contact with the silicone gel of Harada to have the semiconductor device comprising a mica sheet, in order to suppress the detachment of silicone gel from insulating substrate, and to suppress insulation deterioration of the power module to provide reliable semiconductor device; and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device (Harada, ¶0064; Nakamata, ¶0025, ¶0044-¶0045, ¶0061-¶0063, ¶0088-¶0090).
Regarding claim 2, Harada in view of Nakamata discloses the semiconductor module according to claim 1. Further, Harada discloses the semiconductor module, wherein the encapsulant (8) (Harada, Fig. 1, ¶0034, ¶0037) encapsulates the encapsulated members (4/5) in the gel.
Regarding claim 4, Harada in view of Nakamata discloses the semiconductor module according to claim 1. Further, Harada does not specifically disclose that the mica sheet covers at least 10% of an area of an upper surface of the gel.
However, Harada teaches that the resin sheet (10) (Harada, Fig. 1, ¶0067) is formed to cover the upper surface of the substrate (5) having an area of more than 10% of an area of an upper surface of the gel (8), to secure insulation in power semiconductor element (4) and insulation substrate (5).
Further, Nakamata teaches forming a protective layer (21) (Nakamata, Fig. 1, ¶0025, ¶0044-¶0045,¶0061-¶0063, ¶0088-¶0090) on the encapsulant (20) and comprising a cured silicone rubber material and a specific amount of inorganic filler including mica having plate-like body, to improve the reliability of the protective layer (21), and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Harada/Nakamata by forming resin sheet including mica having plate-like body as a protective sheet as taught by Nakamata, wherein the resin sheet including mica cover the upper surface of the substrate of Harada having an area of more than 10% of an area of an upper surface of the gel to have the semiconductor device, wherein the mica sheet covers at least 10% of an area of an upper surface of the gel, in order to suppress the detachment of silicone gel from insulating substrate, and to suppress insulation deterioration of the power module to provide reliable semiconductor device; and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device (Harada, ¶0064; Nakamata, ¶0025, ¶0044-¶0045, ¶0061-¶0063, ¶0088-¶0090).
Regarding claim 5, Harada in view of Nakamata discloses the semiconductor module according to claim 1. Further, Harada does not specifically disclose that the mica sheet has a thickness in a range of 0.2mm to 0.5mm.
However, Nakamata teaches forming a protective layer (21) (Nakamata, Fig. 1, ¶0025, ¶0044-¶0045,¶0061-¶0063, ¶0088-¶0090) comprising a cured silicone rubber material and a specific amount of inorganic filler including mica having plate-like body, wherein the protective layer (21) has thickness in a range of 100 mm (0.1mm) to 500 mm (0.5mm) (Nakamata, Fig. 1, ¶0049), to prevent peeling between the protective layer (21) and the encapsulant (20), and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device.
The claimed range lies inside the range of Nakamata. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists (M.P.E.P. §2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Harada/Nakamata by forming resin sheet including mica having plate-like body as a protective sheet having a specific thickness as taught by Nakamata to have the semiconductor device, wherein the mica sheet has a thickness in a range of 0.2mm to 0.5mm, in order to prevent peeling between the protective layer and the encapsulant, and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device (Nakamata, ¶0025, ¶0044-¶0045, ¶0049, ¶0061-¶0063, ¶0088-¶0090).
With respect to claim 6, Harada discloses a method of manufacturing a semiconductor module (e.g., forming a semiconductor device sealed with the sealing structure) (Harada, Figs. 1, 8-11, ¶0001, ¶0017, ¶0034-¶0094), the method comprising:
bonding a semiconductor device (e.g., power semiconductor elements 4) (Harada, Figs. 1, 8, ¶0034-¶0035, ¶0042-¶0043, ¶0073) to a stacked substrate (e.g., an insulating substrate 5 including an insulating layer 52 and electrode patterns 51 and 53) (Harada, Figs. 1, 8, ¶0034-¶0036);
mounting the stacked substrate to a case (e.g., case member 2 encapsulating the power semiconductor elements 4 on the substrate 5) (Harada, Figs. 1, 8, ¶0034, ¶0036, ¶0052, ¶0073);
applying a gel (e.g., a silicone gel 8, resin providing step) (Harada, Figs. 1, 8, ¶0034, ¶0037, ¶0073) in the case (2);
curing the gel (e.g., resin curing step) (Harada, Figs. 1, 8, ¶0073); and
mounting a sheet (e.g., close contacting step to press the plate 10 having a flat shape to the cured silicone gel 8) (Harada, Figs. 1, 10, ¶0040, ¶0054, ¶0069, ¶0076) to an upper surface of the gel (8).
Further, Harada does not specifically disclose a mica sheet.
However, Harada teaches that the sheet (10) (Harada, Fig. 1, ¶0054) is in contact with the cured silicone gel (8) and includes resin material to suppress the detachment of silicone gel from insulating substrate, and to suppress insulation deterioration of the power module to provide reliable semiconductor device (Harada, ¶0064).
Further, Nakamata teaches forming a protective layer (21) (Nakamata, Fig. 1, ¶0025, ¶0044-¶0045,¶0061-¶0063, ¶0088-¶0090) on the encapsulant (20) and comprising a cured silicone rubber material and a specific amount of inorganic filler including mica having plate-like body, to improve the reliability of the protective layer (21), and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the method of Harada by forming resin sheet including mica having plate-like body as a protective sheet as taught by Nakamata, wherein the resin sheet including mica is in contact with the silicone gel of Harada to have the method comprising a mica sheet, in order to suppress the detachment of silicone gel from insulating substrate, and to suppress insulation deterioration of the power module to provide reliable semiconductor device; and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device (Harada, ¶0064, ¶0076; Nakamata, ¶0025, ¶0044-¶0045, ¶0061-¶0063, ¶0088-¶0090).
Claims 1-2, 4, and 6 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0371686 to Harada in view of Liang et al. (US 2011/0076550, hereinafter Liang).
With respect to claim 1, Harada discloses a semiconductor module (e.g., a semiconductor device sealed with the sealing structure) (Harada, Fig. 1, ¶0001, ¶0017, ¶0034-¶0069), comprising:
a stacked substrate (e.g., an insulating substrate 5 including an insulating layer 52 and electrode patterns 51 and 53) (Harada, Fig. 1, ¶0034-¶0036);
a semiconductor device (e.g., power semiconductor elements 4) (Harada, Fig. 1, ¶0034-¶0035, ¶0042-¶0043) mounted on the stacked substrate (5);
a case (e.g., case member 2 encapsulating the power semiconductor elements 4 on the substrate 5) (Harada, Fig. 1, ¶0034, ¶0036, ¶0052) housing encapsulated members including the semiconductor device (4) and the stacked substrate (5);
an encapsulant (e.g., a silicone gel 8) (Harada, Fig. 1, ¶0034, ¶0037) filling the case (2) to encapsulate the encapsulated members (4/5); and
a cover sheet (e.g., cover 9 and plate 10 having a flat shape comprised of PPS resin) (Harada, Fig. 1, ¶0040, ¶0054, ¶0069, ¶0096-¶0097) provided on an upper surface of the encapsulant (8), wherein
the encapsulant (8) (Harada, Fig. 1, ¶0034, ¶0037) includes a gel at a position facing the cover sheet (9/10) and the cover sheet (9/10) is provided on the gel (8).
Further, Harada does not specifically disclose a mica sheet.
However, Harada teaches that the cover sheet (9/10) (Harada, Fig. 1, ¶0054) is in contact with the cured silicone gel (8) and includes a resin material (e.g., PPS resin) to suppress the detachment of silicone gel from insulating substrate, and to suppress insulation deterioration of the power module to provide reliable semiconductor device (Harada, ¶0064).
Further, Liang teaches forming a cover sheet (26) (Liang, Fig. 1, ¶0007, ¶0031-¶0033) as a protective packaging and comprising a sheet of mica, wherein the mica sheet is a layered silicate typically having a muscovite structure and a six-sided planar monoclinic crystalline structure with good cleavage properties along the direction of the large planar surfaces, the mica sheet is stable and inert to the action of most acids, water, external gases, liquids, and other contaminants, and capable of providing good environmental protection in many different environments. Also, the mica is stable at high temperatures, has a relatively low weight and volume, good dielectric strength, uniform dielectric constant, and low electrical power loss factor (Liang, ¶0032-¶0033).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Harada by forming a cover sheet as a sheet of mica having advanced protective packaging properties as taught by Liang to have the semiconductor device comprising a mica sheet, in order to provide protective packaging stable at high temperatures, having a relatively low weight and volume, and capable of providing good environmental protection in many different environment, and thus to obtain a reliable semiconductor device (Harada, ¶0064; Liang, ¶0007, ¶0032-¶0033).
Regarding claim 2, Harada in view of Liang discloses the semiconductor module according to claim 1. Further, Harada discloses the semiconductor module, wherein the encapsulant (8) (Harada, Fig. 1, ¶0034, ¶0037) encapsulates the encapsulated members (4/5) in the gel.
Regarding claim 4, Harada in view of Liang discloses the semiconductor module according to claim 1. Further, Harada does not specifically disclose that the mica sheet covers at least 10% of an area of an upper surface of the gel.
However, Harada teaches that the cover sheet (9/10) (Harada, Fig. 1, ¶0067) is formed to cover the upper surface of the substrate (5) having an area of more than 10% of an area of an upper surface of the gel (8), to secure insulation in power semiconductor element (4) and insulation substrate (5).
Further, Liang teaches forming a cover sheet (26) (Liang, Fig. 1, ¶0007, ¶0031-¶0033) as a protective packaging and comprising a sheet of mica, wherein the mica sheet has advanced protective packaging properties, and capable of providing good environmental protection in many different environments (Liang, ¶0032-¶0033).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Harada/Liang by forming a cover sheet as a sheet of mica having advanced protective packaging properties as taught by Liang, wherein the cover sheet including mica cover the upper surface of the substrate of Harada having an area of more than 10% of an area of an upper surface of the gel to have the semiconductor device, wherein the mica sheet covers at least 10% of an area of an upper surface of the gel, in order to suppress the detachment of silicone gel from insulating substrate, and to suppress insulation deterioration of the power module; and to provide protective packaging stable at high temperatures, having a relatively low weight and volume, and capable of providing good environmental protection in many different environment, and thus to obtain a reliable semiconductor device (Harada, ¶0064; Liang, ¶0007, ¶0032-¶0033).
With respect to claim 6, Harada discloses a method of manufacturing a semiconductor module (e.g., forming a semiconductor device sealed with the sealing structure) (Harada, Figs. 1, 8-11, ¶0001, ¶0017, ¶0034-¶0094), the method comprising:
bonding a semiconductor device (e.g., power semiconductor elements 4) (Harada, Figs. 1, 8, ¶0034-¶0035, ¶0042-¶0043, ¶0073) to a stacked substrate (e.g., an insulating substrate 5 including an insulating layer 52 and electrode patterns 51 and 53) (Harada, Figs. 1, 8, ¶0034-¶0036);
mounting the stacked substrate to a case (e.g., case member 2 encapsulating the power semiconductor elements 4 on the substrate 5) (Harada, Figs. 1, 8, ¶0034, ¶0036, ¶0052, ¶0073);
applying a gel (e.g., a silicone gel 8, resin providing step) (Harada, Figs. 1, 8, ¶0034, ¶0037, ¶0073) in the case (2);
curing the gel (e.g., resin curing step) (Harada, Figs. 1, 8, ¶0073); and
mounting a sheet (e.g., close contacting step to press the plate 10 having a flat shape to the cured silicone gel 8) (Harada, Figs. 1, 10, ¶0040, ¶0054, ¶0069, ¶0076) to an upper surface of the gel (8).
Further, Harada does not specifically disclose a mica sheet.
However, Harada teaches that the sheet (10) (Harada, Fig. 1, ¶0054) is in contact with the cured silicone gel (8) and includes resin material to suppress the detachment of silicone gel from insulating substrate, and to suppress insulation deterioration of the power module to provide reliable semiconductor device (Harada, ¶0064).
Further, Liang teaches forming a cover sheet (26) (Liang, Fig. 1, ¶0007, ¶0031-¶0033) as a protective packaging and comprising a sheet of mica, wherein the mica sheet is a layered silicate typically having a muscovite structure and a six-sided planar monoclinic crystalline structure with good cleavage properties along the direction of the large planar surfaces, the mica sheet is stable and inert to the action of most acids, water, external gases, liquids, and other contaminants, and capable of providing good environmental protection in many different environments. Also, the mica is stable at high temperatures, has a relatively low weight and volume, good dielectric strength, uniform dielectric constant, and low electrical power loss factor (Liang, ¶0032-¶0033).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the method of Harada by forming a cover sheet as a sheet of mica having advanced protective packaging properties as taught by Liang to have the method comprising a mica sheet, in order to provide protective packaging stable at high temperatures, having a relatively low weight and volume, and capable of providing good environmental protection in many different environment, and thus to obtain a reliable semiconductor device (Harada, ¶0064; Liang, ¶0007, ¶0032-¶0033).
Claims 3 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0371686 to Harada in view of Nakamata (US 2022/0310466) as applied to claim 1 (claim 6), and further in view of Sakamoto et al. (US 2020/0043822, hereinafter Sakomoto).
Regarding claim 3, Harada in view of Nakamata discloses the semiconductor module according to claim 1. Further, Harada does not specifically disclose that the encapsulant includes a resin that encapsulates the semiconductor device and the gel that is provided on the resin.
However, Sakamoto teaches forming a semiconductor device (Sakamoto, Fig. 1, ¶0001, ¶0035-¶0060) comprising a first sealing material (71) including hard resin (e.g., epoxy resin 71) that encapsulates the semiconductor device (1) to suppress peeling of the semiconductor device, and a second sealing material (72) including softer sealing material (e.g., silicone gel 72) to protect wiring members (4) from the thermal stress and from dust, and thus to provide reliable power semiconductor device that hands high frequency signals (Sakamoto, ¶0001, ¶0012, ¶0042-¶0044, ¶0059-¶0060).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Harada/Nakamata by forming a first sealing material including hard resin and a second sealing material including soft resin as taught by Sakamoto to have the semiconductor device, wherein the encapsulant includes a resin that encapsulates the semiconductor device and the gel that is provided on the resin, in order t to suppress peeling of the semiconductor device, and to protect wiring members from the thermal stress and from dust, and thus to provide reliable power semiconductor device that hands high frequency signals (Sakamoto, ¶0001, ¶0012, ¶0042-¶0044, ¶0059-¶0060).
Regarding claim 7, Harada in view of Nakamata discloses the method according to claim 6. Further, Harada does not specifically disclose the method, further comprising after mounting the stacked substrate but before applying the gel, injecting a resin in the case to encapsulate the semiconductor device and curing the injected resin.
However, Sakamoto teaches forming a semiconductor device (Sakamoto, Fig. 1, ¶0001, ¶0035-¶0060) comprising a first sealing material (71) including hard resin (e.g., epoxy resin 71) that encapsulates the semiconductor device (1) to suppress peeling of the semiconductor device, and a second sealing material (72) including softer sealing material (e.g., silicone gel 72) to protect wiring members (4) from the thermal stress and from dust, and thus to provide reliable power semiconductor device that hands high frequency signals (Sakamoto, ¶0001, ¶0012, ¶0042-¶0044, ¶0059-¶0060). In Sakamoto, after mounting the stacked substrate (32/33) but before applying the gel (72), the method includes injecting a resin (71) (Sakamoto, ¶0065-¶0066) in the case to encapsulate the semiconductor device (1) and curing the injected resin.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the method of Harada/Nakamata by forming a first sealing material including hard resin before forming a second sealing material including soft resin as taught by Sakamoto to have the method, further comprising after mounting the stacked substrate but before applying the gel, injecting a resin in the case to encapsulate the semiconductor device and curing the injected resin, in order t to suppress peeling of the semiconductor device, and to protect wiring members from the thermal stress and from dust, and thus to provide reliable power semiconductor device that hands high frequency signals (Sakamoto, ¶0001, ¶0012, ¶0042-¶0044, ¶0059-¶0060).
Claims 3 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0371686 to Harada in view of Liang (US 2011/0076550) as applied to claim 1 (claim 6), and further in view of Sakamoto (US 2020/0043822).
Regarding claim 3, Harada in view of Liang discloses the semiconductor module according to claim 1. Further, Harada does not specifically disclose that the encapsulant includes a resin that encapsulates the semiconductor device and the gel that is provided on the resin.
However, Sakamoto teaches forming a semiconductor device (Sakamoto, Fig. 1, ¶0001, ¶0035-¶0060) comprising a first sealing material (71) including hard resin (e.g., epoxy resin 71) that encapsulates the semiconductor device (1) to suppress peeling of the semiconductor device, and a second sealing material (72) including softer sealing material (e.g., silicone gel 72) to protect wiring members (4) from the thermal stress and from dust, and thus to provide reliable power semiconductor device that hands high frequency signals (Sakamoto, ¶0001, ¶0012, ¶0042-¶0044, ¶0059-¶0060).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Harada/Liang by forming a first sealing material including hard resin and a second sealing material including soft resin as taught by Sakamoto to have the semiconductor device, wherein the encapsulant includes a resin that encapsulates the semiconductor device and the gel that is provided on the resin, in order t to suppress peeling of the semiconductor device, and to protect wiring members from the thermal stress and from dust, and thus to provide reliable power semiconductor device that hands high frequency signals (Sakamoto, ¶0001, ¶0012, ¶0042-¶0044, ¶0059-¶0060).
Regarding claim 7, Harada in view of Liang discloses the method according to claim 6. Further, Harada does not specifically disclose the method, further comprising after mounting the stacked substrate but before applying the gel, injecting a resin in the case to encapsulate the semiconductor device and curing the injected resin.
However, Sakamoto teaches forming a semiconductor device (Sakamoto, Fig. 1, ¶0001, ¶0035-¶0060) comprising a first sealing material (71) including hard resin (e.g., epoxy resin 71) that encapsulates the semiconductor device (1) to suppress peeling of the semiconductor device, and a second sealing material (72) including softer sealing material (e.g., silicone gel 72) to protect wiring members (4) from the thermal stress and from dust, and thus to provide reliable power semiconductor device that hands high frequency signals (Sakamoto, ¶0001, ¶0012, ¶0042-¶0044, ¶0059-¶0060). In Sakamoto, after mounting the stacked substrate (32/33) but before applying the gel (72), the method includes injecting a resin (71) (Sakamoto, ¶0065-¶0066) in the case to encapsulate the semiconductor device (1) and curing the injected resin.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the method of Harada/Liang by forming a first sealing material including hard resin before forming a second sealing material including soft resin as taught by Sakamoto to have the method, further comprising after mounting the stacked substrate but before applying the gel, injecting a resin in the case to encapsulate the semiconductor device and curing the injected resin, in order t to suppress peeling of the semiconductor device, and to protect wiring members from the thermal stress and from dust, and thus to provide reliable power semiconductor device that hands high frequency signals (Sakamoto, ¶0001, ¶0012, ¶0042-¶0044, ¶0059-¶0060).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0371686 to Harada in view of Liang (US 2011/0076550) as applied to claim 1, and further in view of Nakamata (US 2022/0310466).
Regarding claim 5, Harada in view of Liang discloses the semiconductor module according to claim 1. Further, Harada does not specifically disclose that the mica sheet has a thickness in a range of 0.2mm to 0.5mm.
However, Nakamata teaches forming a protective layer (21) (Nakamata, Fig. 1, ¶0025, ¶0044-¶0045,¶0061-¶0063, ¶0088-¶0090) comprising mica material having plate-like body, wherein the protective layer (21) has thickness in a range of 100 mm (0.1mm) to 500 mm (0.5mm) (Nakamata, Fig. 1, ¶0049), to prevent peeling between the protective layer (21) and the encapsulant (20), and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device.
The claimed range lies inside the range of Nakamata. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists (M.P.E.P. §2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Harada/Liang by protective sheet having a specific thickness as taught by Nakamata to have the semiconductor device, wherein the mica sheet has a thickness in a range of 0.2mm to 0.5mm, in order to prevent peeling between the protective layer and the encapsulant, and to provide improved reliable protective layer to prevent entry of moisture into the encapsulant to prevent dielectric breakdown and to ensure the reliability of the semiconductor device (Nakamata, ¶0025, ¶0044-¶0045, ¶0049, ¶0061-¶0063, ¶0088-¶0090).
Conclusion
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/NATALIA A GONDARENKO/Primary Examiner, Art Unit 2891
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