DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 19 – 20 are objected to because of the following informalities: line 7 ends in a period and should be a semi-colon. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Schloss et al. (US 2023/0290639).
Regarding claim 1, Schloss teaches (FIG. 4):
A method of manufacturing a semiconductor device, comprising:
forming a first insulator (401);
forming a first layer including tungsten and nitrogen, on the first insulator (402);
reducing nitrogen concentration in the first layer by annealing the first layer in a state that the first layer is exposed (404); and
forming a second layer including tungsten, on the first layer after the annealing (406/408).
Regarding claim 2, Schloss teaches:
The method of Claim 1, wherein the annealing is performed at a temperature higher than 400°C and lower than 1050°C ([0078]).
Regarding claim 3, Schloss teaches:
The method of Claim 1, wherein the annealing is performed using H2 (hydrogen) gas ([0078]).
Regarding claim 4, Schloss teaches:
The method of Claim 1, wherein the annealing is performed using Ar (argon) gas or N2 (nitrogen) gas ([0078]).
Regarding claim 5, Schloss teaches:
The method of Claim 1, wherein the first layer before the annealing is a WN film (tungsten nitride film) ([0064]).
Regarding claim 6, Schloss teaches:
The method of Claim 1, wherein the first layer is formed by CVD (chemical vapor deposition) ([0094] – [0096]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Schloss et al. (US 2023/0290639) .
Regarding claim 9, Schloss teaches removing nitrogen from the tungsten nitride layer through an anneal process, but fails to expressly disclose the final nitrogen ratio:
The method of Claim 1, wherein the first layer and the second layer are formed such that nitrogen concentration in the first layer after the annealing is higher than nitrogen concentration in the second layer, and that a ratio of a number of nitrogen atoms to a sum of a number of tungsten atoms and the number of nitrogen atoms in the first layer after the annealing is lower than 40%.
However, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to anneal the barrier layer to degas nitrogen to the desired ratio, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Schloss et al. (US 2023/0290639) as applied to claim 1 above, and further in view of Ohsawa et al. (US 2023/0301088).
Regarding claim 10, Schloss teaches applying the low resistance liner to stacked 3D memory structures, but fails to expressly disclose:
The method of Claim 1, further comprising:
forming a stacked film alternately including a plurality of fourth layers and a plurality of second insulators;
forming a charge storage layer on side faces of the plurality of fourth layers via a third insulator; and
forming a semiconductor layer on a side face of the charge storage layer via a fourth insulator, removing the plurality of fourth layers to form a plurality of first concave portions in the stacked film; and
forming a plurality of electrode layers in the plurality of first concave portions, wherein the first layer and the second layer are one electrode layer of the plurality of electrode layers.
However, Ohsawa teaches the completed 3D NAND structure including a metal nitride barrier layer which is formed to include an anneal process and crystallization annealing.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to include the 3D memory structure of Ohsawa using the tungsten nitride barrier process of Schloss for the predictable advantage of improving metal resistance performance in a gate electrode of a 3D memory device in a conventional manner.
Claims 7 – 8 are rejected under 35 U.S.C. 103 as being unpatentable over Schloss et al. (US 2023/0290639) as applied to claim 1 above, and further in view of Ikeda et al. (US 2024/0268117).
Regarding claim 7, Schloss teaches an anneal process, but fails to expressly disclose:
The method of Claim 1, wherein the first layer is crystalized by the annealing.
However, Ikeda teaches a polycrystalline tungsten nitride layer of a 3D memory electrode formed through an anneal process having overlapping process conditions with Schloss.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention that the process of Schloss would form a crystalline portion of the barrier liner layer as disclosed by Ikeda.
Regarding claim 8, Schloss teaches an anneal process, but fails to expressly disclose:
The method of Claim 1, wherein tungsten included in the first layer after the annealing includes a crystal structure having a (110) plane.
However, Ikeda teaches a polycrystalline tungsten nitride layer of a 3D memory electrode formed through an anneal process having overlapping process conditions with Schloss.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention that the process of Schloss would form a polycrystalline portion of the barrier liner layer as disclosed by Ikeda, and polycrystalline structures inherently include (110) planes.
Claims 11 – 20 are rejected under 35 U.S.C. 103 as being unpatentable over Schloss et al. (US 2023/0290639) in view of Ikeda et al. (US 2024/0268117).
Regarding claim 11, Schloss teaches:
A semiconductor device comprising:
a first insulator; and
a first interconnect layer including a first layer that is provided on the first insulator and includes tungsten and nitrogen, and a second layer that is provided on the first layer and includes tungsten, wherein
nitrogen concentration in the first layer is higher than nitrogen concentration in the second layer.
Schloss teaches an anneal process, but fails to expressly disclose
tungsten included in the first layer includes a crystal structure having a (110) plane.
However, Ikeda teaches a polycrystalline tungsten nitride layer of a 3D memory electrode formed through an anneal process having overlapping process conditions with Schloss.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention that the process of Schloss would form a polycrystalline portion of the barrier liner layer as disclosed by Ikeda, and polycrystalline structures inherently include (110) planes.
Regarding claim 12, Schloss teaches:
The device of Claim 11, wherein the first layer includes tungsten as a principal component, and includes nitrogen atoms as impurity atoms (402).
Regarding claim 13, Schloss teaches removing nitrogen from the tungsten nitride layer through an anneal process, but fails to expressly disclose the final nitrogen ratio:
The device of Claim 11, wherein a ratio of a number of nitrogen atoms to a sum of a number of tungsten atoms and the number of nitrogen atoms in the first layer is lower than 40%.
However, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to anneal the barrier layer to degas nitrogen to the desired ratio, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Regarding claim 14, Schloss teaches removing nitrogen from the tungsten nitride layer through an anneal process, but fails to expressly disclose the final nitrogen ratio:
The device of Claim 11, wherein the nitrogen concentration in the second layer is 7.0 × 1019 to 2.0 × 2020 atoms/cm3.
However, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to anneal the barrier layer to degas nitrogen to the desired ratio, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Regarding claim 15, Schloss teaches:
The device of Claim 11, wherein the second layer further includes fluorine or chlorine ([0087]).
Regarding claim 16, Schloss teaches:
The device of Claim 11, wherein the first layer is a barrier metal layer, and the second layer is an interconnect material layer (FIG. 4).
Regarding claim 17, Schloss teaches:
The device of Claim 11, wherein the first interconnect layer further includes a third layer that is provided between the first layer and the second layer and includes tungsten (nucleation layer).
Regarding claim 18, Ikeda teaches:
The device of Claim 17, wherein the third layer further includes boron or silicon ([0044]).
Regarding claim 19, Schloss teaches:
A semiconductor device comprising:
a stacked film alternately including a plurality of electrode layers and a plurality of second insulators;
a charge storage layer provided on side faces of the plurality of electrode layers via a third insulator; and
a semiconductor layer provided on a side face of the charge storage layer via a fourth insulator.
wherein an electrode layer of the plurality of electrode layers includes a first layer that includes tungsten and nitrogen, and a second layer that is provided on the first layer and includes tungsten,
nitrogen concentration in the first layer is higher than nitrogen concentration in the second layer, and
Schloss teaches an anneal process, but fails to expressly disclose
tungsten included in the first layer includes a crystal structure having a (110) plane.
However, Ikeda teaches a polycrystalline tungsten nitride layer of a 3D memory electrode formed through an anneal process having overlapping process conditions with Schloss.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention that the process of Schloss would form a polycrystalline portion of the barrier liner layer as disclosed by Ikeda, and polycrystalline structures inherently include (110) planes.
Regarding claim 20, Schloss teaches:
The device of Claim 19, wherein the electrode layer of the plurality of electrode layers further includes a third layer that is provided between the first layer and the second layer and includes tungsten (nucleation layer).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CORY W ESKRIDGE whose telephone number is (571)272-0543. The examiner can normally be reached M - F 9 - 5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Madonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CORY W ESKRIDGE/Primary Examiner, Art Unit 2898
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