DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Oath/Declaration
2. The oath/declaration filed on 08/27/2024 is acceptable.
Priority
3. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
4. The office acknowledges receipt of the following items from the applicant:
Information Disclosure Statement (IDS) filed on 08/27/2024.
Specification
5. The specification is objected to for the following reason: The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed (see MPEP 606.01).
Claim Rejections-35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
6. Claim 8 is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 8 recites the limitation "the multi-layered second anode electrode" in line 4. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
7. Claim 7 is rejected under 35 U.S.C. 103(a) as being unpatentable over KIM et al. (U.S. Publication No. 2021/0399068 A1) in view of MOTOMURA K (JP-2019125532-A) and further in view of KIM J (KR-20160068581-A).
Regarding claim 7, KIM et al. discloses a display device, comprising: a substrate (110); a plurality of pixels (PX) on the substrate (110), each of the plurality of pixels (PX) including a first emission area (EMA1), and a transmission area (TA1/TA2TA3) through which light is transmitted (Figs. 3-5 and para [0048]-[0075]).
KIM et al. discloses the features of the claimed invention as discussed above, but does not disclose a second emission area enclosing the first emission area in a plan view of the display device, and a plurality of first thin film transistors and a plurality of second thin film transistors on the substrate; an over coating layer that covers the plurality of first thin film transistors and the plurality of second thin film transistors; a second anode electrode on the over coating layer, the second anode electrode electrically connected to a second thin film transistor from the plurality of second thin film transistors; a second bank on the second anode electrode and the over coating layer and exposes a part of the second anode electrode, the exposed part of the second anode electrode defining the second emission area; a second emission layer on the exposed part of the second anode electrode; a second cathode electrode on the second emission layer; an insulating layer on the second cathode electrode; a first anode electrode on the insulating layer and overlapping the second anode electrode, the first anode electrode electrically connected to a first thin film transistor from the plurality of first thin film transistors; a first bank on the first anode electrode and the insulating layer and exposes a part of the first anode electrode, the exposed part of the first anode electrode defining the first emission area; a first emission layer on the exposed part of the first anode electrode; and a first cathode electrode on the first emission layer.
MOTOMURA K, however, discloses a display device, comprising a second emission area (33B) that encloses the first emission area (33A) in a plan view of the display device (Fig. 4 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of KIM et al. to provide a second emission area enclosing the first emission area in a plan view of the display device as taught by MOTOMURA K for a purpose of improving the quality display for the display device.
KIM et al. and MOTOMURA K discloses the features of the claimed invention as discussed above, but does not disclose a plurality of first thin film transistors and a plurality of second thin film transistors on the substrate; an over coating layer that covers the plurality of first thin film transistors and the plurality of second thin film transistors; a second anode electrode on the over coating layer, the second anode electrode electrically connected to a second thin film transistor from the plurality of second thin film transistors; a second bank on the second anode electrode and the over coating layer and exposes a part of the second anode electrode, the exposed part of the second anode electrode defining the second emission area; a second emission layer on the exposed part of the second anode electrode; a second cathode electrode on the second emission layer; an insulating layer on the second cathode electrode; a first anode electrode on the insulating layer and overlapping the second anode electrode, the first anode electrode electrically connected to a first thin film transistor from the plurality of first thin film transistors; a first bank on the first anode electrode and the insulating layer and exposes a part of the first anode electrode, the exposed part of the first anode electrode defining the first emission area; a first emission layer on the exposed part of the first anode electrode; and a first cathode electrode on the first emission layer.
KIM J, however, discloses a plurality of first thin film transistors (Middle TFT) and a plurality of second thin film transistors (Left TFT) on the substrate (110); an over coating layer (120) that covers the plurality of first thin film transistors (Middle TFT) and the plurality of second thin film transistors (Left TFT); a second anode electrode (131A) on the over coating layer (120), the second anode electrode (131A) electrically connected to a second thin film transistor (Left TFT) from the plurality of second thin film transistors; a second bank (161) on the second anode electrode (131A) and the over coating layer (120) and exposes a part of the second anode electrode (131A), the exposed part of the second anode electrode (131A) defining the second emission area (LEAA); a second emission layer (132A) on the exposed part of the second anode electrode (131A); a second cathode electrode (133A) on the second emission layer (132A); an insulating layer (140A) on the second cathode electrode (133A); a first anode electrode (151A) on the insulating layer (140A) and overlapping the second anode electrode (131A), the first anode electrode (151A) electrically connected to a first thin film transistor (Middle TFT) from the plurality of first thin film transistors; a first bank (163) on the first anode electrode (151A) and the insulating layer (140A) and exposes a part of the first anode electrode (151A), the exposed part of the first anode electrode (151A) defining the first emission area (UEAA); a first emission layer (152A) on the exposed part of the first anode electrode (151A); and a first cathode electrode (153A) on the first emission layer (152A) (Fig. 2 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of KIM et al. and MOTOMURA K to provide a plurality of first thin film transistors and a plurality of second thin film transistors on the substrate; an over coating layer that covers the plurality of first thin film transistors and the plurality of second thin film transistors; a second anode electrode on the over coating layer, the second anode electrode electrically connected to a second thin film transistor from the plurality of second thin film transistors; a second bank on the second anode electrode and the over coating layer and exposes a part of the second anode electrode, the exposed part of the second anode electrode defining the second emission area; a second emission layer on the exposed part of the second anode electrode; a second cathode electrode on the second emission layer; an insulating layer on the second cathode electrode; a first anode electrode on the insulating layer and overlapping the second anode electrode, the first anode electrode electrically connected to a first thin film transistor from the plurality of first thin film transistors; a first bank on the first anode electrode and the insulating layer and exposes a part of the first anode electrode, the exposed part of the first anode electrode defining the first emission area; a first emission layer on the exposed part of the first anode electrode; and a first cathode electrode on the first emission layer as taught by KIM J for a purpose of improving the performance for the display device.
8. Claim 11 is rejected under 35 U.S.C. 103(a) as being unpatentable over KIM et al., MOTOMURA K and KIM J in view of KIM et al., hereafter “KIM’864” (U.S. Publication No. 2023/0209864 A1).
KIM et al., MOTOMURA K and KIM J disclose the features of the claimed invention as discussed above, but does not disclose further comprising: a low potential power line on the substrate, the low potential power line electrically connected to the second cathode electrode.
KIM’864, however, discloses further comprising: a low potential power line (EVSSL) on the substrate, the low potential power line (EVSSL) electrically connected to the second cathode electrode (532) (Figs. 1A-1B and para [0073]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of KIM et al., MOTOMURA K and KIM J to provide further comprising: a low potential power line on the substrate, the low potential power line electrically connected to the second cathode electrode as taught by KIM’864 for a purpose of receiving the low potential power voltage for the display device.
9. Claims 14-17 are rejected under 35 U.S.C. 103(a) as being unpatentable over KIM J (KR-20160068581-A) in view of Chen (U.S. Patent No. 10,923,543 B1).
Regarding claim 14, KIM J discloses a display device, comprising:
a substrate (110);
a first thin film transistor (Middle TFT) and a second thin film transistor (Left TFT) on the substrate (110);
a first light emitting element (150A) that is connected to the first thin film transistor (Middle TFT) (by first connection anode 155), the first light emitting element (150A) configured to emit light (R/G/B);
a second light emitting element (130A) that is connected to the second thin film transistor (Left TFT) (by first upper anode 131A and second source/drain electrode) and is overlapped by the first light emitting element (150A), the second light emitting element (130A) configured to emit light (Red light) (Fig. 2 and English Text).
KIM J discloses the features of the claimed invention as discussed above, but does not disclose wherein the first thin film transistor drives the first light emitting element to emit light and the second thin film transistor drives the second light emitting element to emit light during a first mode of the display device, and the first thin film transistor drives the first light emitting element to emit light and the second light emitting element does not emit light during a second mode of the display device.
Chen, however, discloses a display device comprising the first light-emitting device L1 of the first display area 11 uses an independent thin film transistor in the driving circuit 100 to control each first subpixel to emit light, that is, the driving light-emitting mode of the first display area 11 is the active driving light-emitting (Fig. 2 and col. 5 , lines 15-19).
Then, it would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of KIM J to provide the first thin film transistor drives the first light emitting element to emit light and the second thin film transistor drives the second light emitting element to emit light during a first mode of the display device, and the first thin film transistor drives the first light emitting element to emit light and the second light emitting element does not emit light during a second mode of the display device as taught by Chen for a purpose of operating and controlling the display device.
Regarding claim 15, KIM J and Chen (citations to KIM J unless otherwise noted) discloses wherein the second light emitting element (130A) is between the first light emitting element (150A) and at least one of the first thin film transistor (Middle TFT) and the second thin film transistor (Left TFT) in a cross-section view of the display device (Fig. 2).
Regarding claim 16, KIM J and Chen disclose the features of the claimed invention as discussed above, but does not disclose wherein the first light emitting element and the second light emitting element emit a same color of light.
It would have been an obvious matter of the design choice to provide wherein the first light emitting element and the second light emitting element emit a same color of light in order to improve the performance of the display device, since it has been held within the general skill of a worker in the art to select any color of the light emitting elements on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 17, KIM J and Chen (citations to KIM J unless otherwise noted) discloses wherein the first light emitting element (150A) includes a transparent first anode electrode (151A) that is connected to the first thin film transistor (Middle TFT), a first emission layer (152A) on the transparent first anode electrode (151A), and a first cathode electrode (153A) on the first emission layer (152A) (Fig. 2).
Allowable Subject Matter
10. The following is a statement of reason for the indication of allowable subject matter:
Regarding claim 1, KIM et al. (U.S. Publication No. 2021/0399068 A1) discloses a display device, comprising: a substrate (110); and a plurality of pixels (PX) on the substrate (110), the plurality of pixels (PX) configured to operate in an emission mode (EMA1/EMA2/EMA3) during which the plurality of pixels (PX) emit light or a transparent mode, wherein each of the plurality of pixels (PX) includes: a first emission area (EMA1); a second emission area (EMA2) that encloses the first emission area in a plan view of the display device; and a transmission area (TA2) that is adjacent to the second emission area (EMA2) (Figs. 3-5 and para [0048]-[0075]).
MOTOMURA K (JP-2019125532-A) discloses a display device, comprising a second emission area (33B) that encloses the first emission area (33A) in a plan view of the display device (Fig. 4 and English Text).
KIM et al. and MOTOMURA K, however, either alone or together in any combination, do not disclose, teach, or otherwise suggest a feature of “wherein the first emission area and the second emission area emit light during the emission mode, and the first emission area emits light and the second emission area does not emit light during the transparent mode such that the second emission area and the transmission area function as a transparent area during the transparent mode” as cited in the independent claim 1.
Claims 2-6 are directly or indirectly dependent on the independent claim 1, then, they are also being allowed.
Cited Prior Arts
11. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
CHUNG J (CN-203325906-U) discloses a display device comprising KIM J discloses a display device, comprising:
a substrate (1);
a first thin film transistor (T3) and a second thin film transistor (T4) on the substrate (1);
a first light emitting element (from PA1) that is connected to the first thin film transistor (T3) (through 221/217a), the first light emitting element configured to emit light (Fig. 7).
Conclusion
12. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc T. Dang whose telephone number is 571-272-1776. The examiner can normally be reached on 8:00 am-5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PHUC T DANG/Primary Examiner, Art Unit 2897
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