Prosecution Insights
Last updated: July 17, 2026
Application No. 18/817,105

VALIDATION OF DRAM CONTENT USING INTERNAL DATA SIGNATURE

Non-Final OA §102§103§112
Filed
Aug 27, 2024
Priority
Aug 12, 2020 — continuation of 11/250,891 +1 more
Examiner
TRAN, ANTHAN
Art Unit
2825
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
640 granted / 773 resolved
+14.8% vs TC avg
Minimal +2% lift
Without
With
+2.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
16 currently pending
Career history
800
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
74.8%
+34.8% vs TC avg
§102
19.1%
-20.9% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 773 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1 recites the limitation "the DRAM" in 5. There is insufficient antecedent basis for this limitation in the claim. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,080,373. Although the claims at issue are not identical, they are not patentably distinct from each other because: Regarding claim 1, claim 1 of Pat. ‘373 discloses a system comprising: a memory configured to store data for a host device, the memory comprising a plurality of regions; a plurality of signature generators, each signature generator associated with a respective region of the DRAM; and a controller configured to: receive, from the host device, a command; in response to receiving the command, read data from a first region of the memory; generate, using a first signature generator and based on the data read from the first region, a first signature; and store the first signature. Regarding claim 2, claim 2 of Pat. ‘373 discloses wherein the controller is further configured to select the first region based on information provided with the command. Regarding claim 3, claim 3 of Pat. ‘373 discloses wherein the information provided with the command is address information. Regarding claim 4, claim 4 of Pat. 373 discloses wherein the plurality of regions is a plurality of banks. Regarding claim 5, claim 5 of Pat. ‘373 discloses wherein the controller is further configured to: receive, from the host device, data indicating a region of the memory for which the first signature is to be generated; wherein the data is read from the first region based on the data indicating the region. Regarding claim 6, claim 6 of Pat. ‘373 discloses wherein the data indicating the region includes rows of memory to use in generating the first signature. Regarding claim 7, claim 7 of Pat. ‘373 discloses sense amplifiers configured to read bits in parallel from columns of a selected row in a memory array of the memory; and a row buffer configured to latch the bits read from the columns; wherein the data read from the first region includes the latched bits. Regarding claim 8, claim 8 of Pat. ‘373 discloses wherein the command requests the generation of the first signature. Regarding claim 9, claim 9 of Pat. ‘373 discloses wherein: updating the register comprises updating from a first value to a second value; the first value indicates that the first signature has not been generated; and the second value indicates that the first signature has been generated. Regarding claim 10, claim 10 of Pat. ‘373 discloses wherein the controller is further configured to receive, from the host device and prior to completion of generating the first signature, a second command to generate a second signature for a second region of the memory. Regarding claim 11, claim 11 of Pat. ‘373 discloses a system comprising: a memory; and a controller configured to: read data from each respective region of the memory; generate, using a respective signature generator and based on the data read from the respective region, a respective signature; and store each generated respective signature. Regarding claim 12, claim 12 of Pat. ‘373 discloses wherein the controller is further configured to generate a final signature based on at least two of the stored respective signatures. Regarding claim 13, claim 13 of Pat. ‘373 discloses wherein the controller is further configured to store the final signature in a register from which a host device can read the final signature. Regarding claim 14, claim 14 of Pat. ‘373 discloses wherein the final signature is stored in the register in response to receiving a command from the host device to generate the final signature. Regarding claim 15, claim 15 of Pat. ‘373 discloses further comprising one or more respective sense amplifiers associated with each respective region, wherein outputs from the respective sense amplifiers are used as inputs to the respective signature generator to generate the respective signature. Regarding claim 16, claim 16 of Pat. ‘373 discloses wherein the controller is further configured to set the register to a value indicating that a requested signature has not yet been generated. Regarding claim 17, claim 17 of Pat. ‘373 discloses wherein a host device reads at least one of the generated respective signatures in response to determining that the register has been updated. Regarding claim 18, claim 18 of Pat. ‘373 discloses a method comprising: reading data from regions of a memory; generating, using a respective signature generator for each region and based on the data read from the respective region, a respective signature; and storing each generated respective signature. Regarding claim 19, claim 19 of Pat. ‘373 discloses wherein the regions are banks of a dynamic random access memory. Regarding claim 20, claim 20 of Pat. ‘373 discloses receiving, from a host device, data indicating a region of the memory for which at least one signature is to be generated. Claim 1 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 of U.S. Patent No. 11,250,891. Although the claims at issue are not identical, they are not patentably distinct from each other because: Regarding claim 1, claim 1 of Pat. ‘891 discloses a system comprising: a memory configured to store data for a host device, the memory comprising a plurality of regions; a plurality of signature generators, each signature generator associated with a respective region of the DRAM; and a controller configured to: receive, from the host device, a command; in response to receiving the command, read data from a first region of the memory; generate, using a first signature generator and based on the data read from the first region, a first signature; and store the first signature. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 11-14 and 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Karouby (US Pub. 2015/0169901). Regarding claims 11 and 18, Fig. 1 and Fig. 3 of Karouby discloses a system and a method comprising: a memory [RAM 115, Fig. 1]; and a controller [110, Fig. 1] configured to: read data from each respective region of the memory [step 1030 in Fig. 10]; generate, using a respective signature generator and based on the data read from the respective region, a respective signature [step 940 in Fig. 9]; and store each generated respective signature [step 950 in Fig. 9]. Regarding claim 12, Fig. 4 of Korouby discloses wherein the controller is further configured to generate a final signature [signature of the signatures] based on at least two of the stored respective signatures [S of S’s]. Regarding claim 13, Fig. 4 of Korouby discloses wherein the controller is further configured to store the final signature in a register from which a host device can read the final signature [stores in the section signature]. Regarding claim 14, Fig. 1 of Korouby discloses wherein the final signature is stored in the register in response to receiving a command from the host device [HOST INTERFACE] to generate the final signature. Regarding claim 16, Fig. 1 of Korouby discloses wherein the controller is further configured to set the register to a value indicating that a requested signature has not yet been generated [as discloses in paragraph 0001, in order to determine if data has been tempered, a signature is generated. Therefore, indications of signature that has not been generated is inherent]. Regarding claim 17, Fig. 10 of Korouby discloses wherein a host device reads at least one of the generated respective signatures in response to determining that the register has been updated [step 1030]. Regarding claim 19, Fig. 3 of Korouby discloses wherein the regions are banks of a dynamic random access memory [each Section 1 to Section n can be considered bank]. Regarding claim 20, Fig. 9 of Korouby discloses receiving, from a host device, data indicating a region of the memory for which at least one signature is to be generated [step 940 and 950]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-6 and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Karouby (US Pub. 2015/0169901) in view of Minamimoto et al. (US Pub. 2015/0256344). Regarding claim 1, Fig. 1 and Fig. 3 of Karouby discloses a system comprising: a memory [RAM 115, Fig. 1] configured to store data for a host device [as discloses in paragraph 0045, multiple storage regions show in Fig. 3 can be storage RAM 115], the memory comprising a plurality of regions [Section 1 data to Section 2 data]; a plurality of signature generators [since there are multiple signatures, one for each section, multiple signature generators are inherent], each signature generator [signature] associated with a respective region [Section 1 data to Section n data, Fig. 3] of the DRAM; and a controller [110, Fig. 1] configured to: receive, from the host device, a command [as disclose in paragraphs 0024 and 0042, the host is in communication with the controller]; in response to receiving the command, read data from a first region of the memory [step 930 in Fig. 9]; generate, using a first signature generator and based on the data read from the first region, a first signature [step 940 in Fig. 9]; and store the first signature [step 950 in Fig. 9]. Karouby discloses RAM, but does not specifically disclose DRAM. However, Fig. 2 of Minamimoto disclose a memory DRAM device that generates signature according to host command. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the teachings of Minamimoto’s DRAM to the teachings of Karouby’s memory having RAM with signature generators such that Karouby’s memory device operate at faster speed according to Minamimoto’s teachings for the purpose of fast data operation. Regarding claim 2, Fig. 1 and Fig. 3 of Karouby discloses wherein the controller [110, Fig. 1] is further configured to select the first region [one of region (Section 1 to Section n, Fig. 3] based on information provided with the command. Regarding claim 3, Fig. 1 of Karouby discloses wherein the information provided with the command is address information [since each memory location is selected by address. It is inherent that the command is address information]. Regarding claim 4, Fig. 3 of Karouby discloses wherein the plurality of regions is a plurality of banks [each Section 1 to Section n can be considered a bank]. Regarding claim 5, Fig. 1 of Karouby discloses wherein the controller [110] is further configured to: receive, from the host device [HOST INTERFACE], data indicating a region of the memory [one of region Section 1 to Section n] for which the first signature is to be generated [one of signature of Section 1 to Section n]; wherein the data is read from the first region based on the data indicating the region. Regarding claim 6, Fig. 3 of Karouby discloses wherein the data indicating the region includes rows of memory to use in generating the first signature [since signature is generated bases on data in the memory, it is inherent to include rows and columns of memory]. Regarding claim 8, Fig. 3 of Karouby discloses wherein the command requests the generation of the first signature [signature for one of Section 1 to Section n]. Regarding claim 9, as discloses in paragraph 0001, signatures are generated to determine of data has been tempered. Therefore, it is inherent that some region has generated signature and some region has not if data has been tampered. Therefore, it is inherent that the controller updating the register comprises updating from a first value to a second value; the first value indicates that the first signature has not been generated; and the second value indicates that the first signature has been generated. Regarding claim 10, Fig. 1 of Karouby discloses wherein the controller [110] is further configured to receive, from the host device [HOST INTERFACE] and prior to completion of generating the first signature, a second command to generate a second signature for a second region of the memory [since hosts send commands to multiple regions to generate signatures, it is inherent that a second command to generate a second signature for a second region is prior to the completion of the first signature generation]. Claims 15 is rejected under 35 U.S.C. 103 as being unpatentable over Karouby (US Pub. 2015/0169901) in view of Edwards et al. (US Pat. 7,225,373). Regarding claim 7, Karouby in view of Minamimoto discloses all claimed invention, but does not specifically disclose one or more respective sense amplifiers associated with each respective region, wherein outputs from the respective sense amplifiers are used as inputs to the respective signature generator to generate the respective signature. However, Fig. 1A of Edwards discloses one or more respective sense amplifiers [103] associated with each respective region [111], wherein outputs from the respective sense amplifiers [103] are used as inputs to the respective signature generator [104] to generate the respective signature. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the teachings of Edward’s memory device having sense amplifier to the teachings of Karouby’s memory having RAM with signature generators such that Karouby’s memory device can read data according to Edward’s teachings for the purpose of determining data states of the signatures. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHAN T TRAN whose telephone number is (571)272-8709. The examiner can normally be reached MON-FRI, 9AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached at 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANTHAN TRAN/Primary Examiner, Art Unit 2825
Read full office action

Prosecution Timeline

Aug 27, 2024
Application Filed
May 28, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
85%
With Interview (+2.5%)
2y 3m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 773 resolved cases by this examiner. Grant probability derived from career allowance rate.

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