DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
The following is an examiner’s statement of reasons for allowance: Regarding claim 1, the prior art of record, Abedini (US 2021/0176793) teaches an apparatus comprising at least one processor 240/280 (Fig. 2); and at least one memory 242/282 (Fig.2 ) storing instructions that, when executed by the at least one processor, cause the apparatus at least to perform receiving, from a network entity, a configuration with one or more power levels for the apparatus to transmit an signal (Fig. 6 and Section 0090, receiving from a network entity transmit power configurations etc.); and, transmitting the signal with the one or more power levels (Fig. 6 and Section 0090, after receiving the power configuration adjusting to the selected power level).
Nikitin (US 2018/0109331) teaches transmitting the activation signal to the at least one tag with the one or more power levels (Sections 0005-0006, 0031, 0034, 0036-0038, and 0043-0047, activating a tag at a selected power level etc.).
Mitchell (US 2014/0210598) teaches an apparatus comprising at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to perform configuring a first device with one or more power levels for transmitting an signal to at least one tag (Fig. 4 and Sections 0004-0006); sending, to a second device, the one or more power levels and a tag identifier for each of the at least one tag (Fig. 4 and Sections 0004-0006); receiving, from the second device, an indication of which tag identifier provides a response to the second device at each power level of the one or more power levels of the activation signal from the first device (Fig. 4 and Sections 0004-0006).
The prior art of record fails to teach an apparatus comprising at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to perform configuring a first device with one or more power levels for transmitting an activation signal to at least one tag; sending, to a second device, the one or more power levels and a tag identifier for each of the at least one tag; receiving, from the second device, an indication of which tag identifier provides a response to the second device at each power level of the one or more power levels of the activation signal from the first device; and, creating a map comprising an indication of which tag identifier provides a response to the second device at each power level of the one or more power levels of the activation signal from the first device.
The prior art of record fails to teach the claimed subject matter as claimed and substantially connected in claims 1-10.
Regarding claim 21, the prior art of record, Abedini (US 2021/0176793) teaches an apparatus comprising at least one processor 240/280 (Fig. 2); and at least one memory 242/282 (Fig.2 ) storing instructions that, when executed by the at least one processor, cause the apparatus at least to perform receiving, from a network entity, a configuration with one or more power levels for the apparatus to transmit an signal (Fig. 6 and Section 0090, receiving from a network entity transmit power configurations etc.); and, transmitting the signal with the one or more power levels (Fig. 6 and Section 0090, after receiving the power configuration adjusting to the selected power level).
Nikitin (US 2018/0109331) teaches transmitting the activation signal to the at least one tag with the one or more power levels (Sections 0005-0006, 0031, 0034, 0036-0038, and 0043-0047, activating a tag at a selected power level etc.).
Mitchell (US 2014/0210598) teaches an apparatus comprising at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to perform receiving, one or more power levels and a tag identifier for each of at least one tag (Fig. 4 and Sections 0004-0006); receiving, when a first device transmits an signal at each of the one more power levels, a response including a tag identifier from each of one or more tags of the at least one tag (Fig. 4 and Sections 0004-0006).
The prior art of record fails to teach an apparatus comprising at least one processor: and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to perform receiving, from a network entity, one or more power levels and a tag identifier for each of at least one tag; receiving, when a first device transmits an activation signal at each of the one more power levels, a response including a tag identifier from each of one or more tags of the at least one tag; and, sending, to the network entity, an indication of which tag identifier
provides a response to the apparatus at each power level of the one or more power levels of the activation signal from the first device.
The prior art of record fails to teach the claimed subject matter as claimed and substantially connected in claims 21-22.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claims 14 and 16-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 13, 15, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Abedini et al. (US Pat Pub# 2021/0176793) in view of Nikitin et al. (US Pat Pub# 2018/0109331).
Regarding claim 13, Abedini teaches an apparatus comprising at least one processor 240/280 (Fig. 2); and at least one memory 242/282 (Fig.2 ) storing instructions that, when executed by the at least one processor, cause the apparatus at least to perform receiving, from a network entity, a configuration with one or more power levels for the apparatus to transmit an signal (Fig. 6 and Section 0090, receiving from a network entity transmit power configurations etc.); and, transmitting the signal with the one or more power levels (Fig. 6 and Section 0090, after receiving the power configuration adjusting to the selected power level). Abedini fails to teach an activation signal.
Nikitin teaches transmitting the activation signal to the at least one tag with the one or more power levels (Sections 0005-0006, 0031, 0034, 0036-0038, and 0043-0047, activating a tag at a selected power level etc.).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate an activation signal as taught by Nikitin into Abedini’s apparatus in order to improve efficiency and power consumption.
Regarding claim 15, Abedini teaches receiving a first configuration from the network entity for the apparatus using a first power level of the signal (Fig. 6 and Section 0090, receiving from a network entity transmit power configurations etc.); and, transmitting the signal using the first configuration (Fig. 6 and Section 0090, after receiving the power configuration adjusting to the selected power level). Abedini fails to teach an activation signal.
Nikitin teaches transmitting the activation signal to the one or more tags using the first configuration (Sections 0005-0006, 0031, 0034, 0036-0038, and 0043-0047, activating a tag at a selected power level etc.).
Regarding claim 18, the combination including Abedini teaches transmitting an activation signal at a maximum power of the apparatus to enable or disable a capability of the at least one signal Fig. 6 and Section 0090, after receiving the power configuration adjusting to the selected power level).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW WENDELL whose telephone number is (571)272-0557. The examiner can normally be reached Monday-Friday 8:30AM-5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wesley Kim can be reached at 571-272-7867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANDREW WENDELL/Primary Examiner, Art Unit 2648 7/10/2026
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