Prosecution Insights
Last updated: April 19, 2026
Application No. 18/819,125

EXECUTION METHOD FOR INSTRUCTION CONFLICT, INSTRUCTION PROCESSING MODULE AND PROCESSOR

Final Rejection §101§102§103§112
Filed
Aug 29, 2024
Examiner
HUISMAN, DAVID J
Art Unit
2183
Tech Center
2100 — Computer Architecture & Software
Assignee
Glenfly Tech Co. Ltd. (Shanghai)
OA Round
2 (Final)
58%
Grant Probability
Moderate
3-4
OA Rounds
4y 8m
To Grant
92%
With Interview

Examiner Intelligence

Grants 58% of resolved cases
58%
Career Allow Rate
389 granted / 670 resolved
+3.1% vs TC avg
Strong +34% interview lift
Without
With
+33.8%
Interview Lift
resolved cases with interview
Typical timeline
4y 8m
Avg Prosecution
88 currently pending
Career history
758
Total Applications
across all art units

Statute-Specific Performance

§101
6.1%
-33.9% vs TC avg
§103
33.6%
-6.4% vs TC avg
§102
21.5%
-18.5% vs TC avg
§112
31.7%
-8.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 670 resolved cases

Office Action

§101 §102 §103 §112
DETAILED ACTION Claims 1-20 have been examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The amended title of the invention is not sufficiently descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The specification (original and amended) has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. The amendment filed on October 28, 2025, is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows: In paragraph 24, applicant now states “Certain types of instructions, such as sampling instruction, load/store instructions, or other instructions with long and uncertain execution times…” where applicant previously stated “Since the various types of instructions, such as sample instruction, load/store instructions related to memory, instructions with longer and uncertain execution times…”. The addition of “or other” could be interpreted as applicant implying that the sampling instructions and load/store instructions are instructions with long and uncertain execution times, whereas, originally, such was not necessarily the case (sampling and load/store instructions did not necessarily have longer and uncertain execution times, and there were long and uncertain instructions in addition to the sampling/load/store instructions). Applicant is required to cancel the new matter in the reply to this Office Action. Drawings Replacement FIG.4 is objected to for the following minor informalities: Step 200 is grammatically incorrect and must be reworded. Replacement FIG.7 is objected to for failing to comply with 37 CFR 1.84(a)(1) and 37 CFR 1.84(l), which requires the drawings be in black, and that all drawings be made by a process which will give them satisfactory reproduction characteristics. Every line, number, and letter must be durable, clean, solid black (except for color drawings), sufficiently dense and dark, and uniformly thick and well-defined. The weight of all lines and letters must be heavy enough to permit adequate reproduction. This requirement applies to all lines however fine, to shading, and to lines representing cut surfaces in sectional views. The text comprising “.flag”, “R4.xyzw” (both instances), and “Ins 6: CHECK” is pixelated because applicant did not use black (RGB = 000). The has been confirmed by the examiner through inspection of applicant’s pdf file. In such a case, the dithering used to convert applicant's grayscale image to black and white will add white pixels to try to estimate applicant's "gray" color, and the final drawings may not print properly or may print with reduced quality. Therefore, applicant must be sure to use only black and white. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections Claims 7 and 16 are objected to because of the following informalities: Please move “are the second value” from the last line to before the comma in the 3rd to last line. Appropriate correction is required. Claim Interpretation At least one claim is identified as including non-limiting contingent limitations. “The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met.” “The broadest reasonable interpretation of a system (or apparatus or product) claim having structure that performs a function, which only needs to occur if a condition precedent is met, requires structure for performing the function should the condition occur. The system claim interpretation differs from a method claim interpretation because the claimed structure must be present in the system regardless of whether the condition is met and the function is actually performed.” See MPEP 2111.04(II). Regarding claim 1: If the first instruction does not meet one or more instruction issuance conditions, then only lines 1-5 are required by the method. Note that one of ordinary skill in the art would understand that the executing of the last line would not occur if at least one issuance condition is not met (since an instruction must be issued in order to execute) This is the broadest reasonable interpretation of the claim. Other broad reasonable interpretations include: If the first instruction meets one or more issuance conditions, but is not determined to be a first type or a second type (e.g. it may be a third type), then only lines 1-8 and the last line are required by the method. If the first instruction meets one or more issuance conditions, and is determined to be the first type, then only lines 1-10 and the last line are required by the method. If the first instruction meets one or more issuance conditions, and is determined to be the second type, then only lines 1-8 and 11-13 are required by the method. It is recommended that applicant reword to positively recite method steps to ensure their inclusion in the performed method. For instance, in claim 1, the examiner recommends replacing “whether” in line 4 with --that-- to at least require the 2nd determining step. The examiner has no recommendation at this time for how to require both issuing steps since they are true alternatives. Regarding claim 2: If the first instruction does meet one or more instruction issuance conditions, then claim 2 sets forth no further limitation on claim 1, and, thus, it encompasses a same method set forth by claim 1. This is the broadest reasonable interpretation of the claim. Given the proposed amendment to claim 1, the examiner would further recommend changing claim 2 to “…further comprising, prior to determining that the first instruction meets the one or more instruction issuance conditions, determining that the first instruction does not meet the one or more issuance conditions; and based on the first instruction not meeting the one or more issuance conditions:…”. Regarding claim 3: If the first instruction does meet one or more instruction issuance conditions, then claim 3 sets forth no further limitation on claim 1 and, thus, it encompasses a same method set forth by claim 1. This is the broadest reasonable interpretation of the claim. Regarding claim 4: If the first instruction does not meet the one or more issuance conditions, then claim 4 sets forth no further limitation on claim 2 and, thus, it encompasses a same method set forth by claim 2. If the first instruction does meet the one or more issuance conditions, but the instruction is not the first type, then claim 4 sets forth no further limitation on claim 1, and, thus, it encompasses a same method set forth by claim 1. These are the broad reasonable interpretations of the claim. Regarding claim 5: When the operation of the first instruction is not executed, i.e., when the first instruction does not meet the one or more issuance conditions, then claim 5 sets forth no further limitation on claim 1, and, thus, it encompasses a same method set forth by claim 1. This is the broadest reasonable interpretation of the claim. Regarding claim 7: Again, if the type determination never occurs in claim 1, then claim 7 does not further limit claim 6. Further, even if the type determination occurs in claim 1, if the plurality of first destination dependency flags are the first value, then claim 7 again does not further limit claim 6. These are the broadest reasonable interpretations of the claim. Regarding claim 8: If the one or more of the plurality of first destination dependency flags are the second value, then claim 8 sets forth no further limitation on a method covered by claim 6. This is the broadest reasonable interpretation of the claim. Regarding claim 9: If the executing doesn’t occur in claim 1, then claim 9 sets forth no further limitation on a method covered by claim 2. This is the broadest reasonable interpretation of the claim. Regarding claim 10: If the executing doesn’t occur in claims 1 and 9, then claim 10 sets forth no further limitation on a method covered by claim 2 since both clearing steps are performing by the executing. This is the broadest reasonable interpretation of the claim. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Referring to claims 1, 11, and 20, applicant now claims that an SFU instruction and SMP instruction have a type that is based on whether the instruction has a variable execution time. The examiner cannot find support for these instructions having a variable execution time. Applicant refers to “long or variable instruction execution times” (paragraph 5), and there is nothing that ties SFU and SMP to variable (they could have originally fallen under “long” instead). For instance, a given SFU instruction may take a long number of cycles (e.g. 100), but if it always completes in 100 cycles, its execution time is not variable. Paragraphs 24, 29, and 49 also don’t say that SMP and SFU have variable execution time. Thus, this appears to be new matter. The examiner asserts that LS instructions having uncertain execution time is reasonably supported by the specification since memory hierarchy is ubiquitous and memory operations could take varying amounts of time depending on which portion of the memory hierarchy needs to be accessed. All dependent claims are rejected due to their dependence on a claim lacking adequate written description. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claims recite the following limitation for which there is a lack of antecedent basis: In claims 1, 11, and 20, “the first type”. No first type was previously set forth. Please change to --a first type--. In claims 4 and 13, “the first type”. The proposed change to claims 1 and 11 above will correct this issue as well. The term “special function unit” in claims 1, 11, and 20 is a relative term which renders the claim indefinite. The term “special” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Specifically, the examiner is not clear what distinguishes a special function unit from a non-special functional unit. In other words, what makes an instruction/functional unit special? For purposes of prior art examination, this will be interpreted as any functional unit other than an ALU. The examiner recommends deletion of the SFU option. All dependent claims are rejected due to their dependence on an indefinite claim. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-9, 11-13, 18, and 20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Regarding step 1 of the Subject Matter Eligibility Test, claims 1-10 are directed to a process, claims 12-19 are directed to a machine (processor), and claim 20 is directed to an article of manufacture. Regarding step 2A (prong 1) of the Subject Matter Eligibility Test, claim 1, under its broadest reasonable interpretation (see above analysis regarding contingent limitations), recites determining whether a first instruction of a first wave meets one or more instruction issuance conditions. This step falls into the grouping of mental processes (MPEP 2106.04(a)(2)(III)) and includes one or more of an observation, evaluation, and judgment. For instance, a human could analyze written code and determine that a given instruction does not satisfy an issuance condition when it is a dependent instruction that must wait for a previous instruction to generate a result (because the dependent instruction requires the result). This determining step can be performed in the human mind with or without the aid of pen and paper as part of a mental exercise commonly performed by computer architecture university students, as evidenced by Hennessy’s textbook “Computer Architecture - A Quantitative Approach” (attached herewith). Pages 241-261 show the mental process of simulating (on paper) the scheduling of instructions using a scoreboard/reservation station. This involves determining when instructions meet issuance conditions (e.g. determining dependent instructions and/or when they become “ready” based on dependency requirements). Thus, claim 1 recites an abstract idea. Regarding step 2A (prong 2) of the Subject Matter Eligibility Test, claim 1, under its broadest reasonable interpretation, recites the following additional elements: (a) obtaining a plurality of instructions to be executed in a plurality of waves; This additional element does not integrate the abstract idea into a practical application (hereafter “does/do not integrate”) because it is an insignificant pre-solution activity that is incidental to the claimed mental determination, and only a nominal/tangential addition to the claim (see MPEP 2106.04(d)(I)), 7th bullet). Regarding step 2B of the Subject Matter Eligibility Test, the additional element, does not amount to significantly more than the abstract idea because obtaining instructions has been deemed by the courts to be well-understood, routine, and conventional and not significantly more (see MPEP 2106.05(I)(A) and 2106.05(d), including section II, item (i) (“receiving data over a network”) and (iv) (“retrieving …information in memory”)). Therefore, claim 1 is subject matter-ineligible. In an alternate rejection where additional limitations of claim 1 are considered, the same analysis above also applies. Further, claim 1 recites determining, based on the first instruction meeting the one or more instruction issuance conditions, a type of the of the first instruction, wherein the type is determined based on whether the first instruction has a variable execution time. This step also falls into the grouping of mental processes (MPEP 2106.04(a)(2)(III)) and includes one or more of an observation, evaluation, and judgment. For instance, once an instruction is determined to meet the issuance condition(s) (e.g. maybe it is an independent instruction), a human can trivially look at the opcode of the instruction to determine the type of instruction based on whether the first instruction has a variable execution time. For instance, a load (LD) instruction is understood to have variable execution time in a system that has a memory hierarchy (one or more levels of cache, main memory, disk, etc.) because the load will take less time if the desired data is in cache versus if the desired data is not in cache. Thus, when a human sees a LD, it may be evaluated/observed/judged as a first type that has variable execution time. This determining step can be performed in the human mind simply by detecting “LD” (or some other opcode that corresponds to variable execution time). Thus, claim 1 still recites an abstract idea. Regarding step 2A (prong 2) of the Subject Matter Eligibility Test, claim 1, in addition to the “obtaining” analyzed above, recites the following additional elements: issuing, based on the type being the first type, the first instruction to one of a special function unit (SFU), a sample unit (SMP), or a load/store unit (LS); issuing, based on the type being a second type, the first instruction to an arithmetic logic unit (ALU); and executing an operation of the first instruction. These additional elements do not integrate because they amount to insignificant post-solution activities that are incidental to the claimed mental determinations and are no more than a nominal/tangential addition to the claim (see MPEP 2106.04(d)(I)), 7th bullet). Regarding step 2B of the Subject Matter Eligibility Test, additional elements (b), (c), and (d), considered alone and in combination with each other and additional element (a), do not amount to significantly more than the abstract idea because Official Notice is taken that the issuing and executing steps are well-understood, routine, and conventional steps in processors. That is, processors are known to issue instructions to corresponding execution units (e.g. a processor will issue a LD-type instruction to a load/store unit for execution). Likewise, processors are known to issue an ALU-type instruction to an ALU for execution. Finally, the whole purpose of a processor is to execute operations corresponding to instructions. Thus, applicant’s additional elements do not amount to significantly more (MPEP 2106.05(I)(A), 2nd item iii, and 2106.05(d)) and, claim 1 is subject matter-ineligible. Referring to claim 2, due to contingent limitations (see above), it is not subject-matter eligible for similar reasoning set forth in the abbreviated rejection of claim 1 above (since it adds no further limitation). However, even if the steps of claim 2 occur, the determining is a mental step (as similarly explained above), and the monitoring is insignificant post-solution activity that is well-understood, routine, and conventional (supported by Hennessy, which includes a scoreboard/reservation station to monitor in real time when instructions become ready, i.e., meet their conditions). Thus, there is no integration, nor is there significantly more. Referring to claim 3, due to contingent limitations (see above), it is not subject-matter eligible for similar reasoning set forth in the abbreviated rejection of claim 1 above (since it adds no further limitation). However, even where the simultaneous performance of claim 3 is required, this amounts to extra-solution activity that is well known in the art (a scoreboard/reservation station is known to track multiple instructions concurrently). Thus, there is no integration, nor significantly more, and claim 3 is subject matter-ineligible. Referring to claim 4, due to contingent limitations (see above), it is not subject-matter eligible for similar reasoning set forth in the rejections of claim 1. However, even if the setting steps were required to occur, they amount to a mental process. The setting amounts to bookkeeping by setting indicators in a table for (see FIGs.2-3). A human could mentally draw a table on paper as part of a mental simulation as shown in applicant’s FIGs.2-3, and make appropriate markings corresponding to which registers are being used by each instruction. Therefore, claim 4 is subject matter-ineligible. Referring to claim 5, due to contingent limitations (see above), it is not subject-matter eligible for similar reasoning as claim 1. Referring to claim 6, the steps are part of a mental process and correspond to looking into a table and determining if indicators for a given instruction are all “0” (second value), e.g. see applicant’s FIG.5, steps 201-202. In other words, in simulating code scheduling, a human can use paper to create a table with various indicator values based on dependency information that is evident just from looking at the instructions, and then evaluating the table for zero values for a given instruction so as to determine whether it satisfied an emission condition. Therefore, claim 6 is subject matter-ineligible. Claim 7, whether not further limiting (due to contingent limitations) or limiting, is ineligible for similar reasoning as claim 6. Claim 8, due to contingent limitations (see above), it is not subject-matter eligible for similar reasoning as claim 6. However, even where claim 8 is limiting, it is ineligible for similar reasoning as claims 6 and 2. Referring to claim 9, due to contingent limitations (see above), it is not subject-matter eligible for similar reasoning as claim 1. However, even if the steps of claim 9 occur, the steps, per Official Notice, amount to well-understood, routine, and conventional insignificant post-solution activity that does not integrate or amount to significantly more, per the MPEP citations above. Claim 11 is mostly ineligible for similar reasoning as claim 1 (in the alternate rejection). The additional elements of instructions to cause the processor to implement the steps amount to use of mere instructions to implement the abstract idea on a computer. This does not integrate or amount to significantly more based on MPEP 2106.04(d)(I), 6th bullet, and 2106.05(I)(A), 2nd item (i). Claims 12-13 and 18 are mostly ineligible for similar reasoning as claims 2, 4, and 9, respectively. The additional elements of instructions to cause the processor to implement the steps amount to use of mere instructions to implement the abstract idea on a computer. This does not integrate or amount to significantly more based on MPEP citations above. Claim 20 is mostly ineligible for similar reasoning as claim 1 (in the alternate rejection). The additional element of a medium storing instructions to cause the processor to perform the claimed steps amounts to use of mere instructions to implement the abstract idea on a generic computer with generic components. This does not integrate or amount to significantly more based on MPEP citations above. Claim Rejections - 35 USC § 102/103 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as anticipated by Babayan et al. (US 2013/0007415) or, in the alternative, under 35 U.S.C. 103 as obvious over Babayan in view of Srinivasan et al. (US 2006/0095715). Referring to claim 1, Babayan has taught an execution method for handling instruction conflict, comprising: obtaining a plurality of instructions to be executed in a plurality of waves (see FIG.2A. Various instructions in strands/waves are obtained for execution); determining whether a first instruction of a first wave meets one or more instruction issuance conditions (see paragraphs 55-62. In general, the system determines when instruction dependencies are satisfied. Dependencies must be satisfied before instructions can issue. At some point, prior to operands becoming ready, an instruction is determined to not meet an issuance condition); The examiner notes that all remaining limitations are contingent limitations (see above) and, thus, need not be taught by Babayan to anticipate the claim. Thus, the above constitutes a 102 rejection. However, Babayan has further taught: determining, based on the first instruction meeting the one or more instruction issuance conditions, a type of the first instruction (when an instruction is ready to be issued, it must be sent to the appropriate execution unit 265 based on the instruction type); and executing an operation of the first instruction (an instruction would then be executed, e.g. by one of execution units 265 in FIG.2B). Babayan has not taught wherein the type is determined based on whether the first instruction has a variable execution time. However, Srinivasan has taught including a special variable-latency execution unit in addition to an ALU to carry out special operations, including encoding, decoding, compression, DCT, and IDCT (see paragraphs [0020]-[0021]). One of ordinary skill in the art would have recognized that such a unit would be a specialized unit to more efficiently carry out these specialized operations as opposed to having more basic logic (e.g. ALU) handle these calculations. In addition, special instructions could be designed to trigger one of these specialized operations as opposed to having a combination of regular instructions carry out the specialized operation in a less efficient manner, e.g. with more instructions/software. As a result, to include specialized hardware to carry out specialized operations with minimal software, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Babayan to include a special function unit (SFU) that executes variable-latency instructions. Babayan, as modified, has further taught: issuing, based on the type being the first type, the first instruction to one of a special function unit (SFU), a sample unit (SMP), or a load/store unit (LS) (when a type of instruction is determined to require variable execution time, it will be issued to the variable-latency execution unit (i.e., SFU)); and issuing, based on the type being the second type, the first instruction to an arithmetic logic unit (ALU) (from FIG.2A, instructions such as add and sub are ALU type instructions that would be sent to an ALU for execution, where an ALU is present in all modern processors. In the prior art combination, only instructions destined for the variable execution time execution unit (SFU) are variable execution time instructions; others are non-variable types (including ALU instructions)); and Referring to claim 2, Babayan, alone or as modified, has taught the execution method according to claim 1. When the first instruction does meet the one or more issuance conditions, claim 2 sets forth no further limitations and, thus, is rejected under 35 U.S.C. 103 for reasoning set forth in the full rejection of claim 1 above. Further, as part of a 102 rejection, Babayan has taught, based on the first instruction not meeting the one or more instruction issuance conditions (from FIG.2A, the add instruction 222 will not meet issuance conditions until source r3 is generated by a previous instruction): determining whether a second instruction of a second wave meets the one or more instruction issuance conditions (as long as r3 is not ready, then not only does the add not meet issuance conditions, but any instruction dependent on the add, e.g. instruction 250, also does not meet issuance conditions); and monitoring the first instruction in real-time until the first instruction meets the one or more instruction issuance conditions (this is how a scoreboard works, e.g. paragraphs 60-62 set forth real-time comparing of register IDs among destination and source registers so as to determine when instructions meet their conditions and become ready). Referring to claim 3, Babayan, alone or as modified, has taught the execution method according to claim 2. When the first instruction does meet the one or more issuance conditions, claim 3 sets forth no further limitations and, thus, is rejected under 35 U.S.C. 103 for reasoning set forth in the full rejection of claim 1 above. Further, as part of a 102 rejection, Babayan has taught (when the one or more conditions are not met) wherein the determining whether the second instruction of the second wave meets the one or more instruction issuance conditions and the monitoring the first instruction are performed simultaneously (again, this is how a scoreboard works. Different instructions become ready at the same time or at different times depending on outcomes of previous instructions. From FIG.2B and paragraph 37, Babayan is a parallel machine that executes out of order and, thus, many instructions would be monitored at once to determine which instructions are ready to execute). Claim Rejections - 35 USC § 103 Claims 11-12 and 20 are rejected under 35 U.S.C. 103 as being obvious over Babayan in view of Srinivasan. Claim 11 is rejected for similar reasoning set forth in the 103 rejection of claim 1. Note that software being executed causes a processor to perform all functionality. Thus, when a program is to be executed by a processor, that program comprises various instructions that cause the processor to perform the claimed actions. Additionally, see paragraph 83. Claim 12 is rejected for similar reasoning set forth in the 102 rejection of claim 2. Claim 20 is rejected for similar reasoning set forth in the 103 rejection of claim 11 (note a medium in paragraph 83). Allowable Subject Matter Claims 4-10 and 13-19 are objected to as being dependent upon a rejected base claim, but would be allowable over the prior art if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Please note that any allowable limitations cannot be contingent limitations. Thus, if applicant decides to accept any of this allowable subject matter in claims 4-10, please remove any contingency associated therewith. Response to Arguments On page 29 of applicant’s response, applicant argues that claim 1 includes limitations that are not practically performed by the human mind (i.e., the obtaining, issuing, and executing steps). The examiner agrees. This is the reason why these steps are not grouped into the mental process. Instead, they are deemed extra-solution activity that does not integrate the abstract idea into a practical application or amount to significantly more. On pages 29-30, applicant argues that the claimed additional elements integrate the abstract idea into a practical application and/or amount to significantly more. Applicant points to paragraphs 5-6 of the specification as disclosing an improvement. The examiner respectfully disagrees. At a high-level, it appears any improvement would relate to setting and clearing of dependency flags to reduce compiler work for instructions with longer/uncertain/variable latency. However, the claim doesn’t reflect the disclosed improvement as required by 2106.05(a). Instead, applicant’s additional elements are broadly claimed such that they amount to well-known processor actions (issuing based on type of instruction, and executing). Thus, the additional elements do not amount to significantly more. On pages 31-32 of applicant’s response, applicant argues that Babayan has not taught determining the type based on whether the instruction has a variable execution time. The examiner agrees. However, this is deemed obvious (as seen in the rejections above). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to David J. Huisman whose telephone number is 571-272-4168. The examiner can normally be reached on Monday-Friday, 9:00 am-5:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta, can be reached at 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /David J. Huisman/Primary Examiner, Art Unit 2183
Read full office action

Prosecution Timeline

Aug 29, 2024
Application Filed
Jul 29, 2025
Examiner Interview (Telephonic)
Aug 04, 2025
Non-Final Rejection — §101, §102, §103
Oct 28, 2025
Response Filed
Jan 22, 2026
Final Rejection — §101, §102, §103 (current)

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Patent 12602229
NEURAL NETWORK ACCELERATOR FOR OPERATING A CONSUMER PIPELINE STAGE USING A START FLAG SET BY A PRODUCER PIPELINE STAGE
2y 5m to grant Granted Apr 14, 2026
Patent 12530199
SYSTEMS AND METHODS FOR LOAD-DEPENDENT-BRANCH PRE-RESOLUTION
2y 5m to grant Granted Jan 20, 2026
Patent 12499078
IMAGE PROCESSOR AND METHODS FOR PROCESSING AN IMAGE
2y 5m to grant Granted Dec 16, 2025
Patent 12468540
TECHNOLOGIES FOR PREDICTION-BASED REGISTER RENAMING
2y 5m to grant Granted Nov 11, 2025
Patent 12399722
MEMORY DEVICE AND METHOD INCLUDING PROCESSOR-IN-MEMORY WITH CIRCULAR INSTRUCTION MEMORY QUEUE
2y 5m to grant Granted Aug 26, 2025
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
58%
Grant Probability
92%
With Interview (+33.8%)
4y 8m
Median Time to Grant
Moderate
PTA Risk
Based on 670 resolved cases by this examiner. Grant probability derived from career allow rate.

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