DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required: a description of a “contact region” as recited in claim 5.
The currently filed specification does not describe any “contact region.”
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “contact region” of claim 5 must be shown or the feature(s) canceled from the claim. No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 5 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. Claim 5 describes a “contact region” in lines 2-3. The currently filed specification and drawings do not describe or show where the “contact region” is located within the structure. Therefore claim 5 is not fully enabled.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5 and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites the limitation "contact region" in lines 2-3. There is insufficient antecedent basis for this limitation in the claim.
In view of the above objections made to the specification and the drawings, as well as the above rejection of claim 5 under 35 U.S.C. 112 first and second paragraphs, the term, “contact region” has not been given any patentable weight.
Claim 13 recites the limitation "each SiGe semiconductor channel material nanosheet” in lines 8-8. There is insufficient antecedent basis for this limitation in the claim.
The examiner believes that the incorrect above limitation in lines 8-12 is due to the initial incorrect definition of the “nanosheets” in line 2 of claim 13. The examiner believes that the limitation, “one or more stacked and suspended silicon germanium (SiGe) nanosheets,” in line 2 of claim 13 should read one or more stacked and suspended silicon germanium (SiGe) semiconductor channel material nanosheets. The examiner has thus interpreted claim 13 in this manner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5-8, and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (United States Patent Application Publication No. US 2020/0357931 A1, hereinafter “Lee”).
In reference to claim 1, Lee discloses a structure which meets the claim. Fig. 11 of Lee discloses a semiconductor structure which comprises one or more stacked and suspended silicon germanium (SiGe) semiconductor channel material nanosheets (112A, 112B, 114A, 114B, 116A, 116B) located above a semiconductor substrate (102). A functional gate structure (1102, 1104) surrounds a portion of each SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) of the one or more stacked and suspended SiGe semiconductor channel material nanosheets (112A, 112B, 114A, 114B, 116A, 116B). A source/drain region (502, 504) is on each side of the functional gate structure (1102, 1104) which physically contacts sidewalls of each SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) of the one or more stacked and suspended SiGe semiconductor channel material nanosheets (112A, 112B, 114A, 114B, 116A, 116B).
With regard to claim 2, each SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) comprises a portion formed with doped SiGe (112B, 114B, 116B) that is between inner gate spacers (402).
In reference to claim 3, each SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) has a uniform germanium (Ge) profile (112A, 114A, 116A).
So far as understood in claim 5, there is an interlayer dielectric layer (510) located above each source/drain region (502, 504).
With regard to claim 6, inner gate spacers (402) contact sidewalls of the functional gate structure (1102, 1104) and are located on outer portions of each SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) of the one or more stacked suspended SiGe semiconductor channel material nanosheets (112A, 112B, 114A, 114B, 116A, 116B).
In reference to claim 7, the sidewalls of each SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) of the one or more stacked suspended SiGe semiconductor channel material nanosheets (112A, 112B, 114A, 114B, 116A, 116B) are vertically aligned with one another.
With regard to claim 8, each functional gate structure (1102, 1104) comprises (i) a gate dielectric portion (1102) physically contacting the SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) and (ii) a gate conductor portion (1104) physically contacting the gate dielectric portion (1102).
In reference to claim 12, the semiconductor substrate (102) is formed of III-V or II-VI compound semiconductor materials (p. 4, paragraph 34) which are different semiconductor materials than the SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Glass et al. (United States Patent Application Publication No. US 2019/0348500 A1, hereinafter “Glass”).
In reference to claim 4, fig. 11 of Lee does not disclose that each SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) has a graded germanium profile. However Glass discloses using a graded germanium profile in a SiGe channel material in order to attain a desired charge carrier mobility for the channel (p. 2, paragraph 17). In view of Glass, it would therefore be obvious to implement each SiGe semiconductor channel material nanosheet (112A, 112B, 114A, 114B, 116A, 116B) of Lee with a graded germanium profile.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Zhang et al. (United States Patent Application Publication No. US 2021/0202749 A1, hereinafter “Zhang”).
In reference to claim 10, fig. 11 of Lee discloses an inner gate spacer (402) but does not disclose a layer of SiGe material on top of the semiconductor substrate (102) and beneath the functional gate structure (1102, 1104). However fig. 18 of Zhang discloses the formation of a SiGe layer (14) on top of the semiconductor substrate (10) and beneath the functional gate structure (32). Zhang discloses (p. 6, paragraph 67) that the SiGe layer (14) allows for more process variation or margin for error when forming the gate electrode (32) and the gate dielectric (30). In view of Zhang, it would therefore be obvious to implement a layer of SiGe material on top of the semiconductor substrate (102) and beneath the functional gate structure (1102, 1104) in the Lee device.
Allowable Subject Matter
Claims 14-20 are allowed.
Claims 9 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 13 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter: in the examiner’s opinion and interpretation of claim 13 (see above rejection of claim 13 under 35 U.S.C. 112(b) in section titled Claim Rejections - 35 USC § 112), it would not be obvious to implement a semiconductor structure which comprises one or more stacked and suspended silicon germanium (SiGe) semiconductor channel material nanosheets located above a semiconductor substrate such that each SiGe semiconductor channel material nanosheet comprises a first portion formed with doped SiGe between two inner gate spacers and a second portion formed with undoped SiGe in combination with a functional gate structure that surrounds the second portion of each SiGe semiconductor channel material nanosheet of the one or more stacked and suspended SiGe semiconductor channel material nanosheets such that a source/drain region on each side of the functional gate structure physically contacts sidewalls of each SiGe semiconductor channel material nanosheet of the one or more stacked and suspended SiGe semiconductor channel material nanosheets.
In the examiner’s opinion, it would also not be obvious to implement a method of forming a semiconductor structure which comprises providing a nanosheet stack of alternating nanosheets of a sacrificial semiconductor material nanosheet and a semiconductor channel material nanosheet on a surface of a semiconductor substrate such that a sacrificial gate structure and a dielectric spacer material layer straddle the nanosheet stack, recessing end portions of the sacrificial semiconductor material nanosheets to provide a gap between each of the semiconductor channel material nanosheets, forming a thin-doped silicon germanium (SiGe) layer on exposed surfaces of the semiconductor channel material nanosheet and the semiconductor substrate, forming an additional dielectric spacer material layer within each gap, epitaxially growing a semiconductor material to form a source/drain region on physically exposed sidewalls of the thin-doped SiGe layer, removing the sacrificial gate structure and each sacrificial semiconductor material nanosheet to suspend each semiconductor channel material nanosheet, trimming exposed portions of each semiconductor channel material nanosheet in combination with the steps of forming undoped SiGe on exposed portions of each semiconductor channel, performing a thermal process so that the undoped SiGe, the thin-doped SiGe, and each semiconductor channel becoming one or more SiGe semiconductor channel material nanosheets, and forming a functional gate structure that wraps around each suspended SiGe semiconductor channel material nanosheet as required by the applicant in claim 14.
In the examiner’s opinion, it would also not be obvious to implement a semiconductor structure which comprises one or more stacked and suspended silicon germanium (SiGe) semiconductor channel material nanosheets located above a semiconductor substrate, a functional gate structure surrounding a portion of each of the SiGe semiconductor channel material nanosheets, a source/drain region on each side of the functional gate structure which physically contacts sidewalls of each of the SiGe semiconductor channel material nanosheets in combination with a layer of SiGe material on top of the semiconductor substrate that is beneath each source/drain region and an inner gate spacer as specified by the applicant in claim 9.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN QUINTO whose telephone number is (571)272-1920. The examiner can normally be reached Monday-Friday, 9-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KEVIN QUINTO/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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