Prosecution Insights
Last updated: October 22, 2026
Application No. 18/820,920

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Non-Final OA §112
Filed
Aug 30, 2024
Priority
Sep 27, 2023 — JP 2023-166545 +1 more
Examiner
TAYLOR, EARL N
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fuji Electric Co., Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
781 granted / 886 resolved
+20.1% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
16 currently pending
Career history
904
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
36.3%
-3.7% vs TC avg
§102
31.6%
-8.4% vs TC avg
§112
25.8%
-14.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 886 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement This office acknowledges receipt of the following items from the applicant: Information Disclosure Statement (IDS) filed on 30 August 2024. The references cited on the PTOL 1449 form have been considered. Claim Objections Claims 1-10 are objected to because of the following informalities: Claim 1 recites “is greater than is” and should read -- is greater than Claim 1 also recites “is less than is” and should read -- is less than --. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “in a case where the first-conductivity-type region is in a low concentration condition in which a doping concentration of the first-conductivity-type region is 1.0×1015/cm3 or more but less than 1.0×1016/cm3, a total area or a total number of the plurality of silicide films provided in the chip center portion is greater than is a total area or a total number of the plurality of silicide films provided in the chip outer peripheral portion, and in a case where the first-conductivity-type region is in a high concentration condition in which the doping concentration of the first-conductivity-type region is in a range of 1.0×1016/cm3 to 9.0×1016/cm3, the total area or the total number of the plurality of silicide films provided in the chip center portion is less than is the total area or the total number of the plurality of silicide films provided in the chip outer peripheral portion.” There is no antecedent basis for “the plurality of silicide films provided in the chip center portion” and there is no antecedent basis for “the plurality of silicide films provided in the chip outer peripheral portion” in the claim. There is only antecedent basis for “a plurality of silicide films each in ohmic contact with a portion of a corresponding one of the plurality of second-conductivity-type regions” in the claim. There is no structural relationship between “a portion of a corresponding one of the plurality of second-conductivity-type regions” and “a chip center portion or “a chip outer peripheral portion” in the claim. Furthermore, the use of “in a case,” other than the subsequent limitations being contingent clauses (see MPEP § 2111.04), causes further issues. The second instance of the “in a case” portion refers to “the doping concentration,” “the total area” and “the total number” introduced in the first instance of “in a case” which cannot logically exist if the second instance is selected based on the doping concentration range. The manner in which the claim is written makes unclear the required structure. The claim should establish and require that the first-conductivity-type region has a doping concentration, and then provide the logical “if … then” type structural conditions based on the doping concentration (i.e. “a first-conductivity-type region having a doping concentration provided in the semiconductor substrate…”). Claims 2-10 include and do not cure the deficiencies of claim 1. Regarding claim 2, there is insufficient antecedent basis for the limitation of “each of the plurality of first-conductivity-type regions” in the claim. The claim does not clearly require or establish that the first electrode contact each of the plurality of first-conductivity-type regions therefore makes the structure of Schottky regions unclear. The claim does not require the first electrode to contact the first-conductivity type region at multiple separate areas. The claim does not clearly require or establish that the first electrode contacts each of the plurality of silicide films therefore makes the structure of ohmic regions unclear. The claim does not clearly require or establish that the first electrode contacts each of the plurality of second-conductivity-type regions therefore makes the structure of ohmic regions unclear. Claims 3-9 include and do not cure the deficiencies of claim 2. Regarding claim 4, there is no antecedent basis for “the plurality of ohmic regions provided in the chip center portion” and there is no antecedent basis for “the plurality of ohmic regions provided in the chip outer peripheral portion” in the claim. There is only antecedent basis for “a plurality of ohmic regions each formed by the first electrode and by each of the plurality of silicide films that contact each other” in the claim. There is no structural relationship between “the plurality of ohmic regions” and “a chip center portion or “a chip outer peripheral portion” in the claim. Claim 11 recites “in a case where the first-conductivity-type region is in a low concentration condition where a doping concentration of the first-conductivity-type region is 1.0×1015/cm3 or more but less than 1.0×1016/cm3, at least one of the plurality of silicide films provided in the chip outer peripheral portion has a first contact resistance that is in a range of 5×10-4Ω/cm2 to 5×10-3Ω/cm2 and at least another one of the plurality of silicide films provided in the chip center portion has a second contact resistance that is 5×10-5Ω/cm2 or more but less than 5×10-4Ω/cm2, and in a case where the first-conductivity-type region is in a low concentration condition in which the doping concentration of the first-conductivity-type region is in a range of 1.0×1016/cm3 to 9.0×1016/cm3, the at least one of the plurality of silicide films provided in the chip outer peripheral portion has the second contact resistance and the at least the another one of the plurality of silicide films provided in the chip center portion has the first contact resistance.” There is no antecedent basis for “at least one of the plurality of silicide films provided in the chip outer peripheral portion” and there is no antecedent basis for “at least another one of the plurality of silicide films provided in the chip center portion” in the claim. There is only antecedent basis for “a plurality of silicide films each in ohmic contact with a portion of a corresponding one of the plurality of second-conductivity-type regions” in the claim. There is no structural relationship between “a portion of a corresponding one of the plurality of second-conductivity-type regions” and “a chip center portion or “a chip outer peripheral portion” in the claim. Furthermore, the use of “in a case,” other than the subsequent limitations being contingent (see MPEP § 2111.04), causes further issues. The claim recites “in a low concentration condition” for the first instance at line 14 and then again for the second instance at line 21 where the doping concentration ranges are different in the respective cases. It appears that perhaps the second recitation was intended to read “in a high concentration condition,” however, as written the claim boundaries of are not clear. The second instance of the “in a case” portion refers to “the doping concentration,” “the first contact resistance” and “the second contact resistance” introduced in the first instance of “in a case” which cannot logically exist if the second instance is selected based on the doping concentration range. The manner in which the claim is written makes unclear the required structure. The claim should clearly establish and require that the first-conductivity-type region has a doping concentration, and that the silicide films have a first or second contact resistance, and then provide the logical “if … then” type structural conditions based on the doping concentration (i.e. “a first-conductivity-type region having a doping concentration provided in the semiconductor substrate…”). Claim 12 recites “wherein the performing the first heat treatment includes: in a case where the forming of the first-conductivity-type region is in a low concentration condition in which a doping concentration of the first-conductivity-type region is 1.0×1015/cm3 or more but less than 1.0×1016/cm3, setting the temperature of the first heat treatment to be 800 degrees C or higher but less than 1000 degrees C, thereby forming at least one of the plurality of silicide films in a chip outer peripheral portion of the active region that surrounds a periphery of a chip center portion at a center of the active region to have a first contact resistance in a range of 5×10-4Ω/cm2 to 5×10-3Ω/cm2 and setting the temperature of the first heat treatment to be in a range of 1000 degrees C to 1200 degrees C, thereby forming at least another one of the plurality of silicide films in the chip center portion of the active region to have a second contact resistance of 5×10-5Ω/cm2 or more but less than 5×10-4Ω/cm2, and in a case where the forming of the first-conductivity-type region is in a high concentration condition in which the doping concentration of the first-conductivity-type region is in a range of 1.0×1016/cm3 to 9.0×1016/cm3, setting the temperature of the first heat treatment to be in the range of 1000 degrees C to 1200 degrees C, thereby forming the at least one of the plurality of silicide films in the chip outer peripheral portion of the active region to have the second contact resistance, and setting the temperature of the first heat treatment to be 800 degrees C or higher but less than 1000 degrees C, thereby forming the at least another one of the plurality of silicide films in the chip center portion of the active region to have the first contact resistance.” First, it is noted that both of the “in a case” contingent clauses (see MPEP § 2111.04) are limiting the previous step of “performing the first heat treatment” therefore, the recitations of “thereby forming at least one of the plurality of silicide films” and “thereby forming at least another one of the plurality of silicide films” in each clause are unclear because the silicide films aren’t formed until the second heat treatment step. The “in a case” contingent clauses (see MPEP § 2111.04) each lack antecedent basis for “the temperature of the first heat treatment.” The claim does not establish that the first heat treatment step is performed at a first temperature. The claim should be written to establish the variables and then utilize the conditional clauses to limit them. The same first “in a case” contingent clauses (see MPEP § 2111.04) the claim recites “setting the temperature setting the temperature of the first heat treatment to be 800 degrees C or higher but less than 1000 degrees C” and also recites “and setting the temperature of the first heat treatment to be in a range of 1000 degrees C to 1200 degrees C.” This makes the required step limitations unclear. Is the first heat treatment required to be performed at a temperature, and if so, which temperature range? The second instance of the “in a case” contingent clause (see MPEP § 2111.04) refers to “the doping concentration” and “the first contact resistance” introduced in the first instance of “in a case” which cannot logically exist if the second instance is selected based on the doping concentration range. The manner in which the claim is written makes unclear the required structure. The claim should clearly establish and require that the first-conductivity-type region has a doping concentration, and that the silicide films have a first or second contact resistance, and then provide the logical “if … then” type structural conditions based on the doping concentration (i.e. “a first-conductivity-type region having a doping concentration provided in the semiconductor substrate…”). For all claims, while the “in a case” contingent clauses (see MPEP § 2111.04) of the claims are not inherently indefinite based on their mere presence, the steps, structural boundaries and/or relationships of what is included if required are not clear. The claim does not require that the first-conductivity-type region have a doping concentration, and further the “in a case” clauses are optional because they do not cover the required structural if the first-conductivity-type region has a doping concentration that is less than 1.0x1015/cm3 and do no cover the structural scope if the first-conductivity-type region has a doping concentration that is greater than 9.0x1016/cm3. The claim does not set any lower or upper boundaries that the doping concentration of the first conductivity-type region must be within those limits. It’s unclear as to the limiting effect of the “in a case” clauses based on the lack of explicitly defined required structure(s) and/or relationships in the body of the claims. Allowable Subject Matter Claims 1-12 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. The following is a statement of reasons for the indication of allowable subject matter: As insofar as Claim 1 is definite, the prior art of record alone or in combination neither teaches nor makes obvious the invention of the semiconductor device comprising wherein the first-conductivity-type region has a doping concentration in a range of 1.0×1015/cm3 to 9.0×1016/cm3; and in a case where the first-conductivity-type region is in a low concentration condition in which a doping concentration of the first-conductivity-type region is 1.0×1015/cm3 or more but less than 1.0×1016/cm3, a total area or a total number of the plurality of silicide films provided in the chip center portion is greater than is a total area or a total number of the plurality of silicide films provided in the chip outer peripheral portion, and in a case where the first-conductivity-type region is in a high concentration condition in which the doping concentration of the first-conductivity-type region is in a range of 1.0×1016/cm3 to 9.0×1016/cm3, the total area or the total number of the plurality of silicide films provided in the chip center portion is less than is the total area or the total number of the plurality of silicide films provided in the chip outer peripheral portion in combination with all of the limitations of Claim 1. As insofar as Claim 11 is definite, the prior art of record alone or in combination neither teaches nor makes obvious the invention of the semiconductor device, comprising in a case where the first-conductivity-type region is in a low concentration condition where a doping concentration of the first-conductivity-type region is 1.0×1015/cm3 or more but less than 1.0×1016/cm3, at least one of the plurality of silicide films provided in the chip outer peripheral portion has a first contact resistance that is in a range of 5×10-4Ω/cm2 to 5×10-3Ω/cm2 and at least another one of the plurality of silicide films provided in the chip center portion has a second contact resistance that is 5×10-5Ω/cm2 or more but less than 5×10-4Ω/cm2, and in a case where the first-conductivity-type region is in a low concentration condition in which the doping concentration of the first-conductivity-type region is in a range of 1.0×1016/cm3 to 9.0×1016/cm3, the at least one of the plurality of silicide films provided in the chip outer peripheral portion has the second contact resistance and the at least the another one of the plurality of silicide films provided in the chip center portion has the first contact resistance in combination with all of the limitations of Claim 11. Regarding Claim 12, the prior art of record alone or in combination neither teaches nor makes obvious the invention of the method of manufacturing a semiconductor device comprising: wherein the performing the first heat treatment includes: in a case where the forming of the first-conductivity-type region is in a low concentration condition in which a doping concentration of the first-conductivity-type region is 1.0×1015/cm3 or more but less than 1.0×1016/cm3, setting the temperature of the first heat treatment to be 800 degrees C or higher but less than 1000 degrees C, thereby forming at least one of the plurality of silicide films in a chip outer peripheral portion of the active region that surrounds a periphery of a chip center portion at a center of the active region to have a first contact resistance in a range of 5×10-4Ω/cm2 to 5×10-3Ω/cm2 and setting the temperature of the first heat treatment to be in a range of 1000 degrees C to 1200 degrees C, thereby forming at least another one of the plurality of silicide films in the chip center portion of the active region to have a second contact resistance of 5×10-5Ω/cm2 or more but less than 5×10-4Ω/cm2, and in a case where the forming of the first-conductivity-type region is in a high concentration condition in which the doping concentration of the first-conductivity-type region is in a range of 1.0×1016/cm3 to 9.0×1016/cm3, setting the temperature of the first heat treatment to be in the range of 1000 degrees C to 1200 degrees C, thereby forming the at least one of the plurality of silicide films in the chip outer peripheral portion of the active region to have the second contact resistance, and setting the temperature of the first heat treatment to be 800 degrees C or higher but less than 1000 degrees C, thereby forming the at least another one of the plurality of silicide films in the chip center portion of the active region to have the first contact resistance in combination with all of the limitations of Claim 12. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to EARL N TAYLOR whose telephone number is (571)272-8894. The examiner can normally be reached M-F, 9:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached on (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EARL N TAYLOR/Primary Examiner, Art Unit 2896 EARL N. TAYLOR Primary Examiner Art Unit 2896
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Prosecution Timeline

Aug 30, 2024
Application Filed
Oct 02, 2026
Non-Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
94%
With Interview (+6.3%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 886 resolved cases by this examiner. Grant probability derived from career allowance rate.

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