Prosecution Insights
Last updated: September 20, 2026
Application No. 18/821,443

SEMICONDUCTOR DEVICE

Non-Final OA §102§103
Filed
Aug 30, 2024
Priority
Apr 02, 2024 — JP 2024-059675
Examiner
BEARDSLEY, JONAS TYLER
Art Unit
Tech Center
Assignee
Kabushiki Kaisha Toshiba
OA Round
1 (Non-Final)
61%
Grant Probability
Moderate
1-2
OA Rounds
1y 1m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 61% of resolved cases
61%
Career Allowance Rate
174 granted / 287 resolved
+0.6% vs TC avg
Strong +29% interview lift
Without
With
+29.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
33 currently pending
Career history
327
Total Applications
across all art units

Statute-Specific Performance

§103
46.4%
+6.4% vs TC avg
§102
32.4%
-7.6% vs TC avg
§112
20.7%
-19.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 287 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 and 4-8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by WAHL (US 6462376). Regarding claim 1, WAHL discloses a semiconductor device, comprising: a first electrode (drain contact 64, see fig 1-6, para 24); a first semiconductor layer (n-type layer 40 and 42, see fig 1-6, para 8) located on the first electrode, the first semiconductor layer being of a first conductivity type (40 and 42 can be n-type, see para 8), the first semiconductor layer including a plurality of mesa parts (the semiconductor mesas comprising 42, 66, 44 and 46 between the trenches 12 in fig 5C, see fig 5C, para 6 and 26) separated from each other in a first direction (the direction of cross-section A-A in fig 1, see fig 1-6), the plurality of mesa parts extending in a second direction orthogonal to the first direction (the mesas extend in the direction of cross-section B-B, which is orthogonal to A-A, see fig 1); a second electrode (source contact 60 in 56, see fig 4 and 5C, 60, para 22) positioned in a recess (the recess 56 or 18, see fig 5C, para 22) provided in an upper portion of at least one of the mesa parts (60 is in an upper portion of the mesa, see fig 5C), the second electrode extending in the second direction (the contact 18 containing 60 extends in the 2nd direction, see fig 1); a gate electrode (the conductor 52 in the trenches 12, see fig 4C, para 15) adjacent to the at least one of the mesa parts in the first direction (see fig 1 and 5C); an insulating film located between the gate electrode and the at least one of the mesa parts (fig 1-6, 50, para 14); and a second semiconductor layer (fig 1-6, 44, para 8) contacting an end portion in the second direction of the second electrode (see fig 1), the second semiconductor layer being of a second conductivity type (44 can be p-doped, see para 8), the at least one of the mesa parts including a first side surface facing the gate electrode via the insulating film in the first direction (the mesa 44 has a left side that faces the gate in the horizontal direction, see fig 5C), and a second side surface positioned at a side opposite to the first side surface in the first direction, the second electrode contacting the second side surface (44 has a side opposite the left side that faces 56, see fig 5C). Regarding claim 4, WAHL discloses a semiconductor device, comprising: a first electrode (drain contact 64, see fig 1-6, para 24); a first semiconductor layer (n-type layer 40 and 42, see fig 1-6, para 8) located on the first electrode, the first semiconductor layer being of a first conductivity type (40 and 42 can be n-type, see para 8), the first semiconductor layer including a plurality of mesa parts (the semiconductor mesas comprising 42, 66, 44 and 46 between the trenches 12 in fig 5C, see fig 5C, para 6 and 26) separated from each other in a first direction (the direction of cross-section A-A in fig 1, see fig 1-6), the plurality of mesa parts extending in a second direction orthogonal to the first direction (the mesas extend in the direction of cross-section B-B, which is orthogonal to A-A, see fig 1); a second electrode (source contact 60 in 56, see fig 4 and 5C, 60, para 22) positioned in a recess (the recess 56 or 18, see fig 5C, para 22) provided in an upper portion of at least one of the mesa parts (60 is in an upper portion of the mesa, see fig 5C), the second electrode extending in the second direction (the contact 18 containing 60 extends in the 2nd direction, see fig 1); a gate electrode (the conductor 52 in the trenches 12, see fig 4C, para 15) adjacent to the at least one of the mesa parts in the first direction (see fig 1 and 5C); an insulating film located between the gate electrode and the at least one of the mesa parts (fig 1-6, 50, para 14); and a first conductive member (the conductor 52 in trench 22 that extends perpendicular to the gates, see fig 6, para 5) extending in the first direction (22 extends perpendicular to A-A, see fig 1), the first conductive member facing an end portion in the second direction of the second electrode (22 faces an end of 60, see fig 1), the at least one of the mesa parts including a first side surface facing the gate electrode via the insulating film in the first direction (the mesa 44 has a left side that faces the gate in the horizontal direction, see fig 5C), and a second side surface positioned at a side opposite to the first side surface in the first direction, the second electrode contacting the second side surface (44 has a side opposite the left side that faces 56, see fig 5C). Regarding claim 5, WAHL discloses the device according to claim 4, further comprising: a second semiconductor layer (fig 1-6, 44, para 8) positioned between the first conductive member and the end portion of the second electrode in the second direction (44 is between 22 and 18, see fig 1 and 6), the end portion of the second electrode contacting the second semiconductor layer (the end portion of 60 contacts 44, see fig 1-6, para 28), the second semiconductor layer being of a second conductivity type (44 is p-type, see fig 1-6, para 8). Regarding claim 6, WAHL discloses the device according to claim 4, wherein the first conductive member is connected with the gate electrode (12 and 22 are connected, see fig 1, para 3-4). Regarding claim 7, WAHL discloses the device according to claim 6, further comprising: a second conductive member (one of the gate electrodes 12 extending from 22a opposite the gate electrode and offset from it along 22a, see fig 3, para 7) connected with the first conductive member, the second conductive member extending in the second direction, the gate electrode and the second conductive member extending from the first conductive member in mutually-opposite directions (gates 12 extend from 22a in both directions, see fig 3). Regarding claim 8, WAHL discloses the device according to claim 7, wherein positions of the gate electrode and the second conductive member are shifted from each other in the first direction (the gates 12 are offset from each other in the horizontal direction, see fig 1 and 3). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over WAHL (US 6462376) in view of HSIEH (US 20130299901). Regarding claim 2, WAHL discloses the device according to claim 1. WAHL fails to explicitly disclose a device, wherein the at least one of the mesa parts includes: a channel part positioned between the gate electrode and the second electrode in the first direction; and a contact part located on the channel part, the contact part having a higher first-conductivity-type impurity concentration than the channel part. HSIEH teaches a device, wherein the at least one of the mesa parts (the mesa including 308 and 328, see fig 3C) includes: a channel part (fig 3C, 328, para 56) positioned between the gate electrode and the second electrode in the first direction; and a contact part (fig 3C, 308, para 55) located on the channel part, the contact part having a higher first-conductivity-type impurity concentration than the channel part (308 has a higher doping concentration than 328, see fig 3C, para 55). WAHL and HSIEH are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of WAHL with the doping regions of HSIEH because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of WAHL with the doping regions of HSIEH in order to lower base resistance (see HSIEH para 56). Regarding claim 9, WAHL discloses the device according to claim 4. WAHL fails to explicitly disclose a device, wherein the at least one of the mesa parts includes: a channel part positioned between the gate electrode and the second electrode in the first direction; and a contact part located on the channel part, the contact part having a higher first-conductivity-type impurity concentration than the channel part. HSIEH teaches a device, wherein the at least one of the mesa parts (the mesa including 308 and 328, see fig 3C) includes: a channel part (fig 3C, 328, para 56) positioned between the gate electrode and the second electrode in the first direction; and a contact part (fig 3C, 308, para 55) located on the channel part, the contact part having a higher first-conductivity-type impurity concentration than the channel part (308 has a higher doping concentration than 328, see fig 3C, para 55). WAHL and HSIEH are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of WAHL with the doping regions of HSIEH because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of WAHL with the doping regions of HSIEH in order to lower base resistance (see HSIEH para 56). Claim(s) 3 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over WAHL (US 6462376) in view of HSIEH (US 20130299901) and further in view of SIEMIENIEC (US 20190035915). Regarding claim 3, WAHL and HSIEH disclose the device according to claim 2. WAHL fails to explicitly disclose a device, wherein the channel part and the second electrode form a Schottky junction, and the second electrode has an ohmic contact with the contact part. SIEMIENIEC teaches a device, wherein the channel part and the second electrode form a Schottky junction (51 forms a Schottky junction with 41 and 53, see para 52, fig 10), and the second electrode has an ohmic contact with the contact part (electrode 41 forms an ohmic contact with 62, which is more highly doped than 51 or 61, see fig 10, para 49-50). WAHL and SIEMIENIEC are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of WAHL with the contact types of SIEMIENIEC because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of WAHL with the contact types of SIEMIENIEC in order to decrease on-resistance (see para 35). Regarding claim 10, WAHL and HSIEH disclose the device according to claim 9. WAHL fails to explicitly disclose a device, wherein the channel part and the second electrode form a Schottky junction, and the second electrode has an ohmic contact with the contact part. SIEMIENIEC teaches a device, wherein the channel part and the second electrode form a Schottky junction (51 forms a Schottky junction with 41 and 53, see para 52, fig 10), and the second electrode has an ohmic contact with the contact part (electrode 41 forms an ohmic contact with 62, which is more highly doped than 51 or 61, see fig 10, para 49-50). WAHL and SIEMIENIEC are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of WAHL with the contact types of SIEMIENIEC because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of WAHL with the contact types of SIEMIENIEC in order to decrease on-resistance (see para 35). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONAS TYLER BEARDSLEY whose telephone number is (571)272-3227. The examiner can normally be reached 930-600 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONAS T BEARDSLEY/Examiner, Art Unit 2811 /SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811
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Prosecution Timeline

Aug 30, 2024
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
61%
Grant Probability
90%
With Interview (+29.2%)
3y 1m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 287 resolved cases by this examiner. Grant probability derived from career allowance rate.

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