DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 20 is objected to because of the following informalities:
The term “A computer-readable storage medium” in claim 20, line 1 should be “A non-transitory computer-readable storage medium”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-10 and 12-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 recites the limitation "the block" in line 2 and line 4. There is insufficient antecedent basis for this limitation in the claim.
Claim 4 recites the limitation "the block" in line 4, line 6, line 7 and line 8. There is insufficient antecedent basis for this limitation in the claim.
Claim 5 recites the limitation "the block" in line 2, line 3, line 4, line 5 and line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 6 recites the limitation "the block" in line 2 and line 3. There is insufficient antecedent basis for this limitation in the claim.
Claim 10 recites the limitation "the block" in lines 1-2 and line 4. There is insufficient antecedent basis for this limitation in the claim.
It is unclear whether the limitation “the block” in the above claims is different from “a selected block” recited in claim 1, line 2.
Claims 12, 14, 15 and 16 are rejected for the same reasons.
Claim 3 recites the limitation “the equivalent retention duration” in lines 7-8. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the equivalent retention duration” relates back to “an equivalent retention duration” recited in claim 3, line 3 or line 7.
Claim 13 recites the limitation “the equivalent retention duration” in lines 6-7. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the equivalent retention duration” relates back to “an equivalent retention duration” recited in claim 13, line 2 or line 6.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-4, 7-9, 11 and 12 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-3, 5-8, 10, 14-16 and 20 of copending Application No. 18/916,192 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-4, 7-9, 11 and 12 would have been obvious over, the reference claims 1-3, 5-8, 10, 14-16 and 20 of copending application.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Regarding claim 1, claims 1 and 3 of the copending application recites a method of operating a memory system, the method comprising:
performing a read operation on a selected memory cell in a selected block based on a read voltage of a group of read voltages when the memory system is re-powered on after power off (claim 1, lines 6-7); and
determining an equivalent power off duration of the memory system according to a read result and a preset mapping table (claim 1, lines 8-9), wherein the memory system includes a memory and a controller coupled to the memory (claim 1, preamble), the memory includes a plurality of blocks, each of the blocks includes a plurality of memory cells, each of the memory cells is configured to store one of a plurality of memory states, the plurality of memory states correspond to the group of read voltages, and a read voltage of the group of read voltages is configured to distinguish different memory states (claim 3).
Regarding claim 2, claim 2 of the copending application recites the method according to claim 1, wherein the method further includes: obtaining an initial timestamp of the block when the memory system is re-powered on after power off, wherein the initial timestamp is configured to indicate an initial equivalent retention duration of the block before power off, and the initial equivalent retention duration is determined based on a temperature and an initial physical retention duration.
Regarding claim 3, claim 5 of th ecopending application recites the method according to claim 2, wherein the determining the equivalent power off duration of the memory system according to the read result and the preset mapping table includes: determining an equivalent retention duration of the selected block according to the read result and the preset mapping table, wherein the read result includes a number of memory cells having a threshold voltage greater than or equal to the read voltage and a number of memory cells having a threshold voltage less than the read voltage, the preset mapping table includes a mapping relationship between a preset number range and an equivalent retention duration, and the equivalent retention duration is determined based on a temperature and a physical retention duration; and determining the equivalent power off duration of the memory system according to a difference between the equivalent retention duration of the selected block and the initial timestamp of the selected block, wherein the equivalent power off duration is determined based on a temperature and a physical power off duration.
Regarding claim 4, claim 10 of the copending application recites the method according to claim 3, wherein after determining the equivalent power off duration of the memory system according to the read result and the preset mapping table, the method further includes: updating the initial timestamp of the block according to the initial timestamp of the block and the equivalent power off duration; and determining the read voltage when the read operation is performed on the block according to the updated timestamp of the block, wherein the updated timestamp is configured to indicate a sum of the initial equivalent retention duration of the block before power off and the equivalent power off duration.
Regarding claim 7, claim 6 of the copending application recites the method according to claim 3, further including: reading a plurality of reference samples, and determining a read result of each of the reference samples at different equivalent retention durations; and determining a preset number range at the same equivalent retention duration according to the read results of the plurality of reference samples at the same equivalent retention duration, and determining a mapping relationship between the preset number range and the equivalent retention duration as the preset mapping table.
Regarding claim 8, claim 7 of the copending application recites the method according to claim 7, wherein the plurality of reference samples are in different erase range intervals; the determining the preset number range at the same equivalent retention duration according to the read results of the plurality of reference samples at the same equivalent retention duration, and determining the mapping relationship between the preset number range and the equivalent retention duration as the preset mapping table includes: determining the preset number range of the reference samples in the different erase range intervals at the same equivalent retention duration according to the read results of the reference samples in the different erase range intervals at the same equivalent retention duration, and determining the mapping relationship between the preset number range of the reference samples in the different erase range intervals and the equivalent retention duration as the preset mapping table, wherein a number of the erase range intervals and a number of the preset mapping tables are the same.
Regarding claim 9, claim 8 of copending application recites the method according to claim 8, wherein the determining the equivalent power off duration of the memory system according to the read result and the preset mapping table includes: determining the erasing range interval, in which the selected block is, according to erasing count of the selected block; and determining the equivalent retention duration of the selected block according to the read result and the preset mapping table corresponding to the erasing range interval, in which the selected block is.
Regarding claim 11, claims 14 and 16 of the copending application recite a memory system comprising:
a memory; and
a controller coupled to the memory,
the memory includes a plurality of blocks, each of the blocks includes a plurality of memory cells, each of the memory cells is configured to store one of a plurality of memory states, the plurality of memory states correspond to a group of read voltages, and a read voltage of the group of read voltages is configured to distinguish different memory states,
the controller is configured:
to: perform a read operation on a selected memory cell in a selected block based on the read voltage of the group of read voltages when the memory system is re-powered on after power off; and
determine an equivalent power off duration of the memory system according to a read result and a preset mapping table.
Regarding claim 12, claim 15 of thecopending application recite the memory system according to claim 11, wherein the controller is further configured to:
obtain an initial timestamp of the block when the memory system is re-powered on after power off, wherein the initial timestamp is configured to indicate an initial equivalent retention duration of the block before power off, and the initial equivalent retention duration is determined based on a temperature and an initial physical retention duration.
Regarding claim 20, claim of the copending application recites a computer-readable storage medium having a computer program stored thereon, which, when executed, implements an operation method of a memory system, the operation method comprising:
performing a read operation on a selected memory cell in a selected block based on a read voltage of a group of read voltages when the memory system is re-powered on after power off; and
determining an equivalent power off duration of the memory system according to a read result and a preset mapping table,
wherein the memory system comprises a memory and a controller coupled to the memory, the memory comprises a plurality of blocks, each of the blocks comprises a plurality of memory cells, each of the memory cells is configured to store one of a plurality of memory states, the plurality of memory states correspond to the group of read voltages, and a read voltage of the group of read voltages is configured to distinguish different memory state.
It would have been obvious to one having ordinary skill in the art to recognize that each of the memory cells is configured to store one of a plurality of memory states, the plurality of memory states correspond to the group of read voltages, and a read voltage of the group of read voltages is configured to distinguish different memory state.
Allowable Subject Matter
Claims 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 17, the prior art made of record and considered pertinent to the applicant's disclosure does not teach the claimed limitation of “determine a preset number range at the same equivalent retention duration according to the read results of the plurality of reference samples at the same equivalent retention duration, and determine a mapping relationship between the preset number range and the equivalent retention duration as the preset mapping table.” in combination with the other limitations thereof as is recited in the claim. Claims 18 and 19 depend on claim 17.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Miller et al. (US 2022/0066651) discloses an asynchronous power loss (APL) event is detected at a memory device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUAN HOANG whose telephone number is (571)272-1779. The examiner can normally be reached 7:30AM-4:00PM M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, AMIR ZARABIAN can be reached at 571-272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HUAN HOANG/ Primary Examiner, Art Unit 2827