DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 11, and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Falik et al. (U.S. Patent Number 7,318,173).
Regarding Claim 1, Falik discloses a storage device (Figure 4, item 442 and 420/422) comprising:
at least one memory (i.e., there are at least two memories in the reference system) including a plurality of data storage blocks (Figure 4, item 442, Column 4, line 65 - Column 5, line 2 and Column 5, lines 11-15; i.e., the non-volatile memory 442 may contain at least two data storage blocks, one that stores the embedded controller 440 selection of the BIOS and one that stores the CPU 108 selection of the BIOS) and at least one firmware storage block storing a plurality of firmwares (Figure 4, items 420 and 422, Column 4, lines 51-62; i.e., two different BIOS [which is a type of firmware] images 420 and 422 can be stored in a single memory [the claimed “firmware storage block”]); and
a controller (Figure 4, item 440) configured to:
acquire temperature information (Figure 4, item 446, Column 5, lines 39-43),
when the temperature information is within a first range (e.g., when the temperature is in a normal range), read a first firmware among the plurality of firmwares (Figure 5, item 528, Column 1, lines 10-17; i.e., by selecting one of the firmwares 420 or 422 to boot up the computer, it necessarily would include reading that selected firmware so that the booting can be successfully completed), perform booting (Figure 5, item 534, Column 5, lines 28-30; i.e., resetting the computer after the particular firmware is selected) and operate in a first mode (Column 5, lines 31-43 and Column 6, lines 18-31; i.e., the “first mode” is the mode in which the first firmware image [e.g., BIOS image A 420] is selected), and
when the temperature information is within a second range (Column 5, lines 39-43; e.g., when the temperature is out of range) different from the first range, read a second firmware among the plurality of firmwares (Figure 5, item 530, Column 1, lines 10-17; i.e., by selecting one of the firmwares 420 or 422 to boot up the computer, it necessarily would include reading that selected firmware so that the booting can be successfully completed), perform booting (Figure 5, item 534, Column 5, lines 28-30; i.e., resetting the computer after the particular firmware is selected), and operate in a second mode (Column 5, lines 31-43 and Column 6, lines 18-31; i.e., the “second mode” is the mode in which the second firmware image [e.g., BIOS image B 422] is selected; different BIOS images can contain different features [see Column 1, lines 23-26]).
Regarding Claim 11, Falik discloses wherein the at least one firmware storage block is configured to further store a first backup firmware corresponding to the first firmware and a second backup firmware corresponding to the second firmware (Column 1, lines 18-21 and Column 7, lines 34-41).
Regarding Claim 12, Falik discloses wherein the controller is configured to perform booting by reading the first backup firmware when booting using the first firmware fails (Column 1, lines 18-21), and perform booting by reading the second firmware when booting using the first backup firmware fails (Column 7, lines 34-41; i.e. this would be the case if one of the first firmware backups was instead equated to the claimed “second firmware”).
Claim 13, 15, and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Oh et al. (U.S. Patent Application Publication Number 2015/0301932).
Regarding Claim 13, Oh discloses a storage device (Figure 1, item 1000) comprising:
at least one memory including a plurality of data storage blocks (Figure 1, item 100, paragraph 0058); and
a controller (Figure 1, item 300) configured to control an operation of the at least one memory and perform a background operation (Figure 1, item BOU, paragraph 0060),
wherein a first processing delay time required to process an external command (paragraphs 0058 and 0060; i.e., a command can be received from a host; the memory management operations which occur in the background are executed when the memory device is not being otherwise used; therefore, the controller would process the external command after the memory management background operations have completed, thereby creating some delay for the external commands in any event) received while performing the background operation in a first temperature range is less than a second processing delay time required to process an external command received while performing the background operation in a second temperature range different from the first temperature range (paragraph 0086; i.e., background operations may be delayed longer if the measured temperature is within a certain range [the claimed “second temperature range”] versus being in the “desired” temperature range [the claimed “first temperature range”], which would necessarily delay other incoming commands [e.g., from the host]; in addition, the reference clock of the memory device can be lowered in order to reduce the temperature, which would also delay processing of external commands).
Regarding Claim 15, Oh discloses wherein the controller is configured to complete the background operation after processing the external command in the first temperature range; and
process the external command after completing the background operation in the second temperature range (paragraphs 0058 and 0060; i.e., the memory management operations which occur in the background are executed when the memory device is not being otherwise used; therefore, the controller would process the external command after the memory management background operations have completed; the background operations occur whether in the first or second temperature range [paragraph 0062]).
Regarding Claim 16, Oh discloses wherein the controller is configured to:
store, in a buffer memory (Figure 16, item 3024, paragraph 0139), user data according to a write command externally received while performing the background operation (paragraph 0137); and
write the user data to the at least one memory (paragraph 0139) after a waiting time, and
wherein the waiting time in the second temperature range is greater than the waiting time in the first temperature range (paragraphs 0062 and 0086; i.e., background operations may be delayed if the measured temperature is within a certain range, which would necessarily delay other incoming commands [e.g., from the host]; in addition, the reference clock of the memory device can be lowered in order to reduce the temperature, which would also delay processing of external commands).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-7 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Falik as applied to claim 1 above, and further in view of Oh.
Regarding Claim 2, Falik does not expressly disclose wherein the controller is configured to control performance of a background operation, and
wherein a second processing delay time required to process an external command received while performing the background operation in the second mode is greater than a first processing delay time required to process an external command received while performing the background operation in the first mode.
In the same field of endeavor (e.g., temperature-based memory operations), Oh teaches wherein the controller (Figure 1, item 300) is configured to control performance of a background operation (Figure 1, item BOU, paragraph 0060), and
wherein a second processing delay time required to process an external command (paragraph 0058; i.e., a command can be received from a host) received while performing the background operation in the second mode is greater than a first processing delay time required to process an external command received while performing the background operation in the first mode (paragraph 0086; i.e., background operations may be delayed if the measured temperature is within a certain range [the claimed “second mode”], which would necessarily delay the processing of other incoming commands [e.g., from the host]; in addition, the reference clock of the memory device can be lowered in order to reduce the temperature, which would also delay processing of external commands).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Oh’s teachings of temperature-based memory operations with the teachings of Falik, for the purpose of ensuring high operational reliability of the memory device (see Oh, paragraph 0004).
Regarding Claim 3, Falik discloses wherein the controller is configured to read a third firmware among the plurality of firmwares (Column 7, lines 27-28), perform booting (Figure 5, item 534, Column 5, lines 28-30; i.e., resetting the computer after the particular firmware is selected), and operate in a third mode when the temperature information is within a third range different from the first range and the second range (Column 5, lines 39-43; i.e., although the reference does not expressly disclose a “third range” of temperature, it would have been obvious to one of ordinary skill in the art to have done so for the purpose of further extending the capabilities of the system since different functionality could occur for the third type of firmware).
Regarding Claim 4, Oh teaches wherein a third processing delay time required to process an external command received while performing the background operation in the third mode is greater than the first processing delay time and is less than the second processing delay time (paragraphs 0091-0092; i.e., there may be plural temperature ranges, each with a corresponding delay time).
Regarding Claim 5, Oh teaches wherein, when an external command is received while performing a background operation in the second mode, the controller is configured to process the external command after completing the background operation (paragraphs 0058 and 0060; i.e., the memory management operations which occur in the background are executed when the memory device is not being otherwise used; therefore, the controller would process the external command after the memory management background operations have completed).
Regarding Claim 6, Oh teaches wherein, when an external command is received while performing a garbage collection operation (paragraph 0092) in the second mode, the controller is configured to process the external command after completing a creation of a free storage block during the garbage collection operation (paragraphs 0058 and 0060; i.e., the memory management operations which occur in the background are executed when the memory device is not being otherwise used; therefore, the controller would process the external command after the memory management background operations have completed).
Regarding Claim 7, Oh teaches wherein, when an external command is received while performing a read reclaim operation (paragraph 0095; i.e., a read refresh operation) in the second mode, the controller is configured to process the external command after completing an operation (paragraphs 0058 and 0060; i.e., the memory management operations which occur in the background are executed when the memory device is not being otherwise used; therefore, the controller would process the external command after the memory management background operations have completed) of copying data written in a data storage block among the plurality of data storage blocks, which is a target of the read reclaim operation, to another data storage block among the plurality of data storage blocks (paragraph 0095).
Regarding Claim 10, Oh teaches wherein, when externally receiving a write command while performing a background operation in the second mode (paragraph 0137), the controller is configured to output a response signal corresponding to the write command (paragraph 0058; i.e., the reference does not appear to expressly disclose a response signal, however it would have been obvious to one of ordinary skill in the art to have done so for the purpose of letting the host know that the memory device has successfully received the data [an acknowledgement signal] thereby reducing the need for the host to resend the data), externally receive user data and store the user data in a buffer memory (Figure 16, item 3024, paragraph 0139), and write the user data stored in the buffer memory to the at least one memory when the background operation is completed (paragraph 0139).
Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Falik as applied to claim 1 above, and further in view of Cho (U.S. Patent Application Publication Number 2021/0279000).
Regarding Claim 8, Falik does not expressly disclose wherein, when a read operation corresponding to a read command externally received fails, the controller is configured to perform a read retry operation using a previously stored read retry table, and
wherein a size or number of a read retry table used in the second mode is greater than a size or number of a read retry table used in the first mode.
In the same field of endeavor (e.g., temperature-based memory operations), Cho teaches wherein, when a read operation corresponding to a read command externally received fails (paragraph 0153), the controller is configured to perform a read retry operation using a previously stored read retry table (paragraph 0154), and
wherein a size or number of a read retry table used in the second mode is greater than a size or number of a read retry table used in the first mode (paragraph 0155; i.e., depending on the type of memory cell used [the different “modes”], the size of the read retry table can increase).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Cho’s teachings of temperature-based memory operations with the teachings of Falik, for the purpose of minimizing degradation of reading performance due to a read retry operation in the situation in which the threshold voltage distribution deteriorates (see Cho, paragraph 0006).
Regarding Claim 9, Cho teaches wherein the controller is configured to perform a read retry operation when a read operation corresponding to a read command externally received fails (paragraph 0153), and
wherein a number of read retry operations performed in the second mode is greater than a number of read retry operations performed in the first mode (paragraph 0155; i.e., depending on the type of memory cell used [the different “modes”], the number of read retry operations can increase).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Oh as applied to claim 13 above, and further in view of Falik.
Regarding Claim 14, Oh does not expressly disclose wherein the controller is configured to perform booting by reading a first firmware in the first temperature range, and perform booting by reading a second firmware in the second temperature range, the first and second firmwares being stored in at least one firmware storage block included in the at least one memory.
In the same field of endeavor (e.g., temperature-based memory operations), Falik teaches wherein the controller (Figure 4, item 440) is configured to perform booting (Figure 5, item 534, Column 5, lines 28-30; i.e., resetting the computer after the particular firmware is selected) by reading (Figure 5, item 528, Column 1, lines 10-17; i.e., by selecting one of the firmwares 420 or 422 to boot up the computer, it necessarily would include reading that selected firmware so that the booting can be successfully completed) a first firmware in the first temperature range (e.g., when the temperature is in a normal range), and perform booting by reading a second firmware in the second temperature range (Column 5, lines 31-43 and Column 6, lines 18-31; e.g., when the temperature is out of range), the first and second firmwares being stored in at least one firmware storage block included in the at least one memory (Figure 4, items 420 and 422, Column 4, lines 51-62; i.e., two different BIOS [which is a type of firmware] images 420 and 422 can be stored in a single memory [the claimed “firmware storage block”]).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Falik’s teachings of temperature-based memory operations with the teachings of Oh, for the purpose of improving the reliability of the computer and further to include extra features when a temperature is desirable (see Falik, Column 1, lines 18-28).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Oh as applied to claim 13 above, and further in view of Cho.
Regarding Claim 17, Oh does not expressly disclose wherein the controller is configured to perform a read retry operation when a read operation according to a read command externally received while performing the background operation, fails, and
wherein a number of read retry operations performed in the second temperature range is greater than a number of read retry operations performed in the first temperature range.
In the same field of endeavor (e.g., temperature-based memory operations), Cho teaches wherein the controller is configured to perform a read retry operation when a read operation according to a read command externally received while performing the background operation, fails (paragraphs 0153-0154), and
wherein a number of read retry operations performed in the second temperature range is greater than a number of read retry operations performed in the first temperature range (paragraph 0155; i.e., the number of read retry operations can increase based on different threshold voltages; as stated in Oh, the threshold voltages of memory cells correspond to different temperatures [see Oh, paragraph 0072]).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Cho’s teachings of temperature-based memory operations with the teachings of Oh, for the purpose of minimizing degradation of reading performance due to a read retry operation in the situation in which the threshold voltage distribution deteriorates (see Cho, paragraph 0006).
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Falik and Oh.
Regarding Claim 18, Falik discloses a controller (Figure 4, item 440 with item 450) comprising:
a booting controller (Figure 4, item 440) configured to perform booting (Figure 5, item 534, Column 5, lines 28-30; i.e., resetting the computer after the particular firmware is selected), based on status information of the memory (Figure 4, item 446, Column 5, lines 39-43; i.e., the status being a measured temperature of the memory), by reading (Figure 5, item 528, Column 1, lines 10-17; i.e., by selecting one of the firmwares 420 or 422 to boot up the computer, it necessarily would include reading that selected firmware so that the booting can be successfully completed) a first firmware from a memory or by reading a second firmware from the memory (Figure 4, items 420 and 422, Column 4, lines 51-62; i.e., two different BIOS [which is a type of firmware] images 420 and 422 can be stored in a single memory [the claimed “firmware storage block”]).
Falik does not expressly disclose a background operation controller configured to control a background operation of the external memory.
In the same field of endeavor (e.g., temperature-based memory operations), Oh teaches a background operation controller (Figure 1, item 300) configured to control a background operation of the external memory (Figure 1, item BOU, paragraph 0060).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Oh’s teachings of temperature-based memory operations with the teachings of Falik, for the purpose of ensuring high operational reliability of the memory device (see Oh, paragraph 0004).
Regarding Claim 19, Falik discloses wherein the booting controller is configured to acquire temperature information as the status information (Figure 4, item 446, Column 5, lines 39-43), perform booting by reading the first firmware when the temperature information is within a first temperature range (Column 5, lines 31-43 and Column 6, lines 18-31; i.e., the first temperature range is the temperature range in which the first firmware image [e.g., BIOS image A 420] is selected), and perform booting by reading the second firmware when the temperature information is within a second temperature range different from the first temperature range (Column 5, lines 31-43 and Column 6, lines 18-31; i.e., the second temperature range is the temperature range in which the second firmware image [e.g., BIOS image B 422] is selected).
Regarding Claim 20, Oh teaches wherein the background operation controller is configured to process an external command received during the background operation (paragraph 0058; i.e., a command can be received from a host), and
wherein a processing delay time required to process an external command received during the background operation in the second temperature range is greater than a processing delay time required to process an external command received during the background operation in the first temperature range (paragraph 0086; i.e., background operations may be delayed if the measured temperature is within a certain range, which would necessarily delay the processing of other incoming commands [e.g., from the host]; in addition, the reference clock of the memory device can be lowered in order to reduce the temperature, which would also delay processing of external commands).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure because each reference discloses a method of adjusting parameters of the system based on an identified temperature.
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/FAISAL M ZAMAN/ Primary Examiner, Art Unit 2175