Prosecution Insights
Last updated: May 29, 2026
Application No. 18/824,795

STORAGE DEVICE

Non-Final OA §102
Filed
Sep 04, 2024
Priority
Mar 22, 2024 — JP 2024-046152
Examiner
ALROBAIE, KHAMDAN N
Art Unit
2824
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kioxia Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
556 granted / 646 resolved
+18.1% vs TC avg
Minimal +3% lift
Without
With
+2.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
23 currently pending
Career history
669
Total Applications
across all art units

Statute-Specific Performance

§101
3.4%
-36.6% vs TC avg
§103
59.2%
+19.2% vs TC avg
§102
18.2%
-21.8% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 646 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 09/04/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). Election/Restrictions Applicant’s election without traverse of Species I (claims 1-9 and 13-16) in the reply filed on 04/02/2026 is acknowledged. However, claims 17-18 and 21-22 are broader claims than the elected claims. Therefore, these claims have been examined with the elected claims. Claims 10-12 and 19-20 are still withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-9, 13-18 and 21-22 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Iwasaki et al. (US 2024/0099153 A1). Regarding claim 1, Iwasaki teaches a storage device comprising: a plurality of memory cells (Fig. 1, memory cells MC) each including: a first conductive layer (Fig. 2, upper electrode 30), a second conductive layer (Fig. 2, lower electrode 10), a third conductive layer (Fig. 2, intermediate electrode 20) between the first and second conductive layers, a switching layer (Fig. 2, switching later 50) between the first and third conductive layers, and a variable resistance (Fig. 2, variable resistance 40) layer between the second and third conductive layers, wherein the switching layer includes at least one first region and at least one second region, the first region includes at least: a first element selected from a group consisting of zirconium, yttrium, tantalum, lanthanum, cerium, titanium, hafnium, magnesium, and aluminum (Fig. 2, first area 51, see ¶0044), and a second element selected from a group consisting of oxygen, sulfur, and selenium (Fig. 2, first area 51, see ¶0045), the second region (Fig. 2, first area 53) includes at least: the first element, a third element selected from a group consisting of sulfur, selenium, and tellurium, an atomic number of the third element being greater than an atomic number of the second element, and a fourth element selected from a group consisting of sulfur, selenium, and tellurium (¶0059 and ¶0060), and an atomic concentration of a fifth element in the second region is higher than an atomic concentration of the fifth element in the first region, the fifth element being selected from a group consisting of zinc, tin, gallium, indium, bismuth, magnesium, and calcium (¶0068, the atomic concentration of the additive metal element in area 53 is higher than area 51, ¶0068). Regarding claim 2, Iwasaki further teaches the storage device according to claim 1, wherein the atomic concentration of the fifth element in the first region is zero (the atomic concentration for the additive metal is less than 1%, where zero is less than 1%, see ¶0103). Regarding claim 3, Iwasaki further teaches the storage device according to claim 1, wherein the first and second regions are alternately disposed along a first direction from the first conductive layer toward the second conductive layer (Fig. 2). Regarding claim 4, Iwasaki further teaches the storage device according to claim 1, wherein the first element is zirconium (¶0059). Regarding claim 5, Iwasaki further teaches the storage device according to claim 1, wherein the fourth element is tellurium, and the fifth element is zinc (¶0059). Regarding claim 6, Iwasaki further teaches the storage device according to claim 1, wherein the first region includes a compound of the first and second elements (¶0044 t0 ¶0045), and the second region includes a compound of the first and third elements and a compound of the fourth and fifth elements (¶0059 to ¶0065). Regarding claim 7, Iwasaki further teaches the storage device according to claim 1, wherein the variable resistance layer includes a magnetic tunnel junction (Fig. 3, 40 is MTJ, see ¶0034). Regarding claim 8, Iwasaki further teaches the storage device according to claim 1, wherein a resistance value of the variable resistance layer changes when a predetermined voltage is applied thereto, and a current that flows through the switching layer changes non-linearly when a voltage greater than or equal to a threshold voltage is applied thereto (Fig. 4, non-linearly current when voltage greater than or equal to Vth is applied, see ¶0084). Regarding claim 9, Iwasaki further teaches the storage device according to claim 1, further comprising: a plurality of first wires; and a plurality of second wires that intersect with the first wires, wherein the memory cells are provided at intersections of the first and second wires (Fig. 2, lines 103 and 102). Regarding claims 13-16, the claims have similar limitations as claim 1-9 except the claims recite “a band gap of the second material is narrower than a band gap of the first material.” However, Iwasaki teaches using the same materials for the first and second material as described in claim 1. Therefore, the materials will shows the same characteristics for the band gap. Regarding claims 17-18, the claims have similar limitations as claims 1-9 except the claims are written in a broader format. Therefore, the claims are rejected under the same grounds of rejection. Regarding claims 21-22, the claims have similar limitations as claims 13-16 except the claims are written in a broader format. Therefore, the claims are rejected under the same grounds of rejection. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAMDAN N ALROBAIE whose telephone number is (571)270-7099. The examiner can normally be reached Monday to Thursday (8AM till 6PM). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Richard Elms can be reached at (571) 272-1869. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Khamdan N. Alrobaie/Primary Examiner, Art Unit 2824
Read full office action

Prosecution Timeline

Sep 04, 2024
Application Filed
May 06, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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IN-MEMORY COMPUTATION SYSTEM USING A SEGMENTED MEMORY ARCHITECTURE WITH LOCAL MEMORY ARRAY SELECTION FOR SIMULTANEOUSLY PERFORMING MULTIPLE INDEPENDENT OPERATIONS
2y 8m to grant Granted May 19, 2026
Patent 12626744
MAGNETIC MEMORY DEVICE
2y 2m to grant Granted May 12, 2026
Patent 12626774
DISTRIBUTED POWER SUPPLY SWITCHING CIRCUIT FOR EFUSE MEMORY
1y 11m to grant Granted May 12, 2026
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1y 9m to grant Granted May 12, 2026
Patent 12609168
OFFSET VOLTAGE BASED OPERATION METHOD OF MEMORY SYSTEM, DATA READ METHOD OF MEMORY AND MEMORY SYSTEM
2y 2m to grant Granted Apr 21, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
89%
With Interview (+2.7%)
2y 2m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 646 resolved cases by this examiner. Grant probability derived from career allowance rate.

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