Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 1, 7, and 20 are objected to because of the following informalities:
Claim 1, line 7, “electron component” should read “electronic component”
Claim 7, line 15, “The semiconductor package of claim 5”, should read “the semiconductor package of claim 5, wherein”
Claim 20, line 23, “and the second sidewall as a curved surface.” should read “and the second sidewall has a curved surface.”
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6 and 10-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (US Patent Pub 20210066206) in view of Kiwanami et al. (US Patent Pub 20140360765 A1 and) Sanchez et al. (US Patent Pub 20200020614 A1).
Regarding Claim 1, Oh teaches a semiconductor package comprising:
a semiconductor chip and an electronic component mounted on a substrate (Fig. 2A
semiconductor chip 122 and electronic component 123 mounted on substrate 110. Paragraph 0038 teaches 122 can be a passive device);
and a molding layer disposed on the substrate and covering the semiconductor chip and the electronic component (Fig. 2A, molding layer 150 disposed on substrate 110 and covering the semiconductor chip 122 and electronic component 123).
Oh fails to teach the electronic component comprises a textured or patterned surface.
However, Kiwanami teaches a semiconductor package device having an electronic component, wherein the electronic component comprises a textured or patterned surface (Kiwanami, fig. 1 and paragraph 0066 teaches electronic component 40 comprises a rough surface).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Kiwanami into the method of Oh by forming the semiconductor package device having an electronic component, wherein the electronic component comprises a textured or patterned surface. The ordinary artisan would have been motivated to modify Oh in the manner set forth above for at least the purpose of increasing adhesiveness between the electronic component and the interlayer insulating layer (Kiwanami, paragraph 0091).
While Oh in view of Kiwanami teaches the semiconductor package device described above, Oh in view of Kiwanami fail to teach the device wherein the electron component comprises a plurality of grooves, wherein the plurality of grooves are disposed on a surface of the electronic component, wherein the plurality of grooves have a first width at an entrance portion of the plurality of grooves and a second width greater than the first width below the entrance portion, and wherein the molding layer is disposed in the plurality of grooves.
However, Sanchez teaches a semiconductor package device comprising components connected by a plurality of grooves, wherein the plurality of grooves has a first width at an entrance portion of the plurality of grooves and a second width greater than the first width below the entrance portion, and wherein the molding layer is disposed in the plurality of grooves (Sanchez, Fig. 11 teaches a body portion 76 with a plurality of grooves 112 having a first width W3 at an entrance portion of the plurality of grooves 112 and a second width W4 greater than the first width below the entrance portion. Paragraph 0049 teaches plurality of grooves 90 (which are subsequently formed into grooves 112 described in fig. 11) are formed at surface region 38 (see fig. 6). Paragraph 0031 teaches surface region 38 utilizes the grooves formed in fig. 11 to bond components of the semiconductor package. Paragraph 0056 teaches the mold compound fills the trenches 108 of the plurality of grooves 112).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Sanchez into the method of Oh in view of Kiwanami by forming the semiconductor package device comprising components connected by a plurality of grooves, wherein the plurality of grooves has a first width at an entrance portion of the plurality of grooves and a second width greater than the first width below the entrance portion, and wherein the molding layer is disposed in the plurality of grooves. The ordinary artisan would have been motivated to modify Oh in view of Kiwanami in the manner set forth above for at least the purpose of reducing the likelihood of delamination (Sanchez paragraph 0056).
Regarding Claim 2, Oh in view of Kiwanami and Sanchez teaches the semiconductor package of claim 1,
wherein the electronic component comprises:
a body portion (Kiwanami, fig. 1, body portion 41);
and a first external electrode and a second external electrode that are separated from each other along a first direction and connected to the body portion (Kiwanami, fig. 1, first external electrode 42 and second external electrode 42B separated along a first direction (along the edge of the material spacing apart the grooves) and connected to body portion 41),
wherein the plurality of grooves are disposed on the body portion (Kiwanami, Paragraph 0042 teaches the surfaces of electronic component 40 are roughened. Sanchez, fig. 11 teaches a plurality of grooves 112. The combination of Kiwanami in view of Sanchez teaches a plurality of grooves disposed on the body portion of the electronic component).
Regarding Claim 3, Oh in view of Kiwanami and Sanchez teaches the semiconductor package of claim 2, wherein the plurality of grooves have a shape extending in a second direction different from the first direction (Sanchez, fig. 11 shows plurality of grooves 112 have trenches 108 that extend in a second direction (into the material, perpendicular to the first direction)),
and the plurality of grooves are separated from each other along the first direction (Sanchez, fig. 11, the grooves 112 are separated in a direction perpendicular to the second direction).
Regarding Claim 4, Oh in view of Kiwanami and Sanchez teaches the semiconductor package of claim 3, wherein each of the plurality of grooves has a first sidewall and a second sidewall facing each other along the first direction (Sanchez, Fig. 11, the first and second sidewalls (see annotated figure below) 23 of the plurality of grooves are facing each other).
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Regarding Claim 5, Oh in view of Kiwanami and Sanchez teaches the semiconductor package of claim 4, wherein at least one of the first sidewall or the second sidewall is a sloped wall that is inclined with respect to the surface of the body portion (Sanchez, fig. 11 teaches the first sidewall (see annotated figure above is sloped at an incline with respect to the surface of the body portion 76).
Regarding Claim 6, Oh in view of Kiwanami and Sanchez teaches the semiconductor package of claim 5, wherein the first sidewall and the second sidewall are sloped walls that are inclined in different directions from each other with respect to the body portion (Sanchez, fig. 11 (see annotated figure above) teaches the first sidewall and the second sidewall are sloped walls that are inclined in different directions from each other with respect to the body portion 76).
Regarding Claim 10, Oh teaches a semiconductor package manufacturing method comprising:
forming an electronic component (Fig. 2A, electronic component 123);
mounting a semiconductor chip and the electronic component on the substrate (Fig. 2A, semiconductor chip 122 and electronic component 123 are mounted on substrate 110. Paragraph 0038 teaches 122 can be a passive device);
and forming, on the substrate, a molding layer covering the semiconductor chip and the electronic component (Fig. 2A teaches a molding layer 150 on substrate 110 and covering the semiconductor chip 122 and electronic component 123).
Oh fails to teach the patterning or texturing of the electronic component.
However, Kiwanami teaches a method of making a semiconductor package device, wherein the surfaces of the electronic component are roughened (Kiwanami, paragraph 0091 teaches the roughening process of the surface of electronic component 40).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Kiwanami into the method of Oh by forming the semiconductor package device having an electronic component, wherein the surfaces of the electronic component are roughened. The ordinary artisan would have been motivated to modify Oh in the manner set forth above for at least the purpose of increasing adhesiveness between the electronic component and the interlayer insulating layer (Kiwanami, paragraph 0091).
While Oh in view of Kiwanami teaches the method of making a semiconductor package device described above, Oh in view of Kiwanami fail to teach the device wherein grooves are formed on a surface of the electronic component, wherein the plurality of grooves are disposed on a surface of the electronic component, wherein the plurality of grooves have a first width at an entrance portion of the plurality of grooves and a second width greater than the first width below the entrance portion, and wherein the molding layer is formed in the plurality of grooves.
However, Sanchez teaches a semiconductor package comprising components, wherein grooves are formed to connect the components, wherein the plurality of grooves has a first width at an entrance portion of the plurality of grooves and a second width greater than the first width below the entrance portion, and wherein the molding layer is formed in the plurality of grooves (Sanchez, Fig. 11 teaches the formation of a plurality of grooves 112 having a first width W3 at an entrance portion of the plurality of grooves 112 and a second width W4 greater than the first width below the entrance portion on a body portion 76. Paragraph 0049 teaches plurality of grooves 90 (which are subsequently formed into grooves 112 described in fig. 11) are formed at surface region 38 (see fig. 6). Paragraph 0031 teaches surface region 38 utilizes the grooves formed in fig. 11 to bond components of the semiconductor package. Paragraph 0056 teaches the mold compound fills the trenches 108 of the plurality of grooves 112).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Sanchez into the method of Oh in view of Kiwanami by forming the semiconductor package wherein grooves are formed to connect the components, wherein the plurality of grooves has a first width at an entrance portion of the plurality of grooves and a second width greater than the first width below the entrance portion, and wherein the molding layer is formed in the plurality of grooves. The ordinary artisan would have been motivated to modify Oh in view of Kiwanami in the manner set forth above for at least the purpose of reducing the likelihood of delamination (Sanchez paragraph 0056).
Regarding Claim 11, Oh in view of Kiwanami and Sanchez teaches the semiconductor package manufacturing method of claim 10, wherein
the electronic component comprises:
a body portion (Kiwanami, fig. 1, body portion 41);
and a first external electrode and a second external electrode that are separated from each other along a first direction and connected to the body portion (Kiwanami, fig. 1, first external electrode 42 and second external electrode 42B separated along a first direction (direction along edge of material in which the grooves are spaced apart) and connected to body portion 41),
and the plurality of grooves are formed on the body portion (Kiwanami, Paragraph 0042 teaches the surfaces of electronic component 40 are roughened. Sanchez, fig. 11 teaches a plurality of grooves 112. The combination of Kiwanami in view of Sanchez teaches a plurality of grooves disposed on the body portion of the electronic component).
Regarding Claim 12, Oh in view of Kiwanami and Sanchez teaches the semiconductor package manufacturing method of claim 11, wherein:
the plurality of grooves have a shape extending in a second direction that is different from the first direction (Sanchez, fig. 11 shows plurality of grooves 112 have trenches 108 that extend in a second direction (into the material to form the grooves)),
and the plurality of grooves are separated from each other along the first direction (Sanchez, fig. 11, the grooves 112 are separated in a direction perpendicular to the second direction).
Regarding Claim 13, Oh in view of Kiwanami and Sanchez teaches the semiconductor package manufacturing method of claim 12, wherein forming the plurality of grooves comprises emitting a laser from a side of the body portion along the second direction through a laser supplying unit (Sanchez, paragraph 0040 teaches the plurality of grooves may be formed by a laser supplying unit to perform a laser drilling process. Fig. 7 teaches the grooves travel along the second direction, and therefore the laser supplying unit would be emitted from a side of the body portion along the second direction).
Regarding Claim 14, Oh in view of Kiwanami and Sanchez teaches the semiconductor package manufacturing method of claim 13, wherein the laser supply unit moves along the first direction to supply the laser (Sanchez, fig. 7 teaches the plurality of grooves psaced apart in the first direction, indicating that the laser supply unit moved along the first direction to supply the laser and form the grooves).
Regarding Claim 15, Oh in view of Kiwanami and Sanchez teaches the semiconductor package manufacturing method of claim 13, wherein each of the plurality of grooves has a first sidewall and a second sidewall facing each other along the first direction, and the first sidewall and the second sidewall are sloped walls that are inclined in different directions with respect to a surface of the body portion (Sanchez, fig. 11 (see annotated figure below) teaches a plurality of grooves having a first sidewall and a second sidewall that are sloped walls that are inclined in different directions from each other with respect to the body portion 76 and facing each other along the first direction).
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Claim(s) 7 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable Oh in view of Kiwanami and Sanchez as applied to claims 1-6 and 10-15 above, and further in view of Elliot et al. (US Patent Pub 20060220187 A1)
Regarding Claim 7, Oh in view of Kiwanami and Sanchez teaches the semiconductor package of claim 5.
Oh in view of Kiwanami and Sanchez fails to teach the semiconductor package wherein an angle between the first sidewall and the surface of the body portion is different from an angle between the second sidewall and the surface of the body portion.
However, Elliot teaches a package semiconductor device having components connected by grooves, wherein an angle between the first sidewall and the surface of the body portion is different from an angle between the second sidewall and the surface of the body portion (Elliot, fig. 6 teaches an angle between the first sidewall and the surface of the body portion is different from an angle between the second sidewall and the surface of the body portion 2 (see annotated figure below).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Elliot into the method of Oh in view of Kiwanami and Sanchez by forming the semiconductor package device wherein an angle between the first sidewall and the surface of the body portion is different from an angle between the second sidewall and the surface of the body portion. The ordinary artisan would have been motivated to modify Oh in view of Kiwanami and Sanchez in the manner set forth above for at least the purpose of reducing delamination between components (Elliot, paragraph 0024).
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Regarding Claim 8, Oh in view of Kiwanami and Sanchez and in further view of Elliot teaches the semiconductor package of claim 7, wherein the first sidewall is the sloped wall and second side wall is substantially perpendicular to the surface of the body portion (Elliot, fig. 6, see annotated figure above).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh in view of Kiwanami and Sanchez as applied to claims 1-6 and 10-15 above, and further in view of Park et al. (US Patent Pub 20110042797 A1, hereafter referred to as Park 797).
Regarding Claim 9, Oh in view of Kiwanami and Sanchez teaches the semiconductor package of claim 4.
Oh in view of Kiwanami and Sanchez fails to teach the semiconductor device wherein each of the first sidewall and the second sidewall have a curved surface.
However, Park 797 teaches a semiconductor package device wherein each of the first sidewall and the second sidewall have a curved surface (Park 797, fig. 2D teaches a first sidewall and second sidewall (see annotated figure below) having a curved surface).
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It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Park into the method of Oh in view of Kiwanami and Sanchez by forming the semiconductor device wherein each of the first sidewall and the second sidewall have a curved surface. The ordinary artisan would have been motivated to modify Oh in view of Kiwanami and Sanchez for at least the purpose of reducing the size of the semiconductor package (Park 797, Abstract).
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh in view of Kiwanami and Sanchez as applied to claims 1-6 and 10-15 above, and further in view of Han et al. (US Patent Pub 20160013174 A1).
Regarding Claim 16, Oh in view of Kiwanami and Sanchez teaches the semiconductor package manufacturing method of claim 12, wherein the method comprises utilizing a blade to form portions of the package device (Sanchez, paragraph 0040).
Oh in view of Kiwanami and Sanchez fail to specifically teach the method wherein forming the plurality of grooves comprises: forming a plurality of preliminary grooves on the surface of the body portion by using a first blade; and forming the plurality of grooves by processing the preliminary grooves by using a second blade having a different shape from the first blade.
However, Han teaches a method of manufacturing a semiconductor package device wherein
forming the plurality of grooves comprises:
forming a plurality of preliminary grooves on the surface of the body portion by using a first blade, and forming the plurality of grooves by processing the preliminary grooves by using a second blade having a different shape from the first blade (Han, paragraphs 0069-0070 and figures 2A and 2B teach utilizing a first blade 410 to form a plurality of preliminary grooves, and subsequently using a second blade 420 having a different shape than the first blade 410 to process the preliminary grooves).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Han into the method of Oh in view of Kiwanami in view of Sanchez by utilizing a method wherein forming the plurality of grooves comprises forming a plurality of preliminary grooves on the surface of the body portion by using a first blade, and forming the plurality of grooves by processing the preliminary grooves by using a second blade having a different shape from the first blade. The ordinary artisan would have been motivated to modify Oh in view of Kiwanami and Sanchez in the manner set forth above for at least the purpose of improving reliability of the semiconductor device (Han, paragraph 0086).
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh in view of Kiwanami and Sanchez as applied to claims 1-6 and 10-15 above, and further in view of Liu et al. (US Patent Pub 20210151407 A1).
Regarding Claim 19, Oh in view of Kiwanami and Sanchez teaches the semiconductor package manufacturing method of claim 12, wherein forming the plurality of grooves comprises:
forming a plurality of preliminary grooves by a first etching process on the surface of the body portion (Sanchez, paragraphs 0048-0049 teach multiple different etching process utilized to form the plurality of preliminary grooves) (which are ultimately pressed to form desired shapes for the plurality of grooves 112)).
Oh in view of Kiwanami and Sanchez fails to specifically teach processing the plurality of preliminary grooves by a second etching process that is different from the first etching process.
However, Liu teaches a method of making a package structure comprising processing the plurality of preliminary grooves by a second etching process that is different from the first etching process (Liu, paragraph 101 teaches the preliminary grooves may be formed utilizing a plasma cutting tool, followed by processing of the preliminary grooves via cutting blades to form the final grooves).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Liu into the method of Oh in view of Kiwanami and Sanchez by utilizing a manufacturing method comprising processing the plurality of preliminary grooves by a second etching process that is different from the first etching process. The ordinary artisan would have been motivated to modify Oh in view of Kiwanami and Sanchez in the manner set forth above for at least the purpose of improving package reliability and yield (Liu, paragraph 0060).
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh in view of Kiwanami, Sanchez, and Liu as applied to claim 19 above, and further in view of Park 797 (US Patent Pub 20110042797 A1).
Regarding Claim 20, Oh in view of Kiwanami, Sanchez, and Liu teaches the semiconductor package manufacturing method of claim 19.
Oh in view of Kiwanami, Sanchez, and Liu fails to teach the method wherein each of the first sidewall and the second sidewall has a curved surface.
However, Park 797 teaches a method of making a semiconductor package wherein each of the first sidewall and the second sidewall has a curved surface (Park 797, fig. 2D teaches a first sidewall and second sidewall (see annotated figure above) having a curved surface).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Park into the method of Oh in view of Kiwanami, Sanchez, and Liu by forming the semiconductor device wherein each of the first sidewall and the second sidewall have a curved surface. The ordinary artisan would have been motivated to modify Oh in view of Kiwanami, Sanchez, and Liu for at least the purpose of reducing the size of the semiconductor package (Park 797, Abstract).
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Allowable Subject Matter
Claims 17 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/V.R.G./Examiner, Art Unit 2899
/JOHN M PARKER/Primary Examiner, Art Unit 2899
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