DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cheng et al. (U.S. Patent Application Publication No. 2014/0061794).
Regarding claim 1, Cheng teaches a method for forming a semiconductor device comprising:
forming a sacrificial spacer on the upper portion of the sidewall of the fin structure (Figs. 4-5, forming sacrificial spacer 24 on the upper portion of the sidewall of the fin structure 14);
forming a doped semiconductor material on the exposed of the fin structure (Fig. 6, forming doped semiconductor material 28 on the exposed of the fin structure 14);
diffusing dopant from the doped semiconductor material to a base portion of the fin structure ([0025], last 3 lines); and
removing the sacrificial spacer (Fig. 7, the sacrificial spacer on sidewall of fin 14 is removed).
Claim 1 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Cheng et al. (U.S. Patent No. 8,932,918).
Regarding claim 1, Cheng teaches a method for forming a semiconductor device comprising:
forming a sacrificial spacer on the upper portion of the sidewall of the fin structure (Figs. 4-5, forming sacrificial spacer 24 on the upper portion of the sidewall of the fin structure 14);
forming a doped semiconductor material on the exposed of the fin structure (Fig. 6, forming doped semiconductor material 28 on the exposed of the fin structure 14);
diffusing dopant from the doped semiconductor material to a base portion of the fin structure (column 1, lines 30-31; column 4, lines 60-62); and
removing the sacrificial spacer (Fig. 7, the sacrificial spacer on sidewall of fin 14 is removed).
Pertinent Art
For the benefits of the Applicant, US-8310013-B2, US-9202915-B2, US-9390976-B2, US-10770461-B2, and US-9837440-B2, are cited on the record as being pertinent to significant disclosure through some but not all claimed features of the defined invention. In particular, the references fail to disclose the combination of limitation including “diffusing dopant from the doped semiconductor material to a base portion of the fin structure and removing the sacrificial spacer.”
Conclusion
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/VU A VU/Primary Examiner, Art Unit 2897
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