Prosecution Insights
Last updated: July 17, 2026
Application No. 18/828,352

DYNAMIC INTERFERENCE COMPENSATION FOR SOFT DECODING IN MEMORY STORAGE DEVICES

Non-Final OA §112§DOUBLEPATENT§DP
Filed
Sep 09, 2024
Priority
Mar 23, 2022 — continuation of 12/087,362
Examiner
HEISTERKAMP, JUSTIN BRYCE
Art Unit
2827
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
KIOXIA Corporation
OA Round
1 (Non-Final)
99%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 99% — above average
99%
Career Allowance Rate
76 granted / 77 resolved
+30.7% vs TC avg
Minimal +2% lift
Without
With
+2.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
8 currently pending
Career history
89
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
38.9%
-1.1% vs TC avg
§102
15.8%
-24.2% vs TC avg
§112
30.2%
-9.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 77 resolved cases

Office Action

§112 §DOUBLEPATENT §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim1 and 21 objected to because of the following informalities: Claim 1, lines 8-11, should read as, “wherein certain compensation shifts of the plurality of compensation shifts are directly determined without use of other compensation shifts of the plurality of compensation shifts . . .” Claim 1, line 13, should read as, “. . . operation [[fo]] for reading the target row.” Claim 21, lines 6-7, should read as, “wherein certain compensation shifts of the plurality of compensation shifts are directly determined without use of other compensation shifts of the plurality of compensation shifts . . .” Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 3-5, 10 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 3 recites the limitation "the certain interference states" in lines 1-2. There is insufficient antecedent basis for this limitation in the claim. Applicant is advised to amend claim 3 to read as, “. . . wherein the certain compensation shifts are determined using threshold tracking.” Alternatively, the applicant may amend claim 3 to read as, ““. . . wherein directly determined compensation shifts are determined using threshold tracking.” Claim 4 recites the limitation "the certain interference states" in line 2. There is insufficient antecedent basis for this limitation in the claim. Applicant is advised to amend this limitation as, “the interference states corresponding with the certain [directly determined] compensation shifts comprise . . .” Claim 5 recites the limitation "the certain interference states" in line 2. There is insufficient antecedent basis for this limitation in the claim. See the recommendation for claim 4 above. Claim 10 recites the limitation "the certain interference states" in 2. There is insufficient antecedent basis for this limitation in the claim. Applicant is advised to amend claim 10 to read as, “. . . wherein determining the certain [directly determined] compensation shifts comprises . . .” Claim 11 is rejected because it depends on claim 10 and, therefore, contains at least the same defect. Claim 12 recites the limitation "the certain interference states" in lines 1-2. There is insufficient antecedent basis for this limitation in the claim. See recommendation for claim 10 above. Claim 23 recites the limitation "the certain interference states" in lines 1-2. There is insufficient antecedent basis for this limitation in the claim. Applicant is advised to amend claim 23 to read as, “. . . wherein the certain compensation shifts are determined using threshold tracking.” Alternatively, the applicant may amend claim 23 to read as, ““. . . wherein directly determined compensation shifts are determined using threshold tracking.” Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 4-6 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 15-16 and 19-20, respectively, of U.S. Patent No. 12,087,362. Although claims 1 of the instant application and claim 15 of U.S. Patent No. 12,087,362 at issue are not identical, they are not patentably distinct from each other because claim 15 of U.S. Patent No. 12,087,362 discloses the structural elements required by claim 1 in the instant application (the difference between “a target row” and “a target row of memory blocks” is a matter of memory design choice, wherein memory blocks are also well-known in the art to share a “target row” or word line), and the functional limitations associated with the circuit configuration are effectively the same. That is, Claim 15 of U.S. Patent No. 12,087,362 discloses a circuit configured to determine a plurality of compensation shifts respectively corresponding to the plurality of interference states, wherein certain of the plurality of compensation shifts are directly determined without use of other of the plurality of compensation shifts (“determine compensation shifts for the plurality of interference states by determining a compensation shift for each of two or more interference states of the plurality of interference states”), and at least one of the compensation shifts is determined using at least one of the directly determined compensation shifts (“wherein at least one of the compensation shifts is determined by extrapolating from another one of the compensation shifts”). Claims 16 and 19-20 of U.S. Patent No. 12,087,362 correspond with claims 4-6 of the instant application nearly verbatim. Claims 1-15, 18, and 20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-7 and 9-14 of U.S. Patent No. 12,087,362. Although the claims at issue are not identical, they are not patentably distinct from each other because Claim 1 of U.S. Patent No. 12,087,362 is a method claim of an apparatus corresponding to the apparatus recited in claim 1 in the instant application, wherein the function limitations recited are interpreted to be equivalent (as set forth above). Claims 2-7 and 9-14 of U.S. Patent No. 12,087,362 correspond with claims 1-13 of the instant application nearly verbatim (minor variation between claims 4-5 of U.S. Patent No. 12,087,362 and 4-5 of the instant application). Claims 14-15 and 18, and 20 of the instant application are rejected because they contain subject matter that is well-known in the art, and are obvious limitations—several of the relevant prior art references provided contain memory systems comprising memory blocks that include a plurality of cells that may be comprised of DRAM cells, and of which, pages of the memory include cells linked with the same word line. Claims 21-23 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-3 of U.S. Patent No. 12,087,362. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of U.S. Patent No. 12,087,362 discloses the structural elements required by claim 1 in the instant application (the difference between “a target row” and “a target row of memory blocks” is a matter of memory design choice, wherein memory blocks are also well-known in the art to share a “target row” or word line), and the functional limitations associated with the circuit configuration are effectively the same. That is, claim 1 of U.S. Patent No. 12,087,362 discloses a method for managing memory comprising determining a plurality of compensation shifts respectively corresponding to the plurality of interference states, wherein certain of the plurality of compensation shifts are directly determined without use of other of the plurality of compensation shifts (“determine compensation shifts for the plurality of interference states by determining a compensation shift for each of two or more interference states of the plurality of interference states”), and at least one of the compensation shifts is determined using at least one of the directly determined compensation shifts (“wherein at least one of the compensation shifts is determined by extrapolating from another one of the compensation shifts”). The subject matter of claims 2 and 3 of U.S. Patent No. 12,087,362 correspond with claims 22 and 23 of the instant application verbatim. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUSTIN BRYCE HEISTERKAMP whose telephone number is (703)756-1095. The examiner can normally be reached M-F 0800-1700. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JUSTIN BRYCE HEISTERKAMP/Examiner, Art Unit 2827 /AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
Read full office action

Prosecution Timeline

Sep 09, 2024
Application Filed
Oct 23, 2024
Response after Non-Final Action
Apr 29, 2026
Non-Final Rejection mailed — §112, §DOUBLEPATENT, §DP (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
99%
Grant Probability
99%
With Interview (+2.3%)
2y 3m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 77 resolved cases by this examiner. Grant probability derived from career allowance rate.

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