DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in India on 4/25/2024. It is noted, however, that applicant has not filed a certified copy of the IN2024110326952 application as required by 37 CFR 1.55.
Claim Objections
The claims are objected to because they include reference characters which are not enclosed within parentheses.
Reference characters corresponding to elements recited in the detailed description of the drawings and used in conjunction with the recitation of the same element or group of elements in the claims should be enclosed within parentheses so as to avoid confusion with other numbers or characters which may appear in the claims. See MPEP § 608.01(m).
Claims 1-7 are also objected to because of the following informalities:
In claim 1, “the delay circuit” is recited, which lacks antecedent basis. The examiner suggests “the delay cell”.
In claim 1, the reference character 102 is attributed to “delay cell”, which is previously designated as “100”;
In claim 2, “a plurality of NOT Gate (Inverter)” should be “a plurality of NOT gates (Inverters)”;
In claims 3-6, “at least two transmission gate (T-gate)” should be “at least two transmission gates (T-gates)”;
In claims 6-7, “at least two poly resistor” should be “at least two poly resistors”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 recites, “each of the transmission gate from the at least two transmission gate”. However, “at least two transmission gate” is recited in claim 5, whereas claim 6 depends on claim 1. Thus, the limitation lacks antecedent basis. The claim is indefinite, as it is unclear whether claim 6 is intended to depend on claim 5 including all limitations of claim 5 or merely a generic “two transmission gate”. Claim 7 is rejected for inheriting the above deficiency.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Huang et al. (US 2014/0240053, hereinafter “Huang”).
Claim 1: Huang discloses a Phase-Locked Loop (Fig.1, including oscillator 40 shown in Fig.6a), comprising:
a delay cell (the first inverter and resistor/capacitor circuit in the chain shown in Fig.6a), wherein delay cell comprises:
a main cell (the input inverter and cross-coupled pairs);
a delay compensation circuitry (the resistance/capacitor circuit, which compensates positive voltage coefficient; see [0027]), wherein the delay compensation circuitry is integrally connected with the main cell (see Fig.6a); and
a ring oscillator connected with the delay circuit (the remainder of Fig.6a), wherein the ring oscillator is configured to be supply sensitive (shown in Fig.3) and assisted with a resistor (with the resistors within the resistor/capacitor circuits; see [0027]);
wherein the ring oscillator is connected to the delay cell via the delay compensation circuitry (see Fig.6a);
wherein the ring oscillator comprises a plurality of stages (see Fig.6a), and
wherein each stage from the plurality of stages is cross-coupled with a next or an adjacent stage from the plurality of stages (see Fig.6a).
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Claim 2: Huang discloses wherein the main cell 102 comprises a plurality of NOT Gate (Inverter) (see Fig.6a).
Claim 8: Huang discloses wherein the compensation circuitry is provided within the delay cell and is positioned between a first stage and a last stage from the plurality of stages (e.g. the last stage shown in Fig.6a may be considered the “first stage”, the second stage the “last stage”, where the compensation circuit is between stages, since the ring oscillator is a loop and any arbitrary stage may be considered a “first” and “last”).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 3, 5-7, and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Huang in view of Shirao (US 2016/0301398).
Huang discloses the limitations of claims 1 and 8, as discussed above. Huang, however, discloses a fixed resistance and does not disclose the recited transfer gates. Shirao discloses a similar ring oscillator (Figs.1, 2), where the corresponding resistor (Rv1-Rv3) may be tunable by transfer gates (TM1-TM3) connected to corresponding resistors (R11-R13) and controlled by a digital control signal (MP11-MP13) in order to provide digital control of the frequency response (see [0039]). Therefore, it would have been obvious to have provided a tunable resistance, as disclosed by Shirao, as the corresponding resistors of Huang in order to have provided resistor selection for a particular frequency response.
Claim 3: in the combination discussed above, the combination discloses wherein the compensation circuitry comprises at least two transmission gate (e.g. multiple transmission gates as shown in Shirao for each resistor as shown in Huang).
Claim 5: in the combination discussed above, the combination discloses wherein the compensation circuitry having the at least two transmission gate is configured to adjust the size of the T-gate through a 3-bit code (MP11-MP13). Although Shirao does not disclose an additional bit, it has previously been held that the mere duplication of parts supports a prima facie case of the obviousness unless new and unexpected results are produced. See MPEP 2144.04.VII.B. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have duplicated a bit of Shirao resulting in a 4-bit code as the mere duplication of parts with expected results (an additional bit of control).
Claim 6: in the combination discussed above, the combination discloses wherein the compensation circuitry comprises at least two resistor (see Fig.6a of Huang), wherein each of the resistor from the at least poly resistor is connected to each of the transmission gate from the at least two transmission gate (in the combination of Huang and Shirao, the transmission gates of Shirao are provided for each resistor, providing tunability). Although Huang and Shirao do not disclose the resistor as a “poly resistor”, the examiner takes Official Notice that poly resistors are extremely well-known in the art as suitable fixed resistors, and one of ordinary skill in the art would have found such a well-known fixed resistor as suitable for the resistors required by Huang and Shirao.
Claim 7: the prior art does not explicitly disclose the resistors having a fixed resistance value of R=3.4kΩ. However, it has previously been held that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have provided a fixed resistance value of R=3.4kΩ for at least one of the poly resistors in the combination of Huang and Shirao with a well-known poly resistor as the discovery of optimum or workable ranges by routine experimentation.
Claim 9: the combination discloses wherein a first input at the first stage is connected with a first transmission gate and a second input at the first stage is connected with a second transmission gate (the transmission gates in the combination being provided with each resistor of Huang, as disclosed by Shirao, thus connected to the inputs the first stage).
Claim 10: the combination discloses wherein a first output at the last stage is connected with the first transmission gate and a second output provided at the last stage is connected with the second transmission gate (the transmission gates in the combination being provided with each resistor of Huang, as disclosed by Shirao, thus also connected to the outputs the last stage).
Claims 3-7, and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Huang in view of Robinson et al. (US 7,315,220, hereinafter “Robinson”).
Huang discloses the limitations of claims 1 and 8, as discussed above. Huang, however, discloses a fixed resistance and does not disclose the recited transfer gates. Robinson discloses a similar ring oscillator (Fig.2), where the corresponding resistor (224,226) may be tunable by transfer gates (640-648) connected to corresponding resistors (650,652) and controlled by a digital control signal (VCOARSE) in order to provide digital control of the frequency response (see col.6,16-18). Therefore, it would have been obvious to have provided a tunable resistance, as disclosed by Robinson, as the corresponding resistors of Huang, in order to have provided resistor selection for a particular frequency response.
Claim 3: in the combination discussed above, the combination discloses wherein the compensation circuitry comprises at least two transmission gate (e.g. multiple transmission gates as shown in Robinson for each resistor as shown in Huang).
Claim 4: in the combination discussed above, the combination discloses wherein, the at least two transmission gate are configured to have unequal strengths for P and N transistors (i.e. in each of the transmission gates of Robinson, the widths of the transistors are set according to their binary value, thus strengths of NMOS/PMOS of the lower bits are unequal to those of the higher bits; see col.5,63-67 of Robinson).
Claim 5: in the combination discussed above, the combination discloses wherein the compensation circuitry having the at least two transmission gate is configured to adjust the size of the T-gate through a 4-bit code (VCOARSE[4:0] of Robinson).
Claim 6: in the combination discussed above, the combination discloses wherein the compensation circuitry comprises at least two resistor (see Fig.6a of Huang), wherein each of the resistor from the at least poly resistor is connected to each of the transmission gate from the at least two transmission gate (in the combination of Huang and Robinson, the transmission gates of Robinson are provided for each resistor, providing tunability). Although Huang and Robinson do not disclose the resistor as a “poly resistor”, the examiner takes Official Notice that poly resistors are extremely well-known in the art as suitable fixed resistors, and one of ordinary skill in the art would have found such a well-known fixed resistor as suitable for the resistors required by Huang and Robinson.
Claim 7: the prior art does not explicitly disclose the resistors having a fixed resistance value of R=3.4kΩ. However, it has previously been held that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have provided a fixed resistance value of R=3.4kΩ for at least one of the poly resistors in the combination of Huang and Robinson with a well-known poly resistor as the discovery of optimum or workable ranges by routine experimentation.
Claim 9: the combination discloses wherein a first input at the first stage is connected with a first transmission gate and a second input at the first stage is connected with a second transmission gate (the transmission gates in the combination being provided with each resistor of Huang, as disclosed by Robinson, thus connected to the inputs the first stage).
Claim 10: the combination discloses wherein a first output at the last stage is connected with the first transmission gate and a second output provided at the last stage is connected with the second transmission gate (the transmission gates in the combination being provided with each resistor of Huang, as disclosed by Robinson, thus also connected to the outputs the last stage).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yuan et al. (“A Supply-Noise-Insensitive Digitally-Controlled Oscillator”) discloses providing tunable resistors in a similar ring oscillator to provide a desired frequency-supply response (see Figs.12a, 12b, 13, and 17a).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN JOHNSON whose telephone number is (571)270-1264. The examiner can normally be reached Monday - Friday, 9:00 AM - 5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menna Youssef can be reached at (571)270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/RYAN JOHNSON/Primary Examiner, Art Unit 2849