DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The abstract of the disclosure is objected to because of the following:
On line 1, the recitation “Printed circuit boards (PCBs) are a fundamental component” should be “Printed circuit boards (PCBs) are fundamental components”; and
On lines 3 - 4, the recitation “generally made of copper layers laminated onto, though, and/or between one or more non-conductive substrate layers” is unclear. Examiner suggests removing the word “though.”
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shen et al. (EP 2 519 092 A1).
Regarding claim 1, in Figure 2, Shen discloses a printed circuit board comprising: a substrate (201) forming a mechanical base for the printed circuit board; a first copper layer (202) laminated to a first side of the substrate forming a first conductive metallic paths for the printed circuit board (Figure 2); a first solder mask (203) applied over the first copper layer and the first side of the substrate to seal the first array of conductive metallic paths from an external environment (Figure 2); and a first de-coupling plane (205) printed on the printed circuit board using conductive ink.
Regarding claim 2, Shen discloses a second copper layer laminated to a second side of the substrate forming a second array of conductive metallic paths for the printed circuit board; a second solder mask applied over the second copper layer and the second side of the substrate to seal the second array of conductive metallic paths from the external environment; and a second de-coupling plane printed over the second solder mask using the conductive ink (Figure 2).
Regarding claim 3, Shen discloses a second copper layer laminated over the first de-coupling plane forming a second array of conductive metallic paths for the printed circuit board; a second solder mask applied over the second copper layer and the first printed de-coupling plane to seal the second array of conductive metallic paths from the external environment; and a second de-coupling plane printed over the second solder mask using the conductive ink (Figure 2).
Regarding claim 4, Shen discloses wherein the first de-coupling plane is printed over the first solder mask (Figure 2).
Regarding claim 5, Shen discloses wherein the first de-coupling plane is printed over a second side of the substrate (Figure 2).
Regarding claim 6, Shen discloses a second solder mask applied over the first de-coupling plane to seal the first de- coupling plane from the external environment (Figure 2).
Regarding claim 7, Shen discloses wherein the first solder mask is excluded from one or more discrete areas of the first copper layer corresponding to electrical ground, and wherein the first de-coupling plane is connected to electrical ground at the one or more discrete areas (Figure 2).
Regarding claim 8, Shen discloses wherein the conductive ink includes one or more of carbon, copper, and silver powder suspended within a printable solution (Figure 2).
Regarding claim 9, Shen discloses one or more electronic components soldered to the substrate, wherein the first de-coupling plane serves as one or both of a high-frequency current return path and a common electrical ground for low-frequency current for the one or more electronic components (Figure 2).
Regarding claim 10, Shen discloses wherein the conductive metallic paths include one or more of vias, traces, and pads on the printed circuit board (Figure 2).
Regarding claim 11, in Figures 1 and 2, Shen discloses a method of manufacturing a printed circuit board, the method comprising: providing a substrate (201) forming a mechanical base for the printed circuit board; laminating a first copper layer (202) to a first side of the substrate forming a first array of conductive metallic paths for the printed circuit board (Figure 2); applying a first solder mask (203) over the first copper layer and the first side of the substrate to seal the first array of conductive metallic paths from an external environment (Figure 2); and printing a first de-coupling plane (205) on the printed circuit board using conductive ink (carbon oil, paragraph [0031]).
Regarding claim 12, Shen discloses laminating a second copper layer to a second side of the substrate forming a second array of conductive metallic paths for the printed circuit board; applying a second solder mask over the second copper layer and the second side of the substrate to seal the second array of conductive metallic paths from an external environment; and printing a second de-coupling plane on the printed circuit board using the conductive ink (Figure 2).
Regarding claim 13, Shen discloses laminating a second copper layer over the first de-coupling plane forming a second array of conductive metallic paths for the printed circuit board; applying a second solder mask applied over the second copper layer and the first printed de-coupling plane to seal the second array of conductive metallic paths from the external environment; and printing a second de-coupling plane over the second solder mask using the conductive ink (Figure 2).
Regarding claim 14, Shen discloses wherein the first de-coupling plane is printed over the first solder mask (Figure 2).
Regarding claim 15, Shen discloses wherein the first de-coupling plane is printed over a second side of the substrate (Figure 2).
Regarding claim 16, Shen discloses applying a second solder mask over the first de-coupling plane to seal the first de- coupling plane from the external environment (Figure 2).
Regarding claim 17, Shen discloses wherein the first solder mask is excluded from one or more discrete areas of the first copper layer corresponding to electrical ground, and wherein the first de-coupling plane is connected to electrical ground at the one or more discrete areas (Figure 2).
Regarding claim 18, Shen discloses wherein the conductive ink includes one or more of carbon, copper, and silver powder suspended within a printable solution (Figure 2).
Regarding claim 19, in Figures 2 and 3, Shen discloses a printed circuit board comprising: a substrate (201) forming a mechanical base for the printed circuit board; a first copper layer (202) laminated to a first side of the substrate forming a first array of conductive metallic paths for the printed circuit board (Figure 2); a first solder mask (203) applied over the first copper layer and the first side of the substrate to seal the first array of conductive metallic paths from an external environment (Figure 2); a first carbon de-coupling plane (205) printed on the printed circuit board using conductive carbon ink (carbon oil, paragraph [0031]); a second copper layer (202, bottom layer 202, Figure 3) laminated to a second side of the substrate forming a second array of conductive metallic paths for the printed circuit board (Figure 3); a second solder mask (203, bottom solder mask 203) applied over the second copper layer and the second side of the substrate to seal the second array of conductive metallic paths from the external environment (Figure 3); and a second carbon de-coupling plane (205) printed over the second solder mask using the conductive carbon ink (carbon oil, paragraph [0031]).
Regarding claim 20, Shen discloses wherein the conductive carbon ink includes carbon powder suspended within a printable solution (Figure 2).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TREMESHA W BURNS whose telephone number is (571)270-3391. The examiner can normally be reached Monday-Friday 8am - 4:30 pm EST.
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TREMESHA W. BURNS
Primary Examiner
Art Unit 2847
/TREMESHA W BURNS/Primary Examiner, Art Unit 2847
Prosecution Insights