DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 7-8, and 10-11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Komatsubara et al. (US 20030172526 hereinafter Komatsubara).
In regards to claim 1, Komatsubara discloses;” A method for manufacturing a wiring substrate (abstract), comprising forming a resist layer on a support body (paragraph 0003); exposing the resist layer; developing the exposed resist layer to form an opening in the resist layer; forming a metal wiring in the opening; and removing the resist layer after the metal wiring is formed, wherein, in the exposing of the resist layer, a wiring exposure pattern that corresponds to the metal wiring (paragraphs 0030-0033, Fig. 9b), and a dummy exposure pattern that does not correspond to the metal wiring are exposed to the resist layer (Fig. 9b (7) shown), and at least a part of the dummy exposure pattern is located in a region within 200 µm from an end portion of the wiring exposure pattern (In Fig. 8 the distance from active conductors (6) to the dummy layer (7) is 100 micrometers and as shown in Fig. 9b the separation of the dummy layer is uniform around conductors (6) therefore the dummy exposure is within 200 micrometers).”
In regards to claim 2, Komatsubara discloses;” The method for manufacturing a wiring substrate according to claim 1, wherein a part of the resist layer exposed by the dummy exposure pattern is fragmented and removed in the removing of the resist layer (paragraph 0008).”
In regards to claim 7, Komatsubara discloses;” The method for manufacturing a wiring substrate according to claim 1, wherein the dummy exposure pattern is a pattern capable of exposing the resist layer so that a length of a long side of a fragmented striped resist piece becomes 100 µm or less (Fig. 8).”
In regards to claim 8, Komatsubara discloses;” The method for manufacturing a wiring substrate according to claim 1, wherein the dummy exposure pattern surrounds at least a part or the entirety of the wiring exposure pattern (Fig. 9b (shown)).”
In regards to claim 10, Komatsubara discloses;” The method for manufacturing a wiring substrate according to claim 1, wherein, in the exposing of the resist layer, the resist layer is exposed by using a reticle including the wiring exposure pattern and the dummy exposure pattern (paragraphs 0002, 0003 where the resist process is an additive method, a semi-additive method which would require a reticle).”
In regards to claim 11, Komatsubara discloses;” The method for manufacturing a wiring substrate according to claim 1, wherein, in the exposing of the resist layer, drawing is performed on the basis of an exposure drawing data including the wiring exposure pattern and the dummy exposure pattern to expose the resist layer (paragraphs 0005-0007 where the dummy lines are formed with the circuit patterns).”
Allowable Subject Matter
Claims 3-6 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 12-15 are allowed.
REASON FOR ALLOWANCE
The following is a statement of reasons for the indication of allowable subject matter: The prior art taken singularly or in combination fails to anticipate or fairly suggest the limitation of the independent claim, in such a manner that a rejection under 35 U.S.C. 102 or 103 would be proper. The prior art fails to teach a combination of all the features as presented in independent claim 12 with the allowable feature being:” A wiring substrate, comprising: a support body; a plurality of metal wirings placed on the support body; and at least one dummy metal structure that surrounds at least a part of the plurality of metal wirings, wherein a width of the metal wiring in a short direction is 20 µm or less, at least a part of the dummy metal structure is located in a region within 200 µm from a wiring electrode closest to the dummy metal structure among the plurality of metal wirings, and the dummy metal structure includes at least one among a mesh-shaped dummy metal structure in which a plurality of lines are arranged in a lattice shape, an inner dummy metal structure located between the plurality of metal wirings, and a dummy metal structure in which a plurality of dot-shaped electrodes are arranged to surround at least a part of the plurality of metal wirings.”
Therefore, claim 12 is allowed.
The following is a statement of reasons for the indication of allowable subject matter: The prior art taken singularly or in combination fails to anticipate or fairly suggest the limitation of the independent claim, in such a manner that a rejection under 35 U.S.C. 102 or 103 would be proper. The prior art fails to teach a combination of all the features as presented in independent claim 13 with the allowable feature being:” A reticle for exposing a resist, comprising: a wiring exposure pattern; and a dummy exposure pattern in which at least a part is located within 200 µm from an end portion of the wiring exposure pattern, wherein the dummy exposure pattern includes at least one among a mesh shape in which a plurality of lines are arranged in a lattice shape, and a dot shape in which a plurality of dots are arranged.”
Therefore, claim 13 is allowed.
The following is a statement of reasons for the indication of allowable subject matter: The prior art taken singularly or in combination fails to anticipate or fairly suggest the limitation of the independent claim, in such a manner that a rejection under 35 U.S.C. 102 or 103 would be proper. The prior art fails to teach a combination of all the features as presented in independent claim 15 with the allowable feature being:” A non-transitory computer-readable storage medium storing an exposure drawing data structure for an exposure apparatus for exposing a resist layer, the exposure drawing data structure comprising: wiring exposure data configured to draw a wiring exposure pattern by the exposure apparatus; and dummy exposure data configured to draw a dummy exposure pattern by the exposure apparatus, at least a part of the dummy exposure pattern being located within 200 µm from an end portion of the wiring exposure pattern, wherein the dummy exposure pattern includes at least one of a mesh shape in which a plurality of lines are arranged in a lattice shape, and a dot shape in which a plurality of dots are arranged.”
Therefore, claim 15 is allowed.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL F MCALLISTER whose telephone number is (571)272-2453. The examiner can normally be reached Monday-Friday 7 AM-4 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at 571-272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL F MCALLISTER/Examiner, Art Unit 2847
/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
Prosecution Insights