Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application No. 18/837,968 filed on August 13, 2024.
Priority
3. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
4. Acknowledgement is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Specification
5. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE COMPRISING TRANSPARENT MEMBER AND SEALING RESIN PORTION, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE”.
Claim Objections
6. Claims 9-10, 15 are objected to because of the following informalities: the claims should be recited as follows to avoid indefiniteness, typo and/or smooth flow of claim languages:
9. (Currently Amended) A semiconductor device comprising:
a substrate;
a semiconductor element that is provided on the substrate;
a connection member that electrically connects the substrate and the semiconductor element;
a transparent member that is provided on an opposite side to a side of the substrate with respect to the semiconductor element; and
a sealing resin portion that supports the transparent member with respect to the substrate, seals surroundings between the substrate and the transparent member, and forms a cavity between the semiconductor element and the transparent member together with the semiconductor element and the transparent member, wherein the
10. (Currently Amended) The semiconductor device according to claim 9, further comprising a light-blocking film portion that is provided on a surface on a side of the transparent member facing the semiconductor element, covers an upper side of a connection portion of at least the connection member with respect to the semiconductor element, and restricts the intrusion of the resin material for forming the sealing resin portion into the inside of the transparent member.
15. (Currently Amended) A manufacturing method for a semiconductor device, the method comprising:
providing a semiconductor element on a substrate;
providing a connection member that electrically connects the substrate and the semiconductor element;
applying a sealing resin material around the semiconductor element on the substrate so as to cover at least a side surface of the semiconductor element and a connection portion of the connection member with respect to the substrate;
mounting
curing the sealing resin material.
Appropriate corrections are needed.
Claim Rejections - 35 USC § 103
7. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
10. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
a. Determining the scope and contents of the prior art.
b. Ascertaining the differences between the prior art and the claims at issue.
c. Resolving the level of ordinary skill in the pertinent art.
d. Considering objective evidence present in the application indicating obviousness or non-obviousness.
11. Claims 9, 14 are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh et al. (US 2020/0312897 A1) in view of Honda (US 2009/0166784 A1).
Regarding independent claim 9, Hsieh et al. teaches a semiconductor device comprising (100, Fig. 1A):
a substrate (102, para [0021]);
a semiconductor element (104 image sensor, para [0021]) that is provided on the substrate (102);
a connection member (122 bond wire, para [0029]) that electrically connects the substrate (102) and the semiconductor element (104);
a transparent member (106, para [0021]) that is provided on an opposite side to a side of the substrate (102) with respect to the semiconductor element (104); and
a sealing resin portion (130, para [0022]) that supports the transparent member (106) with respect to the substrate (102), seals surroundings between the substrate (102) and the transparent member (106), and forms a cavity (103 empty space, para [0021]) between the semiconductor element (104) and the transparent member (106) together with the semiconductor element (104) and the transparent member (106), wherein the sealing resin portion (130) covers a side surface of the semiconductor element (104) and a connection portion of the connection member (122) with respect to the substrate (102), and exposes an entire front side (108 active area of the image sensor 104) of the semiconductor element (104).
Hsieh et al. is explicitly silent of disclosing wherein, the sealing resin portion exposes the entire front side of the semiconductor element that accepts connection of one end side of the connection member.
Honda teaches wherein (Fig. 1), the sealing resin portion (11) exposes the entire front side of the semiconductor element (2) that accepts connection of one end side of the connection member (8).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Honda, and modify the connection of the bonding wire/member of Hsieh et al. w/exposed connection end on the imaging device, in order to having highly mechanical strength (para [0097]), and reduce the pressure on the bonding wire.
Regarding independent claim 14, Hsieh et al. teaches an electronic device comprising a semiconductor device (100) that includes (Fig. 1A):
a substrate (102, para [0021]);
a semiconductor element (104 image sensor, para [0021]) that is provided on the substrate (102);
a connection member (122 bond wire, para [0029]) that electrically connects the substrate (102) and the semiconductor element (104);
a transparent member (106, para [0021]) that is provided on an opposite side to a side of the substrate (102) with respect to the semiconductor element (104); and
a sealing resin portion (130, para [0022]) that supports the transparent member (106) with respect to the substrate (102), seals surroundings between the substrate (102) and the transparent member (106), and forms a cavity (103 empty space, para [0021]) between the semiconductor element (104) and the transparent member (106) together with the semiconductor element (104) and the transparent member (106), wherein the sealing resin portion (130) covers a side surface of the semiconductor element (104) and a connection portion of the connection member (122) with respect to the substrate (102), and exposes an entire front side (108 active area of the image sensor 104) of the semiconductor element (104).
Hsieh et al. is explicitly silent of disclosing wherein, the sealing resin portion exposes the entire front side of the semiconductor element that accepts connection of one end side of the connection member.
Honda teaches wherein (Fig. 1), the sealing resin portion (11) exposes the entire front side of the semiconductor element (2) that accepts connection of one end side of the connection member (8).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Honda, and modify the connection of the bonding wire/member of Hsieh et al. w/exposed connection end on the imaging device, in order to having highly mechanical strength (para [0097]) and reduce the pressure on the bonding wire.
12. Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh et al. (US 2020/0312897 A1) in view of Honda (US 2009/0166784 A1) as applied to claim 9 above, and further in view of another embodiment (Fig. 40) of Honda (US 2009/0166784 A1).
Regarding claim 11, Hsieh et al. and Honda teach all of the limitations of claim 9 from which this claim depends.
Hsieh et al. and Honda are explicitly silent of disclosing wherein, the transparent member (106) includes a protrusion portion on a side facing the semiconductor element, the protrusion portion forming a second surface portion located on a side of the semiconductor element with respect to a first surface portion covered with the sealing resin portion.
Another embodiment of Honda (Fig. 40) teaches wherein, the transparent member (205, para [0013]) includes a protrusion portion (see the annotated figure below) on a side facing the semiconductor element (201), the protrusion portion forming a second surface portion located on a side of the semiconductor element (201) with respect to a first surface portion covered with the sealing resin portion (209).
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It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Honda, and modify the transparent member of Hsieh et al. w/ protruded side wall adjacent to the sealing portion and the imaging device, in order to secure over the light receiving region 203 and among the light receiving region 203 and the electrode terminals 206 (para [0013]).
Regarding claim 12, Hsieh et al. and Honda teach all of the limitations of claim 9 from which this claim depends.
Hsieh et al. and Honda are explicitly silent of disclosing wherein, the transparent member includes a peripheral wall portion that forms a contact portion with respect to the sealing resin portion in a region on an outer side of the semiconductor element in plan view.
Another embodiment of Honda (Fig. 40) teaches wherein, the transparent member (205) includes a peripheral wall portion (see the annotated figure below) that forms a contact portion with respect to the sealing resin portion (209) in a region on an outer side of the semiconductor element (201) in plan view (while viewing from top).
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It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Honda, and modify the transparent member of Hsieh et al. w/ protruded side wall adjacent to the sealing portion and the imaging device, in order to secure over the light receiving region 203 and among the light receiving region 203 and the electrode terminals 206 (para [0013]).
13. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Hsieh et al. (US 2020/0312897 A1) in view of Huang et al. (US 2015/0011038 A1).
Regarding independent claim 15, Hsieh et al. teaches a manufacturing method for a semiconductor device (100), the method comprising:
providing a semiconductor element (104) on a substrate (102);
providing a connection member (122) that electrically connects the substrate (102) and the semiconductor element (104);
applying a sealing resin material (130) around the semiconductor element (104) on the substrate (102) so as to cover at least a side surface of the semiconductor element (102) and a connection portion of the connection member (122) with respect to the substrate (102);
mounting on the sealing resin material, a transparent member located above the semiconductor element.
Hsieh et al. is explicitly silent of disclosing wherein, curing the sealing resin material.
Huang et al. teaches wherein (Fig. 3), curing (para [0031], [0035]) the first encapsulant layer 70.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Huang et al., while forming the sealing resin portion of Hsieh et al., in order to achieve strong surface adhesion, reliable protection against moisture and high reliability and durability.
Allowable Subject Matter
14. Claims 1-8, 13 are allowed.
15. The following is an examiner’s statement of reasons for allowance:
Claim 1: the prior art of record alone or in combination neither teaches nor makes obvious a semiconductor device, including:
…. a resin restriction portion that restricts intrusion of a resin material for forming the sealing resin portion into an inside of the semiconductor element.
Claim 13: the prior art of record alone or in combination neither teaches nor makes obvious a semiconductor device, including:
…. a resin restriction portion that restricts intrusion of a resin material for forming the sealing resin portion into an inside of the semiconductor element.
16. Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
…. restricts the intrusion of the resin material for forming the sealing resin portion into the inside of the transparent member.
Examiner’s Note
17. Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs and/or columns/lines in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
18. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIDARUL MAZUMDER whose telephone number is (571)272-8823. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
19. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DIDARUL A MAZUMDER/Primary Examiner, Art Unit 2812
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