Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Applicant is advised that should claim 1 be found allowable, claim 4 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m). Specifically, claim 4 discloses “wherein the insulating film is included in a part of the semiconductor layer facing the second region of the electrode” (emphasis added), which is interpreted as only a slight difference in wording to “an insulating film included in the semiconductor layer facing a second region of the electrode not exposed by the opening” as disclosed in claim 1 upon which claim 4 depends via claim 2.
Claim Rejections - 35 USC § 102
Claim(s) 1, 15, 17-18, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Akiyama (PGPub No. 20130288419).
Regarding claim 1, Akiyama teaches a semiconductor device comprising: a first substrate including a wiring layer having an electrode and a semiconductor layer stacked on the wiring layer; an opening included in such a manner as to penetrate the semiconductor layer in such a manner as to expose a first region of the electrode; and an insulating film included in the semiconductor layer facing a second region of the electrode not exposed by the opening (Fig. 5 points to a solid-state imaging device comprising a wiring layer 110, a pad PAD (electrode), a semiconductor substrate 101 (semiconductor layer), a pad opening region KR, and an insulating ring ZR.).
Regarding claim 15, Akiyama teaches wherein the insulating film is made of at least one selected from a group consisting of a silicon oxide, a silicon nitride, a silicon oxynitride, a silicon carbide, a silicon carbonitride, an organic insulating material, a metal oxide, a metal oxynitride, and a low dielectric constant material ([0141] points to the insulting ring ZR being formed of silicon oxide.).
Regarding claim 17, Akiyama teaches wherein the semiconductor layer includes an imaging element (Fig. 2 points to the substrate 101 (semiconductor layer) comprising a pixel area PA (imaging element).).
Regarding claim 18, Akiyama teaches wherein the electrode is electrically connected to an element located outside the semiconductor device ([0106] points to the application of a conductor such as a wire bond, a gold ball, or a probe within the pad opening area KR.).
Regarding claim 20, Akiyama teaches an electronic device on which a semiconductor device is mounted, wherein the semiconductor device comprises: a first substrate including a wiring layer having an electrode and a semiconductor layer stacked on the wiring layer; an opening included in such a manner as to penetrate the semiconductor layer in such a manner as to expose a first region of the electrode; and an insulating film included in the semiconductor layer facing a second region of the electrode not exposed by the opening (Fig. 5 points to a solid-state imaging device comprising a wiring layer 110, a pad PAD (electrode), a semiconductor substrate 101 (semiconductor layer), a pad opening region KR, and an insulating ring ZR. [0227] further points to said invention being applied to a camera or other electronic apparatuses having a solid-state imaging device such as a scanner or a copy machine.).
Claim Rejections - 35 USC § 103
Claim(s) 2-11, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Akiyama (PGPub No. 20130288419).
Regarding claim 2, Akiyama teaches wherein the insulating film is included in such a manner as to occupy 1/2 or more of the semiconductor layer facing the second region of the electrode (Fig. 5 points to the insulating ring ZR. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the size of the insulating film to be a result effective variable affecting its electrical insulation properties. Thus, it would have been obvious to modify the device of Akiyama to have the insulating film within the claimed range in order to improve its ability to electrically insulate the exposed side portion of the pad opening area KR and a chip area CA, and since optimum or workable ranges of such variables are discoverable through routine experimentation. See MPEP 2144.05(II)(B) and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.).
Regarding claim 3, Akiyama teaches wherein the insulating film is included over the entire semiconductor layer facing the second region of the electrode (Fig. 5 points to the insulating ring ZR. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the shape of the insulating film to be a result effective variable affecting its electrical insulation properties. Thus, it would have been obvious to modify the device of Akiyama to have the insulating film cover the entire surface of the semiconductor layer facing the electrode in order to improve its ability to electrically insulate the exposed side portion of the pad opening area KR and a chip area CA, and since optimum or workable ranges of such variables are discoverable through routine experimentation. See MPEP 2144.05(II)(B) and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.).
Regarding claim 4, Akiyama teaches wherein the insulating film is included in a part of the semiconductor layer facing the second region of the electrode (Fig. 5 points to the insulating ring ZR.).
Regarding claim 5, Akiyama teaches wherein a plurality of the insulating films is included in the semiconductor layer facing the second region of the electrode (Fig. 1 points to insulating rings ZR.).
Regarding claim 6, Akiyama teaches wherein the plurality of the insulating films is alternately included with the semiconductor layer interposed therebetween in a cross section of the semiconductor device taken along a stacking direction of the wiring layer and the semiconductor layer (Fig. 5 point to insulating rings ZR located along each side of the pad opening area KR and surrounded by the semiconductor substrate 101 (semiconductor layer). Additionally, it is considered obvious that one of ordinary skill in the art would form additional rings away from the pad opening area KR in order to better insulate said area and the adjacent chip area CA. The court has held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).).
Regarding claim 7, Akiyama teaches wherein each of the insulating films has a rectangular shape in the cross section (Fig. 1 points to insulating rings ZR.).
Regarding claim 8, Akiyama teaches wherein, in the cross section, a relationship between a length d of each of the insulating films along the stacking direction and a width W of each of the insulating films along a direction orthogonal to the stacking direction satisfies W/2 < d (Fig. 5 points to the insulating ring ZR. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the length and width of the insulating film to be a result effective variable affecting its electrical insulation properties. Thus, it would have been obvious to modify the device of Akiyama to have the insulating film within the claimed range(s) in order to improve its ability to electrically insulate the exposed side portion of the pad opening area KR and a chip area CA, and since optimum or workable ranges of such variables are discoverable through routine experimentation. See MPEP 2144.05(II)(B) and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.).
Regarding claim 9, Akiyama teaches wherein, in the cross section, each of the insulating films has a trapezoidal shape or a shape obtained by joining two trapezoids with either upper bases or lower bases of the trapezoids joined together (Fig. 5 points to the insulating ring ZR. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the cross-sectional shape of the insulating film(s) to be a result effective variable affecting its electrical insulation properties. Thus, it would have been obvious to modify the device of Akiyama to form each insulating film into a trapezoidal shape in order to better focus on critical regions along the insulating film(s) which would improve its ability to electrically insulate the exposed side portion of the pad opening area KR and a chip area CA. Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.).
Regarding claim 10, Akiyama teaches wherein the plurality of the insulating films is included in such a manner as to surround the opening when viewed from above the semiconductor layer (Fig. 1 points to insulating rings ZR. It is considered obvious that one of ordinary skill in the art would form additional insulating rings ZR further surrounding each pad PAD in order to improve the electrical insulation of said area. The court has held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).).
Regarding claim 11, Akiyama teaches wherein the plurality of the insulating films is included in such a manner as to extend along any side of the opening having a rectangular shape when viewed from above the semiconductor layer (Fig. 1 points to insulating rings ZR. It is considered obvious that one of ordinary skill in the art would form additional insulating rings ZR further surrounding each pad PAD in order to improve the electrical insulation of said area. The court has held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).).
Regarding claim 16, Akiyama teaches wherein the insulating film includes an air gap ([0141] points to embodiments where the guard ring GR, the alignment mark AL, and the insulation ring ZR are all formed of silicon oxide or alternatively of various appropriate materials such as an insulating material. [0112] further points to the guard ring GR using a gas such as air in addition to a solid material such as an insulating material. Thus, it is considered obvious that one of ordinary skill in the art would form an air gap in the formation of the insulation ring ZR (insulating film) in order to further lower its overall dielectric constant.).
Claim(s) 12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Akiyama in further view of Furukawa (PGPub No. 20160268380).
Regarding claim 12, Furukawa teaches wherein the insulating film is included in a lattice shape around the opening when viewed from above the semiconductor layer ([0088] points to an insulating layer 40 that is patterned to a lattice shape.). Thus, it would have been obvious to a person of ordinary skill in the art (POSITA) prior to the filing date of the claimed invention to combine the teachings of Akiyama and Furukawa, such that the insulating film is included in a lattice shape in order to better control the electrical insulation properties of the insulating film by creating a structure that selectively covers/exposes specific regions.
Regarding claim 14, Furukawa teaches wherein the plurality of the insulating films is included in dots shape around the opening when viewed from above the semiconductor layer ([0088] points to alternative embodiments where the pattern shape of the insulating layer 40 is not restricted to a lattice shape and an island shape but a dot shape, a chain shape, and a cross shape may be employed.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Akiyama and Furukawa, such that the plurality of the insulating films is included in dots shape in order to better control the electrical insulation properties of the insulating film(s) by creating a structure that selectively covers/exposes specific regions.
Claim(s) 13 is rejected under 35 U.S.C. 103 as being unpatentable over Akiyama in further view of Kuo (PGPub No. 20140008111).
Regarding claim 13, Kuo teaches wherein the insulating film is included in a spiral shape around the opening when viewed from above the semiconductor layer ([0009] points to an insulating layer 130 that is spiral-shaped.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Akiyama and Kuo, such that the insulating film is included in a spiral shape in order to better control the electrical insulation properties of the insulating film by creating a structure that selectively covers/exposes specific regions.
Claim(s) 19 is rejected under 35 U.S.C. 103 as being unpatentable over Akiyama in further view of Liu (US Patent No. 9142517).
Regarding claim 19, Akiyama teaches a second substrate on which the first substrate is stacked (Fig. 5 points to a support substrate SK.).
Akiyama fails to teach wherein the first substrate and the second substrate are bonded by bonding electrodes each included in one of the first substrate and the second substrate.
Liu teaches wherein the first substrate and the second substrate are bonded by bonding electrodes each included in one of the first substrate and the second substrate (Fig. 2A points to a bonded structure comprising a wafer 150 (first substrate), a wafer 100 (second substrate), and conductive pads 112/152 (bonding electrodes).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Akiyama and Liu, such that the first and second substrates are bonded by bonding electrodes in order to create a three dimensional integrated circuit via hybrid bonding, which provides improved integration density and other advantages such as faster speeds and higher bandwidth.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Patrick L Cullen whose telephone number is (703)756-1221. The examiner can normally be reached Monday - Friday, 8:30AM - 5PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at (571)270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PATRICK CULLEN/Assistant Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899