DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Note by the Examiner
2. For clarity, the reference to specific claim numbers are presented in bold. Cited claim limitations are presented in bold the first time they are associated with a particular prior art disclosing the cited limitations, and subsequent reference to the already disclosed claim limitations are presented un-bolded. Certain elements from prior art which are not required by the claims are also presented un-bolded if they are particularly pertinent to understanding how the references are being combined. Item-to-item matching and Examiner explanations for 102 &/or 103 rejections have been provided in parenthesis.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 1-2, 12-13, 17, and 26 are rejected under 35 U.S.C. 103 as obvious over Lu et al. (US 2021/0408488 A1), hereinafter as L1, in view of Koshihara et al. (US 2015/0102323 A1), hereinafter as K1, in view of Liu et al. (CN 109728049 A, see attached translation document), hereinafter as L2
4. Regarding Claim 1, L1 discloses a display substrate (see Figs. 1-9(b) and [0035] “silicon wafer”), comprising:
a silicon-based base substrate (element 100, see [0067] “base substrate 100”) comprising an active area (area of element AA, see [0057] “active area AA”) and an edge area (area of element EA, see [0057] “edge area (EA for short)”) surrounding the active area (see Fig. 1(b));
a plurality of sub-pixels (elements PX, see [0057] “pixel units PX”) in the active area of the silicon-based base substrate (see Fig. 1(b)), wherein the plurality of sub-pixels are arranged in an array in a first direction and a second direction (see Fig. 1(b)), at least one of the plurality of sub-pixels comprises a pixel driving circuit (element T1 see [0063] “driving transistor T1”) and a light-emitting element (element 130, see [0058] “light-emitting element 130”), the pixel driving circuit is electrically connected to the light-emitting element and configured to drive the light-emitting element to emit light (see Fig. 2 and [0063]), and wherein the pixel driving circuit comprises a first transistor (element T1), the first transistor comprises a semiconductor layer (surface layer of element 100 associated with the channel of element T1), a gate (element G, see [0073] “gate electrode G”), a source (element S, see [0073]), and a drain (element D, see [0073]);
an electronic device (see in particular Figs. 8(a)-(b) elements 12, see [0084] “voltage control circuits 12”) in the edge area of the silicon-based base substrate (see [0084] “voltage control circuits 12 located in an edge area of an array substrate”); and
a metal shielding portion (element 216, see [0075] “reflecting electrode 216”) in the edge area of the silicon-based base substrate (see in particular Fig. 7), wherein the metal shielding portion is arranged on a side of each of the layers in which the semiconductor layer, the gate, the source and the drain of the edge are respectively located away from the silicon-based base substrate (see Fig. 7).
L1 does not explicitly disclose wherein the electronic device comprises a second transistor, the second transistor comprises a semiconductor layer, a gate, a source and a drain, and the semiconductor layer, the gate, the source and the drain of the second transistor are arranged in same layers as the semiconductor layer, the gate, the source and the drain of the first transistor, respectively; and
wherein the metal shielding portion is arranged in a fragmented manner;
wherein an orthographic projection of the metal shielding portion on the silicon-based base substrate at least partially overlaps with an orthographic projection of the electronic device on the silicon-based base substrate.
K1 discloses (see in particular Figs. 1-3) an electronic device (transistors in the region of element 14, see [0051, 0076] “A driving circuit 30 is installed on the peripheral region 14”) in the edge area of the silicon-based base substrate (element 14 region, see [0051] “peripheral region 14”), wherein the electronic device comprises a second transistor (see Fig. 3 the transistor in the region 14 and 16 have the same structure, and see [0053] “transistors T (TDR, TEL, and TSL”), the second transistor comprises a semiconductor layer (surface layer of element 10 associated with the channel of the transistor), a gate (gate element G of the transistor; see [0059] “gates (GDR, GEL and GSL)” and see Fig. 4 for detailed illustration of the location of the gate), a source and a drain (see source and drain regions in the substrate element 10, and see [0059] “active regions 10A (source/drain regions) of the transistors T (TDR, TEL, and TSL)”), and the semiconductor layer, the gate, the source and the drain of the second transistor are arranged in same layers as the semiconductor layer, the gate, the source and the drain of the first transistor, respectively (see Fig. 3); and
wherein an orthographic projection of the metal shielding portion (element D, see [0054] “power supply conductor 42 is a power supply wiring”, [0083] “peripheral wiring D” and [0106] “light that is directed to the peripheral wiring D from the observation side or the light reflected by the surface of the peripheral wiring D are shielded by the protection portion 96”) on the silicon-based base substrate at least partially overlaps with an orthographic projection of the electronic device on the silicon-based base substrate (see Fig. 3).
The electronic device specific location in the edge area as taught by K1 is incorporated as the electronic device specific location in the edge area of L1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of K1 with L1 because the combination allows for incorporation of circuitry into a peripheral area of the display saving space and shielded from light such as prevent undesired optical interactions (see K1 Fig. 3); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known implementation of peripheral circuitry in an edge area for another in a similar display device to obtain predictable results (see K1 Fig. 3).
L1, K1 do not appear to explicitly disclose wherein the metal shielding portion is arranged in a fragmented manner.
L2 discloses wherein the metal shielding portion is arranged in a fragmented manner (see Figs. 2, 10 light shielding wall elements 4, 10 and pg. 9 “the first shielding wall 4 comprises a plurality of first sub-shield retaining wall 45, a third shielding wall 10 also includes a plurality of third sub-shield wall 100, so under the condition of ensuring the first shielding wall 4 and the third shielding wall 10 the double shielding effect, save the first shielding wall 4 and the third shielding wall 10 of the material and reduces cost”).
The fragmented top view structure of the metal shielding portion of L2 is incorporated as a fragmented top view structure of the metal shielding portion of L1, K1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of L2 with L1, K1 because the combination allows for a double shielding effect while saving material and cost (see L2 Fig. 10 and pg. 9); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known top view of a metal shielding portion for another in a similar display device for which the options are provided as alternatives to obtain predictable results (see L2 Figs. 1, 6, 10).
5. Regarding Claim 2, L1, K1, L2 disclose the display substrate according to claim 1, wherein the orthographic projection of the metal shielding portion on the silicon-based base substrate covers the orthographic projection of the electronic device on the silicon-based base substrate (see K1 Fig. 3).
6. Regarding Claim 12, L1, K1, L2 disclose the display substrate according to claim 1, further comprising m electronic devices (see L1 Fig. 7 and K1 Figs. 1-3 a plurality of transistors) and m metal shielding portions (the metal shielding portions are fragmented such as to have m metal shielding portions), wherein m is a positive integer greater than or equal to 2; and
wherein orthographic projections of the m metal shielding portions on the silicon-based base substrate cover orthographic projections of the m electronic devices on the silicon-based base substrate, respectively (the m metal shielding portions are selected over the m transistors).
7. Regarding Claim 13, L1, K1, L2 disclose the display substrate according to claim 12, wherein orthographic projections of at least two adjacent metal shielding portions among the m metal shielding portions on the silicon-based base substrate are arranged at intervals in the first direction (the metal shielding portions are fragmented such that they are arranged at intervals).
8. Regarding Claim 17, L1, K1, L2 disclose the display substrate according to claim 1, further comprising a plurality of bonding terminals (see L1 Fig. 1(b), 7 elements bond pads and 112, see [0068] “bonding pad 112”) arranged in the edge area of the silicon-based base substrate, wherein the orthographic projection of the metal shielding portion on the silicon-based base substrate is located between orthographic projections of the plurality of bonding terminals on the silicon-based base substrate and the active area (see L1 Fig. 1(b), 7).
9. Regarding Claim 26, L1, K1, L2 disclose A display apparatus, comprising the display substrate according to claim 1 (see L1 [0068] “display device”).
10. Claims 3-12, and 14-16 are rejected under 35 U.S.C. 103 as obvious over Lu et al. (US 2021/0408488 A1), hereinafter as L1, in view of Koshihara et al. (US 2015/0102323 A1), hereinafter as K1, in view of Liu et al. (CN 109728049 A, see attached translation document), hereinafter as L2, in view of Liu et al. (CN 112542447 A, see attached translation document), hereinafter as L3
11. Regarding Claim 3, L1, K1, L2 disclose the display substrate according to claim 1, further comprising the metal shielding portion arranged on a side of the layer in which the source of the electronic device and the drain of the electronic device are located away from the silicon-based base substrate (see L1 Fig. 7, K1 Fig. 3); and
wherein the metal shielding portion comprises n metal shielding sub-portions (see L2 Figs. 2, 10).
L1, K1, L2 do not explicitly disclose n metal film layers, wherein the n metal film layers, the n metal film layers are sequentially arranged away from the silicon-based base substrate, and n is a positive integer greater than or equal to 2; and the n metal shielding sub-portions are arranged in the n metal film layers, respectively.
L3 discloses (see Figs. 2, 7) n metal film layers (see pg. 6 “the first shielding layer 150 comprises 5 overlapped sub-shielding layer … adopts Ag, Al, Cu, Ag, Al” ), wherein the n metal film layers (plurality of layers which can be selected among Ag, Al, Cu), the n metal film layers are sequentially arranged away from the silicon-based base substrate (see Fig. 2), and n is a positive integer greater than or equal to 2 (see pg. 6); and the n metal shielding sub-portions are arranged in the n metal film layers, respectively (sub layers of element 150).
The sub-layered material of the metal shielding portion as taught by L3 is incorporated as sub-layered material of the metal shielding portion of L1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of L3 with L1, K1, L2 because the combination reduces leakage magnetic quantity, cancelling external electromagnetic field improving shielding property (see L3 pg. 6); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known number of layers for a light shielding layer for another in a similar device for which the options are provided as alternatives to obtain predictable results (see L3 pg. 6).
12. Regarding Claim 4, L1, K1, L2, L3 disclose the display substrate according to claim 3, further comprising n conductive connection portions located in the active area (see L3 Fig. 2 the multilayer light shielding elements in the active area combined with L1), wherein the n conductive connection portions are arranged in the n metal film layers (the layers are the same in the active area as the edge area), respectively, and each of the n metal shielding sub-portions is arranged in a same metal film layer as a respective one of the n conductive connection portions (the layers are the same in the active area as the edge area).
13. Regarding Claim 5, L1, K1, L2, L3 disclose the display substrate according to claim 4, wherein the metal shielding portion comprises a plurality of metal shielding sub-portions (see L2 Fig. 2 the fragmented structure and multilayered shielding layer provides a plurality of sub-portions) arranged in a same metal film layer (the layers are the same in the active area as the edge area), and any two adjacent metal shielding sub-portions among the plurality of metal shielding sub-portions arranged in the same metal film layer are spaced apart from each other (see L1 Fig. 7 and L2 Fig. 2).
14. Regarding Claim 6, L1, K1, L2, L3 disclose the display substrate according to claim 3, wherein an orthographic projection of the n metal shielding sub-portions on the silicon-based base substrate at least partially overlap with an orthographic projection of a same electronic device on the silicon-based base substrate (see K1 Fig. 3); and
wherein an orthographic projection of one of any two of the n metal shielding sub-portions on the silicon-based base substrate coincides with an orthographic projection of the other of the any two of the n metal shielding sub-portions on the silicon-based base substrate (two of the five n metal shielding sub portions coincides with two other of the five n metal shielding sub portions in the stack).
15. Regarding Claim 7, L1, K1, L2, L3 disclose the display substrate according to claim 3, wherein orthographic projections of at least two of the n metal shielding sub-portions on the silicon-based base substrate at least do not partially overlap with each other (two sub-portions selected among different fragmented portions can be selected which are laterally separated from a top perspective view).
16. Regarding Claim 8, L1, K1, L2, L3 disclose the display substrate according to claim 3, wherein the n metal shielding sub-portions comprise: a plurality of first metal shielding sub-portions arranged in an ith metal film layer (a first layer of the 5 layer metal stack can be selected which is fragmented to have a plurality of first sub-portions); and a plurality of second metal shielding sub-portions arranged in an (i+1)th metal film layer (a second layer of the 5 layer metal stack can be selected which is fragmented to have a plurality of second sub-portions),
wherein i is a positive integer greater than or equal to 1 and less than or equal to (n-2); and wherein orthographic projections of the plurality of first metal shielding sub-portions on the silicon-based base substrate and orthographic projections of the plurality of second metal shielding sub-portions on the silicon-based base substrate are alternately arranged in the first direction (alternating portions among the fragmented sections can be selected for the first metal shielding sub-portions and the second metal shielding sub-portions).
17. Regarding Claim 9, L1, K1, L2, L3 disclose the display substrate according to claim 8, wherein the n metal shielding sub-portions further comprise a plurality of third metal shielding sub-portions arranged in an (i+2)th metal film layer (the third layer of the 5 layer metal stack can be selected); and
wherein orthographic projections of the plurality of third metal shielding sub-portions on the silicon-based base substrate and the orthographic projections of the plurality of second metal shielding sub-portions on the silicon-based base substrate are alternately arranged in the first direction (alternating portions among the fragmented sections can be selected for the first metal shielding sub-portions, the second metal shielding sub-portions, and the third metal shielding sub-portions).
18. Regarding Claim 10, L1, K1, L2, L3 disclose the display substrate according to claim 9, wherein (see L3 Fig. 7) an orthographic projection of at least one of the plurality of second metal shielding sub-portions (each of the fragmented portions can be defined by the partitioning by grooves and see pg. 6 “the first shielding layer 150 comprises 5 overlapped sub-shielding layer … adopts Ag, Al, Cu, Ag, Al” and pg. 12 “the second shielding layer 151 comprises 5 overlapped sub-shielding layer … Ag, Al, Cu, Ag, Al”) on the silicon-based base substrate partially overlaps with an orthographic projection of an adjacent first metal shielding sub-portion among the plurality of first metal shielding sub-portions on the silicon-based base substrate or an orthographic projection of an adjacent third metal shielding sub-portion among the plurality of third metal shielding sub-portions on the silicon-based base substrate (see Fig. 7 the fragments are defined by grooves but each of the portions are connected such that there is at least partially overlapped portions;
furthermore, the manner in which the claim is currently recited broadly claims “portions” which are not defined in a manner such as to distinguish from the prior arts of record – the “portions” as currently claimed do not provide any interfacial or structural boundaries such that an arbitrary area can be selected such as to meet the claimed limitations).
19. Regarding Claim 11, L1, K1, L2, L3 disclose the display substrate according to claim 10, wherein the orthographic projections of the plurality of first metal shielding sub-portions on the silicon-based base substrate coincide with the orthographic projections of the plurality of third metal shielding sub- portions on the silicon-based base substrate, respectively (see L3 Fig. 3 the manner in which the claim is currently recited broadly claims “portions” which are not defined in a manner such as to distinguish from the prior arts of record – the “portions” as currently claimed do not provide any interfacial or structural boundaries such that an arbitrary area can be selected such as to meet the claimed limitations).
20. Regarding Claim 14, L1, K1, L2 disclose the display substrate according to claim 12, wherein orthographic projections of any two adjacent metal shielding portions among the m metal shielding portions on the silicon-based base substrate (each of the metal shielding portions has an orthographic projection).
L1, K1, L2 do not explicitly disclose any two adjacent metal shielding portions at least partially overlap with each other, such that the orthographic projections of the m metal shielding portions on the silicon-based base substrate extend continuously in the first direction.
L3 discloses (see Fig. 7) any two adjacent metal shielding portions (portions of element 150, 151 and see pg. 6 “the first shielding layer 150 comprises 5 overlapped sub-shielding layer … adopts Ag, Al, Cu, Ag, Al” and pg. 12 “the second shielding layer 151 comprises 5 overlapped sub-shielding layer … Ag, Al, Cu, Ag, Al”) at least partially overlap with each other (see Fig. 7 the fragments are defined by grooves but each of the portions are connected such that there is at least partially overlapped portions), such that the orthographic projections of the m metal shielding portions on the silicon-based base substrate extend continuously in the first direction (see Fig. 7).
The sub-layered material of the metal shielding portion as taught by L3 is incorporated as sub-layered material of the metal shielding portion of L1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of L3 with L1, K1, L2 because the combination reduces leakage magnetic quantity, cancelling external electromagnetic field improving shielding property (see L3 pg. 6); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known number of layers for a light shielding layer for another in a similar device for which the options are provided as alternatives to obtain predictable results (see L3 pg. 6).
21. Regarding Claim 15, L1, K1, L2, L3 disclose the display substrate according to claim 3, wherein at least two of the
n metal shielding sub-portions have different thicknesses; or the n metal shielding sub-portions have a same thickness (the metal shielding sub-portions only have the two options of being the same or different thicknesses).
22. Regarding Claim 16, L1, K1, L2, L3 disclose the display substrate according to claim 4, wherein among the n metal shielding sub-portions and the n conductive connection portions, the metal shielding sub-portion and the conductive connection portion arranged in the same metal film layer have a same thickness (each of the five metal layers of the metal shielding structure in all of the areas are the same element such as to have a same thickness within the same metal film layer).
Allowable Subject Matter
23. Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reason for indicating allowable subject matter:
The prior art made of record, either singularly or in combination, does not disclose or suggest at least the claim limitations of:
Claim 18 “wherein the metal shielding portion comprises a plurality of metal shielding sub-portions arranged in a same metal film layer as the plurality of bonding terminals, and a dimension of each of the plurality of metal shielding sub-portions arranged in the same metal film layer as the plurality of bonding terminals in the first direction is substantially equal to a dimension of a respective one of the plurality of bonding terminals in the first direction … a dimension of a gap between any two of the plurality of metal shielding sub-portions arranged in the same metal film layer as the plurality of bonding terminals in the first direction is substantially equal to a dimension of a gap between any two of the plurality of bonding terminals in the first direction … a dimension of each of the plurality of metal shielding sub-portions arranged in the same metal film layer as the plurality of bonding terminals in the second direction is less than a dimension of a respective one of the plurality of bonding terminals in the second direction … wherein at least one of the plurality of sub-pixels further comprises a reflective electrode, and a film layer in which the reflective electrode is located is arranged between a film layer in which the pixel driving circuit is located and a film layer in which the light-emitting element is located … wherein the metal shielding portion further comprises a plurality of top-layer metal shielding sub-portions arranged in a same layer as the reflective electrode; and wherein a dimension of each of the plurality of top-layer metal shielding sub-portions in the first direction is substantially equal to a dimension of a respective one of a plurality of reflective electrodes in the first direction … a dimension of a gap between any two of the plurality of top-layer metal shielding sub-portions in the first direction is substantially equal to a dimension of a gap between any two of a plurality of reflective electrodes in the first direction”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL PARK whose telephone number is (303)297-4277. The examiner can normally be reached Normal Schedule: M-F Sometime between 6:30 a.m. - 7:00 p.m..
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/SAMUEL PARK/Primary Examiner, Art Unit 2818
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