DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 27-28, 30, and 34 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tu et al. (U.S. Patent No. 8,664,026).
Regarding to claim 27, Tu teaches a semiconductor structure comprising:
an epitaxial semiconductor layer sequence (Fig. 2, element 20; column 2, line 16) comprising at least one p-doped semiconductor layer (Fig. 2, element 50; column 2, line 20); and
a plurality of degassing channels (Fig. 2, element 24; column 2, line 36),
wherein the degassing channels are widened crystal defects (Fig. 1 to Fig. 2, the degassing channels 24 are widened crystal defects 22), and
wherein the degassing channels in the epitaxial semiconductor layer sequence extend from a main surface of the epitaxial semiconductor layer sequence up to at least the p-doped semiconductor layer (Fig. 2).
Regarding to claim 28, Tu teaches the epitaxial semiconductor layer sequence comprises an active layer (Fig. 2, element 40; column 2, lines 20-21), which is configured to generate and/ or absorb electromagnetic radiation (light emitting diode generates electromagnetic radiation, which is light of visible wavelength range).
Regarding to claim 30, Tu teaches degassing channels penetrate the p-doped semiconductor layer (Fig. 2).
Regarding to claim 34, Tu teaches the degassing channels are at least partially filled with a dielectric (Fig. 3, element 70, column 3, line 8).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 18-23 and 25-26 are rejected under 35 U.S.C. 103 as being unpatentable over Tu et al. (U.S. Patent No. 8,664,026) in view of Gstrein et al. (U.S. Patent No. 12,036,578).
Regarding to claim 18, Tu teaches a method for manufacturing a semiconductor structure, the method comprising:
epitaxially depositing an epitaxial semiconductor layer sequence (Fig. 1, element 20; column 2, line 16) comprising at least one p-doped semiconductor layer including a p-dopant as passivating layer (Fig. 1, element 50; column 2, line 20);
wet-chemical etching of the epitaxial semiconductor layer sequence so that degassing channels are formed along crystal defects in the epitaxial semiconductor layer sequence from a main surface of the epitaxial semiconductor layer sequence up to at least the p-doped semiconductor layer (Fig. 2, column 2, lines 36-40, the main surface is the bottom surface of layer 30); and
removing portion of passivation from the epitaxial semiconductor layer sequence through the degassing channels (Fig. 2, portion of p-doped layer 50 associated with the degassing channel along the crystal defect 22 is removed).
Tu does not disclose passivating agents in the passivation layer.
Gstrein discloses passivating agents in a passivation layer (column 2, lines 8-15). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Tu in view of Gstrein to add passivating agents into the passivation layer in order to achieve good passivation (Gstrein, column 4, lines 23-26). As being modified, the passivating agents in the passivation layer is expelled from the epitaxial semiconductor layer when portion of the passivation layer is removed.
Regarding to claim 19, Tu teaches the epitaxial semiconductor layer sequence comprises a nitride compound semiconductor material (column 4, line 18-20, gallium nitride).
Regarding to claim 20, Tu teaches the epitaxial semiconductor layer sequence comprises an n-doped semiconductor layer, which is arranged between the p-doped semiconductor layer and the main surface of the epitaxial semiconductor layer sequence (Fig. 1, n-doped semiconductor layer 30 which is arranged between the p-doped semiconductor layer 50 and the main surface (bottom surface of stack 20) of the epitaxial semiconductor layer sequence 20).
Regarding to claim 21, Tu teaches the crystal defects are formed as threading dislocations in the epitaxial semiconductor layer sequence during epitaxial deposition, and wherein the crystal defects have a main direction of extension corresponding to a growth direction of the epitaxial semiconductor layer sequence (Fig. 1, column 4, lines 30-32).
Regarding to claim 22, Tu teaches the threading dislocations are formed as screw dislocations having a hollow core (Fig. 2).
Regarding to claim 23, Tu teaches epitaxial depositing is performed such that the crystal defects in the epitaxial semiconductor layer sequence are formed in a random arrangement (Fig. 1).
Regarding to claim 25, Tu teaches the main surface of the epitaxial semiconductor layer sequence is formed as a surface of an undoped top layer (Fig. 7, the main surface of the epitaxial semiconductor layer sequence is formed as a surface of undoped top layer 70).
Regarding to claim 26, Tu as modified discloses the degassing channels are at least partially filled with a dielectric after the passivating agent has been expelled (Fig. 3).
Allowable Subject Matter
Claims 24, 29, and 31-33 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
Regarding to claim 24, the prior art fails to anticipate or render obvious the claimed limitations including “the p-dopant is activated by expelling the passivating agent” in combination with the limitations recited in claim 18.
Regarding to claim 29, the prior art fails to anticipate or render obvious the claimed limitations including “the epitaxial semiconductor layer sequence comprises pores, which are arranged laterally around the degassing channels” in combination with the limitations recited in claim 27.
Regarding to claim 31, the prior art fails to anticipate or render obvious the claimed limitations including “the p-doped semiconductor layer forms a layer of a tunnel junction” in combination with the limitations recited in claim 27.
Pertinent Art
For the benefits of the Applicant, US-9218954-B2, US-6784074-B2, US-8450190-B2, US-20100184279-A1, US-8741451-B2, US-11257974-B2, US-6069367-A, US-9178114-B2, and US-8513039-B2, are cited on the record as being pertinent to significant disclosure through some but not all claimed features of the defined invention. In particular, the references fail to discloses the limitations including “expelling the passivating agent from the epitaxial semiconductor layer sequence through the degassing channels.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VU A VU whose telephone number is (571)270-7467. The examiner can normally be reached M-F: 8:00AM - 5:00PM.
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/VU A VU/Primary Examiner, Art Unit 2897
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