DETAILED ACTION
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 8/30/24 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by, or in the alternative, under 35 U.S.C. 103 as obvious over Kamphuis (US 2023/0290737).
As to claims 1 and 12, Kamphuis teaches a package (fig. 9) for assembling one or more integrated circuits (“IC”) and routing signals of the one or more integrated circuits using multiple redistribution layers (“RDL”), and a method for shielding a signal pad of an integrated circuit in a package with multiple redistribution layers (“RDL”), wherein
a top layer (upper surface of “RDL/Passivation”) of the redistribution layers is facing the integrated circuit (“IC”),
a bottom layer (bottom surface of “RDL/Passivation”) of the redistribution layers is an interface layer facing a substrate or printed circuit board, PCB (obvious, if not inherent that the bumps 170 will be connected to some sort of PCB or substrate, [0021]), and
the signal pad (bump 170) is on the bottom layer of the redistribution layers and is used for routing high-frequency or high-speed signals ([0012], [0021] – [0022], the bumps are connected to the RF chip via 118/128 which is used for high-frequency and/or high-speed signals),
the method comprises:
providing a shielding structure (129) on the top layer of the redistribution layers above the signal pad ([0015]).
Claim(s) 5, 7, 16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Kamphuis.
As to claims 5 and 16, Kamphuis further teaches the shielding structure (129) is a number of through mold vias, TMV, metal plated or metal filled, created on the top layer of the redistribution layers around an opening of the top layer above the signal pad (best seen in fig. 7, [0015]).
As to claims 7 and 18, Kamphuis teaches pins/vias (129) around an opening of the top layer above the signal pad (fig. 7, [0015]) but does not teach these pins/vias comprise solder. However, use of solder would have been obvious so as to use a material that is industrially known and accepted, since it has been held that a choosing from a finite number of known options is within the technical grasp of a person having ordinary skill in the art and is not patentable over the prior art. See MPEP 2143(E).
Claim(s) 2 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Kamphuis in view of Verma (US 2022/0270973).
As to claims 2 and 13, Kamphuis teaches “other types of shielding structures…”may be added to the bottom of the substrate as needed or desired” ([0015]). Verma teaches a meshed top layer of an RDL as a shielding structure ([0028]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to use a meshed shielding structure as taught by Verma so as to provide heat dissipation and EM shielding ([0028]), since it has been held that a choosing from a finite number of known options is within the technical grasp of a person having ordinary skill in the art and is not patentable over the prior art. See MPEP 2143(E).
Claim(s) 3, 4, 6, 8, 9, 10, 14, 15, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kamphuis in view of Elsherbini (US 2022/0199546).
As to claims 3, 4, 6, 8, 9, 10, 14, 15, and 17-20, Kamphuis teaches “other types of shielding structures…”may be added to the bottom of the substrate as needed or desired” ([0015]). Elsherbini teaches a “shield structure 115 may be a continuous structure, such as a mesh or webbing structure, or may be a non-continuous structure, such as a wall, which may be planar, zigzagged, or L-shaped, for example.” ([0042]). Each of these configurations claimed is some sort of wall-shaped structure.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to use a meshed shielding structure as taught by Elsherbini so as to provide EM shielding, since it has been held that a choosing from a finite number of known options is within the technical grasp of a person having ordinary skill in the art and is not patentable over the prior art. See MPEP 2143(E).
Allowable Subject Matter
Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art taken either singularly or in combination fails to anticipate or fairly suggest the limitations of the claims listed above in such a manner that a rejection under 35 U.S.C. 102 or 103 would be proper.
The prior art fails to teach a combination of all of the features in the claims. In particular, the prior art fails to teach the shielding structure is a shielding cage with bumps created under the integrated circuit and above the signal pad.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any response to this Office Action should be faxed to (571) 273-8300 or mailed to:
Commissioner for Patents
P.O. Box 1450
Alexandria, VA 22313-1450
Hand-Delivered responses should be brought to:
Customer Service Window
Randolph Building
401 Dulany Street
Alexandria, VA 22313
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAREN M KUSUMAKAR whose telephone number is (571)270-3520. The examiner can normally be reached on Monday – Friday from 7:30a – 4:30p EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached on 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/KAREN KUSUMAKAR/
Primary Examiner, Art Unit 2897
8/24/26
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